From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-8.2 required=3.0 tests=HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_PATCH,MAILING_LIST_MULTI,SIGNED_OFF_BY,SPF_HELO_NONE,SPF_PASS, USER_AGENT_SANE_1 autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 05F91C2D0DE for ; Thu, 2 Jan 2020 00:12:37 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id D530C2072C for ; Thu, 2 Jan 2020 00:12:36 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727452AbgABAMg (ORCPT ); Wed, 1 Jan 2020 19:12:36 -0500 Received: from mail-sh.amlogic.com ([58.32.228.43]:42143 "EHLO mail-sh.amlogic.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1727393AbgABAMg (ORCPT ); Wed, 1 Jan 2020 19:12:36 -0500 Received: from [10.18.38.198] (10.18.38.198) by mail-sh.amlogic.com (10.18.11.5) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.1591.10; Thu, 2 Jan 2020 08:12:56 +0800 Subject: Re: [PATCH v3 3/6] phy: amlogic: Add Amlogic A1 USB2 PHY Driver To: Chunfeng Yun CC: Jerome Brunet , Neil Armstrong , Rob Herring , Greg Kroah-Hartman , Kevin Hilman , Yue Wang , , , , , Carlo Caione , Michael Turquette , Stephen Boyd , Martin Blumenstingl , Liang Yang , Jianxin Pan , Qiufang Dai , Jian Hu , Victor Wan , Xingyu Chen References: <1577428606-69855-1-git-send-email-hanjie.lin@amlogic.com> <1577428606-69855-4-git-send-email-hanjie.lin@amlogic.com> <1577501595.21256.8.camel@mhfsdcap03> From: Hanjie Lin Message-ID: Date: Thu, 2 Jan 2020 08:12:56 +0800 User-Agent: Mozilla/5.0 (Windows NT 10.0; WOW64; rv:68.0) Gecko/20100101 Thunderbird/68.3.1 MIME-Version: 1.0 In-Reply-To: <1577501595.21256.8.camel@mhfsdcap03> Content-Type: text/plain; charset="utf-8" Content-Language: en-US Content-Transfer-Encoding: 7bit X-Originating-IP: [10.18.38.198] X-ClientProxiedBy: mail-sh.amlogic.com (10.18.11.5) To mail-sh.amlogic.com (10.18.11.5) Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org On 2019/12/28 10:53, Chunfeng Yun wrote: > On Fri, 2019-12-27 at 14:36 +0800, Hanjie Lin wrote: >> This adds support for the USB2 PHY found in the Amlogic A1 SoC Family. >> >> It supports host mode only. >> >> Signed-off-by: Hanjie Lin >> Signed-off-by: Yue Wang >> --- >> drivers/phy/amlogic/phy-meson-g12a-usb2.c | 93 +++++++++++++++++++++---------- >> 1 file changed, 64 insertions(+), 29 deletions(-) >> >> diff --git a/drivers/phy/amlogic/phy-meson-g12a-usb2.c b/drivers/phy/amlogic/phy-meson-g12a-usb2.c >> index 9065ffc..a564747 100644 >> --- a/drivers/phy/amlogic/phy-meson-g12a-usb2.c >> +++ b/drivers/phy/amlogic/phy-meson-g12a-usb2.c >> @@ -146,11 +146,17 @@ > [...] >> + priv->soc_id = (enum meson_soc_id)of_device_get_match_data(&pdev->dev); >> + >> priv->regmap = devm_regmap_init_mmio(dev, base, >> &phy_meson_g12a_usb2_regmap_conf); >> if (IS_ERR(priv->regmap)) >> return PTR_ERR(priv->regmap); >> >> - priv->clk = devm_clk_get(dev, "xtal"); >> - if (IS_ERR(priv->clk)) >> - return PTR_ERR(priv->clk); >> + if (priv->soc_id == MESON_SOC_G12A) { >> + priv->clk = devm_clk_get(dev, "xtal"); >> + if (IS_ERR(priv->clk)) >> + return PTR_ERR(priv->clk); >> + } > How about use devm_clk_get_optional(), then make it as optional clock > also in dt-binding >> > >> > Hi Chunfeng Actually, there is a "xtal_usb_phy" clock in A1 ctrl driver, it seems it's better to be in the A1 phy driver. I will move that clock here in next version. Thanks, Hanjie