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From: Dinh Nguyen <dinguyen@kernel.org>
To: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>,
	niravkumar.l.rabara@intel.com,
	Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>
Cc: Rob Herring <robh+dt@kernel.org>,
	devicetree@vger.kernel.org, linux-kernel@vger.kernel.org
Subject: Re: [PATCH v2] arm64: dts: intel: socfpga_agilex: use defined GIC interrupt type for ECC
Date: Tue, 14 Jun 2022 10:53:51 -0500	[thread overview]
Message-ID: <eee82dd8-494f-4171-b56a-438ebf67a785@kernel.org> (raw)
In-Reply-To: <0b5bb492-dfe6-0388-491c-b2afc531f35b@linaro.org>



On 5/30/22 02:31, Krzysztof Kozlowski wrote:
> On 30/05/2022 09:25, niravkumar.l.rabara@intel.com wrote:
>> From: Niravkumar L Rabara <niravkumar.l.rabara@intel.com>
>>
>> Use defined GIC interrupt type instead of hard-coded numbers for ECC
>> (Error Correction Code) memory, which creates edac sysfs interface.
> 
> Ah, ECC was about device node... sounds fine.
> 
> Anyway, please always include tags you received.
> 
> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
> 
> 
> Best regards,
> Krzysztof


Applied!

Thanks,
Dinh

      reply	other threads:[~2022-06-14 15:53 UTC|newest]

Thread overview: 5+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-05-30  6:12 [PATCH] arm64: dts: intel: socfpga_agilex: use defined GIC interrupt type for ECC niravkumar.l.rabara
2022-05-30  6:36 ` Krzysztof Kozlowski
2022-05-30  7:25 ` [PATCH v2] " niravkumar.l.rabara
2022-05-30  7:31   ` Krzysztof Kozlowski
2022-06-14 15:53     ` Dinh Nguyen [this message]

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