From: Jon Hunter <jonathanh@nvidia.com>
To: Krishna Reddy <vdumpa@nvidia.com>, <joro@8bytes.org>,
<will@kernel.org>, <robin.murphy@arm.com>, <robh+dt@kernel.org>,
<treding@nvidia.com>
Cc: <devicetree@vger.kernel.org>,
<linux-arm-kernel@lists.infradead.org>,
<iommu@lists.linux-foundation.org>,
<linux-kernel@vger.kernel.org>, <linux-tegra@vger.kernel.org>,
<yhsu@nvidia.com>, <snikam@nvidia.com>, <praithatha@nvidia.com>,
<talho@nvidia.com>, <bbiswas@nvidia.com>, <mperttunen@nvidia.com>,
<nicolinc@nvidia.com>, <bhuntsman@nvidia.com>,
<nicoleotsuka@gmail.com>
Subject: Re: [PATCH v10 1/5] iommu/arm-smmu: move TLB timeout and spin count macros
Date: Wed, 8 Jul 2020 13:05:22 +0100 [thread overview]
Message-ID: <f078a879-0779-2bae-19d6-8537493f7124@nvidia.com> (raw)
In-Reply-To: <20200708050017.31563-2-vdumpa@nvidia.com>
On 08/07/2020 06:00, Krishna Reddy wrote:
> Move TLB timeout and spin count macros to header file to
> allow using the same from vendor specific implementations.
>
> Signed-off-by: Krishna Reddy <vdumpa@nvidia.com>
> ---
> drivers/iommu/arm-smmu.c | 3 ---
> drivers/iommu/arm-smmu.h | 2 ++
> 2 files changed, 2 insertions(+), 3 deletions(-)
>
> diff --git a/drivers/iommu/arm-smmu.c b/drivers/iommu/arm-smmu.c
> index 243bc4cb2705..d2054178df35 100644
> --- a/drivers/iommu/arm-smmu.c
> +++ b/drivers/iommu/arm-smmu.c
> @@ -52,9 +52,6 @@
> */
> #define QCOM_DUMMY_VAL -1
>
> -#define TLB_LOOP_TIMEOUT 1000000 /* 1s! */
> -#define TLB_SPIN_COUNT 10
> -
> #define MSI_IOVA_BASE 0x8000000
> #define MSI_IOVA_LENGTH 0x100000
>
> diff --git a/drivers/iommu/arm-smmu.h b/drivers/iommu/arm-smmu.h
> index d172c024be61..c7d0122a7c6c 100644
> --- a/drivers/iommu/arm-smmu.h
> +++ b/drivers/iommu/arm-smmu.h
> @@ -236,6 +236,8 @@ enum arm_smmu_cbar_type {
> /* Maximum number of context banks per SMMU */
> #define ARM_SMMU_MAX_CBS 128
>
> +#define TLB_LOOP_TIMEOUT 1000000 /* 1s! */
> +#define TLB_SPIN_COUNT 10
>
> /* Shared driver definitions */
> enum arm_smmu_arch_version {
>
Reviewed-by: Jon Hunter <jonathanh@nvidia.com>
Thanks!
Jon
--
nvpublic
next prev parent reply other threads:[~2020-07-08 12:05 UTC|newest]
Thread overview: 25+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-07-08 5:00 [PATCH v10 0/5] NVIDIA ARM SMMU Implementation Krishna Reddy
2020-07-08 5:00 ` [PATCH v10 1/5] iommu/arm-smmu: move TLB timeout and spin count macros Krishna Reddy
2020-07-08 12:05 ` Jon Hunter [this message]
2020-07-08 20:37 ` Nicolin Chen
2020-07-08 5:00 ` [PATCH v10 2/5] iommu/arm-smmu: ioremap smmu mmio region before implementation init Krishna Reddy
2020-07-08 12:05 ` Jon Hunter
2020-07-08 20:37 ` Nicolin Chen
2020-07-13 14:02 ` Robin Murphy
2020-07-08 5:00 ` [PATCH v10 3/5] iommu/arm-smmu: add NVIDIA implementation for ARM MMU-500 usage Krishna Reddy
2020-07-08 12:24 ` Jon Hunter
2020-07-08 20:36 ` Nicolin Chen
2020-07-08 5:00 ` [PATCH v10 4/5] dt-bindings: arm-smmu: add binding for Tegra194 SMMU Krishna Reddy
2020-07-08 12:25 ` Jon Hunter
2020-07-09 20:13 ` Rob Herring
2020-07-10 20:29 ` Krishna Reddy
2020-07-13 14:10 ` Robin Murphy
2020-07-14 14:22 ` Rob Herring
2020-07-08 5:00 ` [PATCH v10 5/5] iommu/arm-smmu: Add global/context fault implementation hooks Krishna Reddy
2020-07-08 12:28 ` Jon Hunter
2020-07-08 20:36 ` Nicolin Chen
2020-07-13 13:44 ` Will Deacon
2020-07-17 11:58 ` Robin Murphy
2020-07-13 13:50 ` [PATCH v10 0/5] NVIDIA ARM SMMU Implementation Will Deacon
2020-07-17 10:03 ` Will Deacon
2020-07-17 22:36 ` Krishna Reddy
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