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([2001:861:44c0:66c0:381b:6e50:a892:5269]) by smtp.gmail.com with ESMTPSA id l6sm3662645wmq.22.2022.01.12.00.33.42 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Wed, 12 Jan 2022 00:33:42 -0800 (PST) Subject: Re: [PATCH 3/3] arm64: dts: meson-g12-common: add uart_ao_b pins muxing To: Gary Bisson , linux-amlogic@lists.infradead.org Cc: Rob Herring , Kevin Hilman , Jerome Brunet , Martin Blumenstingl , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org References: <20220103154616.308376-1-gary.bisson@boundarydevices.com> <20220103154616.308376-4-gary.bisson@boundarydevices.com> From: Neil Armstrong Organization: Baylibre Message-ID: Date: Wed, 12 Jan 2022 09:33:42 +0100 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:78.0) Gecko/20100101 Thunderbird/78.14.0 MIME-Version: 1.0 In-Reply-To: <20220103154616.308376-4-gary.bisson@boundarydevices.com> Content-Type: text/plain; charset=utf-8 Content-Language: en-US Content-Transfer-Encoding: 7bit Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Hi, On 03/01/2022 16:46, Gary Bisson wrote: > - RX/TX signals can be mapped on 2 different pairs of pins so supporting > both options > - RTS/CTS signals however only have 1 option available > > Signed-off-by: Gary Bisson > --- > Cc: Rob Herring > Cc: Neil Armstrong > Cc: Kevin Hilman > Cc: Jerome Brunet > Cc: Martin Blumenstingl > Cc: devicetree@vger.kernel.org > Cc: linux-arm-kernel@lists.infradead.org > Cc: linux-kernel@vger.kernel.org > --- > .../boot/dts/amlogic/meson-g12-common.dtsi | 27 +++++++++++++++++++ > 1 file changed, 27 insertions(+) > > diff --git a/arch/arm64/boot/dts/amlogic/meson-g12-common.dtsi b/arch/arm64/boot/dts/amlogic/meson-g12-common.dtsi > index af1357c48bee..3a7773ffbd08 100644 > --- a/arch/arm64/boot/dts/amlogic/meson-g12-common.dtsi > +++ b/arch/arm64/boot/dts/amlogic/meson-g12-common.dtsi > @@ -1952,6 +1952,33 @@ mux { > }; > }; > > + uart_ao_b_1_pins: uart-ao-b-1 { > + mux { > + groups = "uart_ao_b_tx_2", > + "uart_ao_b_rx_3"; > + function = "uart_ao_b"; > + bias-disable; > + }; > + }; > + > + uart_ao_b_2_pins: uart-ao-b-2 { > + mux { > + groups = "uart_ao_b_tx_8", > + "uart_ao_b_rx_9"; > + function = "uart_ao_b"; > + bias-disable; > + }; > + }; I'm not fan of these nodes namings. Perhaps : - uart-ao-b-2-3 - uart-ao-b-8-9 so the actual pins numbers used are more clear ? > + > + uart_ao_b_cts_rts_pins: uart-ao-b-cts-rts { > + mux { > + groups = "uart_ao_b_cts", > + "uart_ao_b_rts"; > + function = "uart_ao_b"; > + bias-disable; > + }; > + }; > + > pwm_a_e_pins: pwm-a-e { > mux { > groups = "pwm_a_e"; >