From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.7 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 31EB4C433ED for ; Wed, 19 May 2021 20:10:29 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 16CA261355 for ; Wed, 19 May 2021 20:10:29 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232950AbhESULs (ORCPT ); Wed, 19 May 2021 16:11:48 -0400 Received: from smtp.outgoing.loopia.se ([93.188.3.37]:56042 "EHLO smtp.outgoing.loopia.se" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232978AbhESULr (ORCPT ); Wed, 19 May 2021 16:11:47 -0400 Received: from s807.loopia.se (localhost [127.0.0.1]) by s807.loopia.se (Postfix) with ESMTP id 39FEB2E63752 for ; Wed, 19 May 2021 22:10:23 +0200 (CEST) Received: from s630.loopia.se (unknown [172.22.191.5]) by s807.loopia.se (Postfix) with ESMTP id 2A1292E2B065; Wed, 19 May 2021 22:10:23 +0200 (CEST) Received: from s476.loopia.se (unknown [172.22.191.6]) by s630.loopia.se (Postfix) with ESMTP id 15AC513B950C; Wed, 19 May 2021 22:10:23 +0200 (CEST) X-Virus-Scanned: amavisd-new at amavis.loopia.se Received: from s899.loopia.se ([172.22.191.6]) by s476.loopia.se (s476.loopia.se [172.22.190.16]) (amavisd-new, port 10024) with LMTP id JcxCcng4klUL; Wed, 19 May 2021 22:10:22 +0200 (CEST) X-Loopia-Auth: user X-Loopia-User: carl@hgsystem.se X-Loopia-Originating-IP: 155.4.133.180 Received: from localhost.localdomain (h-155-4-133-180.NA.cust.bahnhof.se [155.4.133.180]) (Authenticated sender: carl@hgsystem.se) by s899.loopia.se (Postfix) with ESMTPSA id 504C62C8BAC6; Wed, 19 May 2021 22:10:22 +0200 (CEST) From: Erik Rosen To: Jean Delvare , Guenter Roeck , Jonathan Corbet , linux-hwmon@vger.kernel.org, linux-doc@vger.kernel.org, linux-kernel@vger.kernel.org Cc: Erik Rosen Subject: [PATCH 2/5] hwmon: (pmbus/pim4328) Add new pmbus flag NO_WRITE_PROTECT Date: Wed, 19 May 2021 22:10:12 +0200 Message-Id: <20210519201015.83989-3-erik.rosen@metormote.com> X-Mailer: git-send-email 2.11.0 (Apple Git-81) In-Reply-To: <20210519201015.83989-1-erik.rosen@metormote.com> References: <20210519201015.83989-1-erik.rosen@metormote.com> Precedence: bulk List-ID: X-Mailing-List: linux-doc@vger.kernel.org Some PMBus chips respond with invalid data when reading the WRITE_PROTECT register. For such chips, this flag should be set so that the PMBus core driver doesn't use the WRITE_PROTECT command to determine it's behavior. Signed-off-by: Erik Rosen --- drivers/hwmon/pmbus/pmbus_core.c | 9 ++++++--- include/linux/pmbus.h | 9 +++++++++ 2 files changed, 15 insertions(+), 3 deletions(-) diff --git a/drivers/hwmon/pmbus/pmbus_core.c b/drivers/hwmon/pmbus/pmbus_core.c index c92ad5764301..944570edf37f 100644 --- a/drivers/hwmon/pmbus/pmbus_core.c +++ b/drivers/hwmon/pmbus/pmbus_core.c @@ -2265,9 +2265,12 @@ static int pmbus_init_common(struct i2c_client *client, struct pmbus_data *data, * faults, and we should not try it. Also, in that case, writes into * limit registers need to be disabled. */ - ret = i2c_smbus_read_byte_data(client, PMBUS_WRITE_PROTECT); - if (ret > 0 && (ret & PB_WP_ANY)) - data->flags |= PMBUS_WRITE_PROTECTED | PMBUS_SKIP_STATUS_CHECK; + if (!(data->flags & PMBUS_NO_WRITE_PROTECT)) { + ret = i2c_smbus_read_byte_data(client, PMBUS_WRITE_PROTECT); + if (ret > 0 && (ret & PB_WP_ANY)) + data->flags |= PMBUS_WRITE_PROTECTED + | PMBUS_SKIP_STATUS_CHECK; + } if (data->info->pages) pmbus_clear_faults(client); diff --git a/include/linux/pmbus.h b/include/linux/pmbus.h index 12cbbf305969..f720470b1bab 100644 --- a/include/linux/pmbus.h +++ b/include/linux/pmbus.h @@ -43,6 +43,15 @@ */ #define PMBUS_NO_CAPABILITY BIT(2) +/* + * PMBUS_NO_WRITE_PROTECT + * + * Some PMBus chips respond with invalid data when reading the WRITE_PROTECT + * register. For such chips, this flag should be set so that the PMBus core + * driver doesn't use the WRITE_PROTECT command to determine it's behavior. + */ +#define PMBUS_NO_WRITE_PROTECT BIT(4) + struct pmbus_platform_data { u32 flags; /* Device specific flags */ -- 2.20.1