From: Usama Arif <usama.arif@bytedance.com>
To: linux-kernel@vger.kernel.org,
linux-arm-kernel@lists.infradead.org,
kvmarm@lists.cs.columbia.edu, kvm@vger.kernel.org,
linux-doc@vger.kernel.org,
virtualization@lists.linux-foundation.org, linux@armlinux.org.uk,
yezengruan@huawei.com, catalin.marinas@arm.com, will@kernel.org,
maz@kernel.org, steven.price@arm.com, mark.rutland@arm.com
Cc: fam.zheng@bytedance.com, liangma@liangbit.com,
punit.agrawal@bytedance.com,
Usama Arif <usama.arif@bytedance.com>
Subject: [RFC 1/6] KVM: arm64: Document PV-lock interface
Date: Wed, 2 Nov 2022 16:13:35 +0000 [thread overview]
Message-ID: <20221102161340.2982090-2-usama.arif@bytedance.com> (raw)
In-Reply-To: <20221102161340.2982090-1-usama.arif@bytedance.com>
Introduce a paravirtualization interface for KVM/arm64 to obtain whether
the VCPU is currently running or not.
The PV lock structure of the guest is allocated by user space.
A hypercall interface is provided for the guest to interrogate the
hypervisor's support for this interface and the location of the shared
memory structures.
Signed-off-by: Zengruan Ye <yezengruan@huawei.com>
Signed-off-by: Usama Arif <usama.arif@bytedance.com>
---
Documentation/virt/kvm/arm/pvlock.rst | 64 +++++++++++++++++++++++++
Documentation/virt/kvm/devices/vcpu.rst | 23 +++++++++
2 files changed, 87 insertions(+)
create mode 100644 Documentation/virt/kvm/arm/pvlock.rst
diff --git a/Documentation/virt/kvm/arm/pvlock.rst b/Documentation/virt/kvm/arm/pvlock.rst
new file mode 100644
index 000000000000..766aeef50b2d
--- /dev/null
+++ b/Documentation/virt/kvm/arm/pvlock.rst
@@ -0,0 +1,64 @@
+.. SPDX-License-Identifier: GPL-2.0
+
+Paravirtualized lock support for arm64
+======================================
+
+KVM/arm64 provides hypervisor service calls for paravirtualized guests to check
+whether a VCPU is currently running or not.
+
+Two new SMCCC compatible hypercalls are defined:
+
+* PV_LOCK_FEATURES: 0xC6000020
+* PV_LOCK_PREEMPTED: 0xC6000021
+
+The existence of the PV_LOCK hypercall should be probed using the SMCCC 1.1
+ARCH_FEATURES mechanism before calling it.
+
+PV_LOCK_FEATURES
+ ============= ======== ==========
+ Function ID: (uint32) 0xC6000020
+ PV_call_id: (uint32) The function to query for support.
+ Currently only PV_LOCK_PREEMPTED is supported.
+ Return value: (int64) NOT_SUPPORTED (-1) or SUCCESS (0) if the relevant
+ PV-lock feature is supported by the hypervisor.
+ ============= ======== ==========
+
+PV_LOCK_PREEMPTED
+ ============= ======== ==========
+ Function ID: (uint32) 0xC6000021
+ Return value: (int64) IPA of the pv lock data structure for this
+ VCPU. On failure:
+ NOT_SUPPORTED (-1)
+ ============= ======== ==========
+
+The IPA returned by PV_LOCK_PREEMPTED should be mapped by the guest as normal
+memory with inner and outer write back caching attributes, in the inner
+shareable domain.
+
+PV_LOCK_PREEMPTED returns the structure for the calling VCPU.
+
+PV lock state
+-------------
+
+The structure pointed to by the PV_LOCK_PREEMPTED hypercall is as follows:
+
++-----------+-------------+-------------+---------------------------------+
+| Field | Byte Length | Byte Offset | Description |
++===========+=============+=============+=================================+
+| preempted | 8 | 0 | Indicate if the VCPU that owns |
+| | | | this struct is running or not. |
+| | | | Non-zero values mean the VCPU |
+| | | | has been preempted. Zero means |
+| | | | the VCPU is not preempted. |
++-----------+-------------+-------------+---------------------------------+
+
+The preempted field will be updated to 1 by the hypervisor prior to scheduling
+a VCPU. When the VCPU is scheduled out, the preempted field will be updated
+to 0 by the hypervisor.
+
+The structure will be present within a reserved region of the normal memory
+given to the guest. The guest should not attempt to write into this memory.
+There is a structure per VCPU of the guest.
+
+For the user space interface see Documentation/virt/kvm/devices/vcpu.rst
+section "4. GROUP: KVM_ARM_VCPU_PVLOCK_CTRL".
diff --git a/Documentation/virt/kvm/devices/vcpu.rst b/Documentation/virt/kvm/devices/vcpu.rst
index 716aa3edae14..223ac2fe62f0 100644
--- a/Documentation/virt/kvm/devices/vcpu.rst
+++ b/Documentation/virt/kvm/devices/vcpu.rst
@@ -263,3 +263,26 @@ From the destination VMM process:
7. Write the KVM_VCPU_TSC_OFFSET attribute for every vCPU with the
respective value derived in the previous step.
+
+5. GROUP: KVM_ARM_VCPU_PVLOCK_CTRL
+==================================
+
+:Architectures: ARM64
+
+5.1 ATTRIBUTE: KVM_ARM_VCPU_PVLOCK_IPA
+--------------------------------------
+
+:Parameters: 64-bit base address
+
+Returns:
+
+ ======= ======================================
+ -ENXIO PV lock not implemented
+ -EEXIST Base address already set for this VCPU
+ -EINVAL Base address not 64 byte aligned
+ ======= ======================================
+
+Specifies the base address of the pv lock structure for this VCPU. The
+base address must be 64 byte aligned and exist within a valid guest memory
+region. See Documentation/virt/kvm/arm/pvlock.rst for more information
+including the layout of the pv lock structure.
--
2.25.1
next prev parent reply other threads:[~2022-11-02 16:20 UTC|newest]
Thread overview: 12+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-11-02 16:13 [RFC 0/6] KVM: arm64: implement vcpu_is_preempted check Usama Arif
2022-11-02 16:13 ` Usama Arif [this message]
2022-11-03 3:50 ` [RFC 1/6] KVM: arm64: Document PV-lock interface Bagas Sanjaya
2022-11-03 13:15 ` [External] " Usama Arif
2022-11-03 13:56 ` Bagas Sanjaya
2022-11-02 16:13 ` [RFC 2/6] KVM: arm64: Add SMCCC paravirtualised lock calls Usama Arif
2022-11-02 16:13 ` [RFC 3/6] KVM: arm64: Support pvlock preempted via shared structure Usama Arif
2022-11-02 16:13 ` [RFC 4/6] KVM: arm64: Provide VCPU attributes for PV lock Usama Arif
2022-11-02 16:13 ` [RFC 5/6] KVM: arm64: Support the VCPU preemption check Usama Arif
2022-11-03 13:25 ` Steven Price
2022-11-04 6:24 ` [External] " Usama Arif
2022-11-02 16:13 ` [RFC 6/6] KVM: selftests: add tests for PV time specific hypercalls Usama Arif
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20221102161340.2982090-2-usama.arif@bytedance.com \
--to=usama.arif@bytedance.com \
--cc=catalin.marinas@arm.com \
--cc=fam.zheng@bytedance.com \
--cc=kvm@vger.kernel.org \
--cc=kvmarm@lists.cs.columbia.edu \
--cc=liangma@liangbit.com \
--cc=linux-arm-kernel@lists.infradead.org \
--cc=linux-doc@vger.kernel.org \
--cc=linux-kernel@vger.kernel.org \
--cc=linux@armlinux.org.uk \
--cc=mark.rutland@arm.com \
--cc=maz@kernel.org \
--cc=punit.agrawal@bytedance.com \
--cc=steven.price@arm.com \
--cc=virtualization@lists.linux-foundation.org \
--cc=will@kernel.org \
--cc=yezengruan@huawei.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).