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Wysocki" , Linux PM Cc: Linux Documentation , LKML , Peter Zijlstra , Srinivas Pandruvada , Giovanni Gherdovich , Doug Smythies Subject: Re: [PATCH v4 1/2] cpufreq: intel_pstate: Rearrange the storing of new EPP values In-Reply-To: <1665283.zxI7kaGBi8@kreacher> References: <4981405.3kqTVLv5tO@kreacher> <1709487.Bxjb1zNRZM@kreacher> <13207937.r2GEYrEf4f@kreacher> <1665283.zxI7kaGBi8@kreacher> Date: Wed, 29 Jul 2020 18:31:07 -0700 Message-ID: <87wo2leqlg.fsf@riseup.net> MIME-Version: 1.0 Content-Type: multipart/signed; boundary="==-=-="; micalg=pgp-sha256; protocol="application/pgp-signature" Sender: linux-doc-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-doc@vger.kernel.org --==-=-= Content-Type: multipart/mixed; boundary="=-=-=" --=-=-= Content-Type: text/plain; charset=utf-8 Content-Disposition: inline Content-Transfer-Encoding: quoted-printable "Rafael J. Wysocki" writes: > From: Rafael J. Wysocki > > Move the locking away from intel_pstate_set_energy_pref_index() > into its only caller and drop the (now redundant) return_pref label > from it. > > Also move the "raw" EPP value check into the caller of that function, > so as to do it before acquiring the mutex, and reduce code duplication > related to the "raw" EPP values processing somewhat. > > No intentional functional impact. > > Signed-off-by: Rafael J. Wysocki Reviewed-by: Francisco Jerez > --- > > v2 -> v3: > > * Fix error handling in intel_pstate_set_energy_pref_index() and > rebase. > > v3 -> v4: No changes > > --- > drivers/cpufreq/intel_pstate.c | 35 +++++++++++++++-------------------- > 1 file changed, 15 insertions(+), 20 deletions(-) > > Index: linux-pm/drivers/cpufreq/intel_pstate.c > =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D= =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D= =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D > --- linux-pm.orig/drivers/cpufreq/intel_pstate.c > +++ linux-pm/drivers/cpufreq/intel_pstate.c > @@ -649,28 +649,18 @@ static int intel_pstate_set_energy_pref_ > if (!pref_index) > epp =3D cpu_data->epp_default; >=20=20 > - mutex_lock(&intel_pstate_limits_lock); > - > if (boot_cpu_has(X86_FEATURE_HWP_EPP)) { > u64 value; >=20=20 > ret =3D rdmsrl_on_cpu(cpu_data->cpu, MSR_HWP_REQUEST, &value); > if (ret) > - goto return_pref; > + return ret; >=20=20 > value &=3D ~GENMASK_ULL(31, 24); >=20=20 > - if (use_raw) { > - if (raw_epp > 255) { > - ret =3D -EINVAL; > - goto return_pref; > - } > - value |=3D (u64)raw_epp << 24; > - ret =3D wrmsrl_on_cpu(cpu_data->cpu, MSR_HWP_REQUEST, value); > - goto return_pref; > - } > - > - if (epp =3D=3D -EINVAL) > + if (use_raw) > + epp =3D raw_epp; > + else if (epp =3D=3D -EINVAL) > epp =3D epp_values[pref_index - 1]; >=20=20 > value |=3D (u64)epp << 24; > @@ -680,8 +670,6 @@ static int intel_pstate_set_energy_pref_ > epp =3D (pref_index - 1) << 2; > ret =3D intel_pstate_set_epb(cpu_data->cpu, epp); > } > -return_pref: > - mutex_unlock(&intel_pstate_limits_lock); >=20=20 > return ret; > } > @@ -708,8 +696,8 @@ static ssize_t store_energy_performance_ > struct cpudata *cpu_data =3D all_cpu_data[policy->cpu]; > char str_preference[21]; > bool raw =3D false; > + ssize_t ret; > u32 epp =3D 0; > - int ret; >=20=20 > ret =3D sscanf(buf, "%20s", str_preference); > if (ret !=3D 1) > @@ -724,14 +712,21 @@ static ssize_t store_energy_performance_ > if (ret) > return ret; >=20=20 > + if (epp > 255) > + return -EINVAL; > + > raw =3D true; > } >=20=20 > + mutex_lock(&intel_pstate_limits_lock); > + > ret =3D intel_pstate_set_energy_pref_index(cpu_data, ret, raw, epp); > - if (ret) > - return ret; > + if (!ret) > + ret =3D count; >=20=20 > - return count; > + mutex_unlock(&intel_pstate_limits_lock); > + > + return ret; > } >=20=20 > static ssize_t show_energy_performance_preference( --=-=-=-- --==-=-= Content-Type: application/pgp-signature; name="signature.asc" -----BEGIN PGP SIGNATURE----- iHUEAREIAB0WIQST8OekYz69PM20/4aDmTidfVK/WwUCXyIi2wAKCRCDmTidfVK/ W+bIAP9VI6QX7g2roqBKi/zof0Rfvrs5n3eeDvhO33ZmdO88nwEAjpv6+ZAvh6pk rKhiSm3lspzJ3ly69OUe1/IEeWcze5c= =ElU5 -----END PGP SIGNATURE----- --==-=-=--