From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-14.0 required=3.0 tests=HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_PATCH,MAILING_LIST_MULTI, MENTIONS_GIT_HOSTING,SIGNED_OFF_BY,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED, USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id D6DF9C282DD for ; Thu, 23 May 2019 13:08:35 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id AD7D120851 for ; Thu, 23 May 2019 13:08:35 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728309AbfEWNIe (ORCPT ); Thu, 23 May 2019 09:08:34 -0400 Received: from spam01.hygon.cn ([110.188.70.11]:23615 "EHLO spam1.hygon.cn" rhost-flags-OK-FAIL-OK-FAIL) by vger.kernel.org with ESMTP id S1726310AbfEWNIe (ORCPT ); Thu, 23 May 2019 09:08:34 -0400 Received: from MK-DB.hygon.cn ([172.23.18.60]) by spam1.hygon.cn with ESMTP id x4ND0ueA097536; Thu, 23 May 2019 21:00:56 +0800 (GMT-8) (envelope-from puwen@hygon.cn) Received: from cncheex01.Hygon.cn ([172.23.18.10]) by MK-DB.hygon.cn with ESMTP id x4NCxxOI084791; Thu, 23 May 2019 20:59:59 +0800 (GMT-8) (envelope-from puwen@hygon.cn) Received: from pw-vbox.hygon.cn (172.23.18.44) by cncheex01.Hygon.cn (172.23.18.10) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.1466.3; Thu, 23 May 2019 21:00:54 +0800 From: Pu Wen To: CC: , Pu Wen Subject: [PATCH] ras-mce-handler: Add support for Hygon Dhyana family 18h processor Date: Thu, 23 May 2019 21:00:22 +0800 Message-ID: <1558616422-22997-1-git-send-email-puwen@hygon.cn> X-Mailer: git-send-email 2.7.4 MIME-Version: 1.0 Content-Type: text/plain X-Originating-IP: [172.23.18.44] X-ClientProxiedBy: cncheex02.Hygon.cn (172.23.18.12) To cncheex01.Hygon.cn (172.23.18.10) X-MAIL: spam1.hygon.cn x4ND0ueA097536 X-DNSRBL: Sender: linux-edac-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-edac@vger.kernel.org The Hygon Dhyana family 18h processor is derived from AMD family 17h. The Hygon Dhyana support to Linux is already accepted upstream[1]. Add Hygon Dhyana support to mce handler of rasdaemon in order to handle MCE events on Hygon Dhyana platforms. Reference: [1] https://git.kernel.org/tip/fec98069fb72fb656304a3e52265e0c2fc9adf87 Signed-off-by: Pu Wen --- ras-mce-handler.c | 9 ++++++++- ras-mce-handler.h | 1 + 2 files changed, 9 insertions(+), 1 deletion(-) diff --git a/ras-mce-handler.c b/ras-mce-handler.c index c11d489..eb548c6 100644 --- a/ras-mce-handler.c +++ b/ras-mce-handler.c @@ -55,7 +55,8 @@ static char *cputype_name[] = { [CPU_KNIGHTS_LANDING] = "Knights Landing", [CPU_KNIGHTS_MILL] = "Knights Mill", [CPU_SKYLAKE_XEON] = "Skylake server", - [CPU_NAPLES] = "AMD Family 17h Zen1" + [CPU_NAPLES] = "AMD Family 17h Zen1", + [CPU_DHYANA] = "Hygon Family 18h Moksha" }; static enum cputype select_intel_cputype(struct ras_events *ras) @@ -200,6 +201,11 @@ static int detect_cpu(struct ras_events *ras) ret = EINVAL; } goto ret; + } else if (!strcmp(mce->vendor,"HygonGenuine")) { + if (mce->family == 24) { + mce->cputype = CPU_DHYANA; + } + goto ret; } else if (!strcmp(mce->vendor,"GenuineIntel")) { mce->cputype = select_intel_cputype(ras); } else { @@ -436,6 +442,7 @@ int ras_mce_event_handler(struct trace_seq *s, rc = parse_amd_k8_event(ras, &e); break; case CPU_NAPLES: + case CPU_DHYANA: rc = parse_amd_smca_event(ras, &e); break; default: /* All other CPU types are Intel */ diff --git a/ras-mce-handler.h b/ras-mce-handler.h index 8aaecd1..94395eb 100644 --- a/ras-mce-handler.h +++ b/ras-mce-handler.h @@ -51,6 +51,7 @@ enum cputype { CPU_KNIGHTS_MILL, CPU_SKYLAKE_XEON, CPU_NAPLES, + CPU_DHYANA, }; struct mce_event { -- 2.7.4