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From: "Luck, Tony" <>
To: Linus Torvalds <>
Cc: Thomas Gleixner <>,
	Ingo Molnar <>, Peter Anvin <>,
	Borislav Petkov <>,
	linux-edac <>,
	Linux Kernel Mailing List <>,
	the arch/x86 maintainers <>,
	Dan Williams <>,
	Dave Jiang <>
Subject: [V2] x86/mce: Fix set_mce_nospec() to avoid #GP fault
Date: Fri, 31 Aug 2018 09:55:06 -0700
Message-ID: <20180831165506.GA9605@agluck-desk> (raw)

The trick with flipping bit 63 to avoid loading the address of the
1:1 mapping of the poisoned page while we update the 1:1 map used
to work when we wanted to unmap the page. But it falls down horribly
when we try to directly set the page as uncacheable.

The problem is that when we change the cache mode to uncachable we
try to flush the page from the cache. But the decoy address is
non-canonical, and the CLFLUSH instruction throws a #GP fault.

Add code to change_page_attr_set_clr() to fix the address
before calling flush.

Fixes: 284ce4011ba6 ("x86/memory_failure: Introduce {set, clear}_mce_nospec()")
Suggested-by: Linus Torvalds <>
Signed-off-by: Tony Luck <>

The magic code to make address canonical would mess up 32-bit (which
doesn't play these games).  So I made an inline function. I've put it
in pageattr.c as I don't expect anywhere else to need this. If the #ifdef
in a ".c" file offends too badly it can move to some ".h" file.

 arch/x86/mm/pageattr.c | 25 ++++++++++++++++++++++++-
 1 file changed, 24 insertions(+), 1 deletion(-)

diff --git a/arch/x86/mm/pageattr.c b/arch/x86/mm/pageattr.c
index 8d6c34fe49be..51a5a69ecac9 100644
--- a/arch/x86/mm/pageattr.c
+++ b/arch/x86/mm/pageattr.c
@@ -1420,6 +1420,29 @@ static int __change_page_attr_set_clr(struct cpa_data *cpa, int checkalias)
 	return 0;
+ * Machine check recovery code needs to change cache mode of poisoned
+ * pages to UC to avoid speculative access logging another error. But
+ * passing the address of the 1:1 mapping to set_memory_uc() is a fine
+ * way to encourage a speculative access. So we cheat and flip the top
+ * bit of the address. This works fine for the code that updates the
+ * page tables. But at the end of the process we need to flush the cache
+ * and the non-canonical address causes a #GP fault when used by the
+ * CLFLUSH instruction.
+ *
+ * But in the common case we already have a canonical address. This code
+ * will fix the top bit if needed and is a no-op otherwise.
+ */
+static inline unsigned long make_addr_canonical_again(unsigned long addr)
+#ifdef CONFIG_X86_64
+	return (long)(addr << 1) >> 1;
+	return addr;
 static int change_page_attr_set_clr(unsigned long *addr, int numpages,
 				    pgprot_t mask_set, pgprot_t mask_clr,
 				    int force_split, int in_flag,
@@ -1465,7 +1488,7 @@ static int change_page_attr_set_clr(unsigned long *addr, int numpages,
 		 * Save address for cache flush. *addr is modified in the call
 		 * to __change_page_attr_set_clr() below.
-		baddr = *addr;
+		baddr = make_addr_canonical_again(*addr);
 	/* Must avoid aliasing mappings in the highmem code */

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Thread overview: 2+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2018-08-31 16:55 Luck, Tony [this message]
2018-08-31 16:57 Linus Torvalds

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