From: Borislav Petkov <bp@alien8.de>
To: "Ghannam, Yazen" <Yazen.Ghannam@amd.com>
Cc: "Luck, Tony" <tony.luck@intel.com>,
"linux-edac@vger.kernel.org" <linux-edac@vger.kernel.org>,
"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
"x86@kernel.org" <x86@kernel.org>
Subject: Re: [PATCH v3 5/6] x86/MCE: Save MCA control bits that get set in hardware
Date: Tue, 28 May 2019 01:28:50 +0200 [thread overview]
Message-ID: <20190527232849.GC8209@cz.tnic> (raw)
In-Reply-To: <SN6PR12MB26390759DB43763D3A482918F8010@SN6PR12MB2639.namprd12.prod.outlook.com>
On Thu, May 23, 2019 at 08:00:33PM +0000, Ghannam, Yazen wrote:
> I did a bit more testing and I noticed that writing "0" disables a bank with no way to reenable it.
>
> For example:
> 1) Read bank10.
> a) Succeeds; returns "fffffffffffffff".
> 2) Write "0" to bank10.
> a) Succeeds; hardware register is set to "0".
> b) Hardware register is checked, and b->init=0.
> 3) Read bank10.
> a) Fails, because b->init=0.
> 4) Write non-zero value to bank10 to reenable it.
> a) Fails, because b->init=0.
> 5) Reboot needed to reset bank.
>
> Is that okay?
Nope, that doesn't sound correct to me.
I guess the cleanest way to handle his properly would be to have a
function called something like __mcheck_cpu_init_banks() which gets
called in mcheck_cpu_init() after the quirks have run and then does the
final poking of the banks and sets b->init properly.
__mcheck_cpu_init_clear_banks() should then be renamed to
__mcheck_cpu_clear_banks() to denote that it only clears the banks and
would only do:
if (!b->init)
continue;
wrmsrl(msr_ops.ctl(i), b->ctl);
wrmsrl(msr_ops.status(i), 0);
And then sprinkle some commenting to not forget the scheme again.
Yeah, this sounds clean to me but you guys might have a better idea...
Thx.
--
Regards/Gruss,
Boris.
ECO tip #101: Trim your mails when you reply. Srsly.
next prev parent reply other threads:[~2019-05-27 23:28 UTC|newest]
Thread overview: 47+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-04-30 20:32 [PATCH v3 0/6] Handle MCA banks in a per_cpu way Ghannam, Yazen
2019-04-30 20:32 ` [v3,1/6] x86/MCE: Make struct mce_banks[] static Yazen Ghannam
2019-04-30 20:32 ` [PATCH v3 1/6] " Ghannam, Yazen
2019-04-30 20:32 ` [v3,2/6] x86/MCE: Handle MCA controls in a per_cpu way Yazen Ghannam
2019-04-30 20:32 ` [PATCH v3 2/6] " Ghannam, Yazen
2019-04-30 20:32 ` [v3,3/6] x86/MCE/AMD: Don't cache block addresses on SMCA systems Yazen Ghannam
2019-04-30 20:32 ` [PATCH v3 3/6] " Ghannam, Yazen
2019-04-30 20:32 ` [v3,5/6] x86/MCE: Save MCA control bits that get set in hardware Yazen Ghannam
2019-04-30 20:32 ` [PATCH v3 5/6] " Ghannam, Yazen
2019-05-16 15:52 ` Luck, Tony
2019-05-16 16:14 ` Ghannam, Yazen
2019-05-16 16:56 ` Borislav Petkov
2019-05-16 17:09 ` Ghannam, Yazen
2019-05-16 17:21 ` Borislav Petkov
2019-05-16 20:20 ` Ghannam, Yazen
2019-05-16 20:34 ` Borislav Petkov
2019-05-16 20:59 ` Luck, Tony
2019-05-17 10:10 ` Borislav Petkov
2019-05-17 15:46 ` Ghannam, Yazen
2019-05-17 16:37 ` Borislav Petkov
2019-05-17 17:26 ` Luck, Tony
2019-05-17 17:48 ` Borislav Petkov
2019-05-17 18:06 ` Luck, Tony
2019-05-17 19:34 ` Borislav Petkov
2019-05-17 19:44 ` Luck, Tony
2019-05-17 19:50 ` Borislav Petkov
2019-05-17 19:49 ` Ghannam, Yazen
2019-05-17 20:02 ` Borislav Petkov
2019-05-23 20:00 ` Ghannam, Yazen
2019-05-27 23:28 ` Borislav Petkov [this message]
2019-06-07 14:49 ` Ghannam, Yazen
2019-06-07 16:37 ` Borislav Petkov
2019-06-07 16:44 ` Ghannam, Yazen
2019-06-07 16:59 ` Borislav Petkov
2019-06-07 17:08 ` Ghannam, Yazen
2019-06-07 17:20 ` Borislav Petkov
2019-06-11 5:13 ` Borislav Petkov
2019-04-30 20:32 ` [v3,4/6] x86/MCE: Make number of MCA banks per_cpu Yazen Ghannam
2019-04-30 20:32 ` [PATCH v3 4/6] " Ghannam, Yazen
2019-05-18 11:25 ` Borislav Petkov
2019-05-21 17:52 ` Ghannam, Yazen
2019-05-21 20:29 ` Borislav Petkov
2019-05-21 20:42 ` Luck, Tony
2019-05-21 23:09 ` Borislav Petkov
2019-05-22 14:01 ` Ghannam, Yazen
2019-04-30 20:32 ` [v3,6/6] x86/MCE: Treat MCE bank as initialized if control bits set in hardware Yazen Ghannam
2019-04-30 20:32 ` [PATCH v3 6/6] " Ghannam, Yazen
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