From: Christoph Hellwig <hch@lst.de>
To: Paul Walmsley <paul.walmsley@sifive.com>
Cc: Christoph Hellwig <hch@lst.de>, Borislav Petkov <bp@alien8.de>,
palmer@sifive.com, linux-riscv@lists.infradead.org,
linux-edac@vger.kernel.org, linux-kernel@vger.kernel.org,
Yash Shah <yash.shah@sifive.com>
Subject: Re: [PATCH] riscv: move sifive_l2_cache.c to drivers/soc
Date: Sat, 7 Sep 2019 06:42:17 +0200 [thread overview]
Message-ID: <20190907044217.GC21510@lst.de> (raw)
In-Reply-To: <alpine.DEB.2.21.9999.1909061527510.6292@viisi.sifive.com>
On Fri, Sep 06, 2019 at 03:33:02PM -0700, Paul Walmsley wrote:
> If that's your primary concern, then in the short term, how about just
> sending a single-line patch to the arch/riscv/mm Makefile to skip building
> it if !CONFIG_SOC_SIFIVE? Assuming, that is, you won't be enabling EDAC
> support for those low-end SoCs. Then you won't need to get the ack
> from the EDAC folks in the short term.
Paul, stop it. The patch that meged this was complete crap and fucked up.
And instead of just fixing up this mess ASAP you just keep arguing even
when I finally get hold of a RISC-V maintainer after weeks of waiting.
If this isn't going to get any better I'm just going to bypass you for
RISC-V patches and will send patches straight to Linus.
next prev parent reply other threads:[~2019-09-07 4:42 UTC|newest]
Thread overview: 16+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-08-18 8:29 [PATCH] riscv: move sifive_l2_cache.c to drivers/soc Christoph Hellwig
2019-08-19 4:44 ` Anup Patel
2019-08-19 6:09 ` Borislav Petkov
2019-08-19 6:26 ` Christoph Hellwig
2019-08-20 6:03 ` Yash Shah
2019-08-22 9:26 ` Mauro Carvalho Chehab
2019-08-31 2:53 ` Paul Walmsley
2019-09-01 8:00 ` Christoph Hellwig
2019-09-27 22:53 ` Christoph Hellwig
2019-10-17 17:19 ` Christoph Hellwig
2019-09-06 22:33 ` Paul Walmsley
2019-09-07 4:42 ` Christoph Hellwig [this message]
2019-09-06 22:27 ` Paul Walmsley
2019-09-06 22:36 ` Paul Walmsley
2019-09-07 4:40 ` Christoph Hellwig
2019-09-07 4:39 ` Christoph Hellwig
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