linux-edac.vger.kernel.org archive mirror
 help / color / mirror / Atom feed
From: Sean Christopherson <sean.j.christopherson@intel.com>
To: Paolo Bonzini <pbonzini@redhat.com>
Cc: "Thomas Gleixner" <tglx@linutronix.de>,
	"Ingo Molnar" <mingo@redhat.com>,
	"Borislav Petkov" <bp@alien8.de>,
	x86@kernel.org, "Peter Zijlstra" <peterz@infradead.org>,
	"Arnaldo Carvalho de Melo" <acme@kernel.org>,
	"Radim Krčmář" <rkrcmar@redhat.com>,
	"Tony Luck" <tony.luck@intel.com>,
	"Tony W Wang-oc" <TonyWWang-oc@zhaoxin.com>,
	"H. Peter Anvin" <hpa@zytor.com>,
	"Mark Rutland" <mark.rutland@arm.com>,
	"Alexander Shishkin" <alexander.shishkin@linux.intel.com>,
	"Jiri Olsa" <jolsa@redhat.com>,
	"Namhyung Kim" <namhyung@kernel.org>,
	"Vitaly Kuznetsov" <vkuznets@redhat.com>,
	"Wanpeng Li" <wanpengli@tencent.com>,
	"Jim Mattson" <jmattson@google.com>,
	"Joerg Roedel" <joro@8bytes.org>,
	linux-kernel@vger.kernel.org, kvm@vger.kernel.org,
	linux-edac@vger.kernel.org, "Borislav Petkov" <bp@suse.de>,
	"Jarkko Sakkinen" <jarkko.sakkinen@linux.intel.com>
Subject: Re: [PATCH 01/16] x86/intel: Initialize IA32_FEATURE_CONTROL MSR at boot
Date: Mon, 7 Oct 2019 10:10:13 -0700	[thread overview]
Message-ID: <20191007171013.GD18016@linux.intel.com> (raw)
In-Reply-To: <afd37a28-d135-7c34-bd63-7c11099998bc@redhat.com>

On Mon, Oct 07, 2019 at 07:05:32PM +0200, Paolo Bonzini wrote:
> On 04/10/19 23:56, Sean Christopherson wrote:
> > Always lock IA32_FEATURE_CONTROL if it exists, even if the CPU doesn't
> > support VMX, so that other existing and future kernel code that queries
> > IA32_FEATURE_CONTROL can assume it's locked.
> 
> Possibly stupid question: why bother locking it?  It makes sense to lock
> the MSR bits to _off_ in the firmware, but if the BIOS hasn't locked it,
> why should the OS?
> 
> It seems to me that locking introduces a lot of complication.

None of the enable bits take effect until the MSR is locked.  If I had to
guess, ucode likely goes and pokes the enabled features during the WRMSR
with the lock bit set, as opposed to the relevant features querying the
MSR value as needed (querying the MSR is likely slow).

  reply	other threads:[~2019-10-07 17:10 UTC|newest]

Thread overview: 33+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-10-04 21:55 [PATCH 00/16] x86/cpu: Clean up handling of VMX features Sean Christopherson
2019-10-04 21:56 ` [PATCH 01/16] x86/intel: Initialize IA32_FEATURE_CONTROL MSR at boot Sean Christopherson
2019-10-07 17:05   ` Paolo Bonzini
2019-10-07 17:10     ` Sean Christopherson [this message]
2019-10-04 21:56 ` [PATCH 02/16] x86/mce: WARN once if IA32_FEATURE_CONTROL MSR is left unlocked Sean Christopherson
2019-10-04 21:56 ` [PATCH 03/16] x86/centaur: Use common IA32_FEATURE_CONTROL MSR initialization Sean Christopherson
2019-10-04 21:56 ` [PATCH 04/16] x86/zhaoxin: " Sean Christopherson
2019-10-04 21:56 ` [PATCH 05/16] KVM: VMX: Drop initialization of IA32_FEATURE_CONTROL MSR Sean Christopherson
2019-10-04 23:24   ` Jim Mattson
2019-10-04 21:56 ` [PATCH 06/16] x86/cpu: Clear VMX feature flag if VMX is not fully enabled Sean Christopherson
2019-10-04 21:56 ` [PATCH 07/16] KVM: VMX: Use VMX feature flag to query BIOS enabling Sean Christopherson
2019-10-04 23:26   ` Jim Mattson
2019-10-04 21:56 ` [PATCH 08/16] KVM: VMX: Check for full VMX support when verifying CPU compatibility Sean Christopherson
2019-10-04 23:35   ` Jim Mattson
2019-10-04 21:56 ` [PATCH 09/16] x86/vmx: Introduce VMX_FEATURES_* Sean Christopherson
2019-10-07 17:08   ` Paolo Bonzini
2019-10-07 17:13     ` Sean Christopherson
2019-10-04 21:56 ` [PATCH 10/16] x86/cpu: Detect VMX features on Intel, Centaur and Zhaoxin CPUs Sean Christopherson
2019-10-07 17:11   ` Paolo Bonzini
2019-10-07 19:54     ` Sean Christopherson
2019-10-08  6:55       ` Paolo Bonzini
2019-10-04 21:56 ` [PATCH 11/16] x86/cpu: Print VMX features as separate line item in /proc/cpuinfo Sean Christopherson
2019-10-07 17:12   ` Paolo Bonzini
2019-10-07 19:56     ` Sean Christopherson
2019-10-08  6:57       ` Paolo Bonzini
2019-10-08 16:53         ` Jim Mattson
2019-10-09 19:16         ` Sean Christopherson
2019-10-09 21:13           ` Paolo Bonzini
2019-10-04 21:56 ` [PATCH 12/16] x86/cpufeatures: Drop synthetic VMX feature flags Sean Christopherson
2019-10-04 21:56 ` [PATCH 13/16] KVM: VMX: Use VMX_FEATURE_* flags to define VMCS control bits Sean Christopherson
2019-10-04 21:56 ` [PATCH 14/16] x86/cpufeatures: Clean up synthetic virtualization flags Sean Christopherson
2019-10-04 21:56 ` [PATCH 15/16] perf/x86: Provide stubs of KVM helpers for non-Intel CPUs Sean Christopherson
2019-10-04 21:56 ` [PATCH 16/16] KVM: VMX: Allow KVM_INTEL when building for Centaur and/or Zhaoxin CPUs Sean Christopherson

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=20191007171013.GD18016@linux.intel.com \
    --to=sean.j.christopherson@intel.com \
    --cc=TonyWWang-oc@zhaoxin.com \
    --cc=acme@kernel.org \
    --cc=alexander.shishkin@linux.intel.com \
    --cc=bp@alien8.de \
    --cc=bp@suse.de \
    --cc=hpa@zytor.com \
    --cc=jarkko.sakkinen@linux.intel.com \
    --cc=jmattson@google.com \
    --cc=jolsa@redhat.com \
    --cc=joro@8bytes.org \
    --cc=kvm@vger.kernel.org \
    --cc=linux-edac@vger.kernel.org \
    --cc=linux-kernel@vger.kernel.org \
    --cc=mark.rutland@arm.com \
    --cc=mingo@redhat.com \
    --cc=namhyung@kernel.org \
    --cc=pbonzini@redhat.com \
    --cc=peterz@infradead.org \
    --cc=rkrcmar@redhat.com \
    --cc=tglx@linutronix.de \
    --cc=tony.luck@intel.com \
    --cc=vkuznets@redhat.com \
    --cc=wanpengli@tencent.com \
    --cc=x86@kernel.org \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).