From: Shiju Jose <shiju.jose@huawei.com>
To: <mchehab@kernel.org>, <linux-edac@vger.kernel.org>
Cc: <linuxarm@huawei.com>, Shiju Jose <shiju.jose@huawei.com>
Subject: [PATCH rasdaemon 2/2] rasdaemon: store PCIe dev name and TLP header for the aer event
Date: Wed, 13 Nov 2019 16:31:13 +0000 [thread overview]
Message-ID: <20191113163113.3356-3-shiju.jose@huawei.com> (raw)
In-Reply-To: <20191113163113.3356-1-shiju.jose@huawei.com>
This patch adds logging and recording of the PCIe dev name and the
TLP header for the aer event.
Signed-off-by: Shiju Jose <shiju.jose@huawei.com>
---
ras-aer-handler.c | 21 ++++++++++++++++++++-
ras-record.c | 6 ++++--
ras-record.h | 2 ++
3 files changed, 26 insertions(+), 3 deletions(-)
diff --git a/ras-aer-handler.c b/ras-aer-handler.c
index 664f7b4..8ddd439 100644
--- a/ras-aer-handler.c
+++ b/ras-aer-handler.c
@@ -52,6 +52,8 @@ static const char *aer_uncor_errors[32] = {
[20] = "Unsupported Request",
};
+#define BUF_LEN 1024
+
int ras_aer_event_handler(struct trace_seq *s,
struct pevent_record *record,
struct event_format *event, void *context)
@@ -59,11 +61,12 @@ int ras_aer_event_handler(struct trace_seq *s,
int len;
unsigned long long severity_val;
unsigned long long status_val;
+ unsigned long long val;
struct ras_events *ras = context;
time_t now;
struct tm *tm;
struct ras_aer_event ev;
- char buf[1024];
+ char buf[BUF_LEN];
/*
* Newer kernels (3.10-rc1 or upper) provide an uptime clock.
@@ -89,6 +92,7 @@ int ras_aer_event_handler(struct trace_seq *s,
record, &len, 1);
if (!ev.dev_name)
return -1;
+ trace_seq_printf(s, "%s ", ev.dev_name);
if (pevent_get_field_val(s, event, "status", record, &status_val, 1) < 0)
return -1;
@@ -104,6 +108,21 @@ int ras_aer_event_handler(struct trace_seq *s,
else
bitfield_msg(buf, sizeof(buf), aer_uncor_errors, 32, 0, 0, status_val);
ev.msg = buf;
+
+ if (pevent_get_field_val(s, event, "tlp_header_valid",
+ record, &val, 1) < 0)
+ return -1;
+
+ ev.tlp_header_valid = val;
+ if (ev.tlp_header_valid) {
+ ev.tlp_header = pevent_get_field_raw(s, event, "tlp_header",
+ record, &len, 1);
+ snprintf((buf + strlen(ev.msg)), BUF_LEN - strlen(ev.msg),
+ " TLP Header: %08x %08x %08x %08x",
+ ev.tlp_header[0], ev.tlp_header[1],
+ ev.tlp_header[2], ev.tlp_header[3]);
+ }
+
trace_seq_printf(s, "%s ", ev.msg);
/* Use hw_event_aer_err_type switch between different severity_val */
diff --git a/ras-record.c b/ras-record.c
index ca58b22..318bace 100644
--- a/ras-record.c
+++ b/ras-record.c
@@ -106,6 +106,7 @@ int ras_store_mc_event(struct ras_events *ras, struct ras_mc_event *ev)
static const struct db_fields aer_event_fields[] = {
{ .name="id", .type="INTEGER PRIMARY KEY" },
{ .name="timestamp", .type="TEXT" },
+ { .name="dev_name", .type="TEXT" },
{ .name="err_type", .type="TEXT" },
{ .name="err_msg", .type="TEXT" },
};
@@ -126,8 +127,9 @@ int ras_store_aer_event(struct ras_events *ras, struct ras_aer_event *ev)
log(TERM, LOG_INFO, "aer_event store: %p\n", priv->stmt_aer_event);
sqlite3_bind_text(priv->stmt_aer_event, 1, ev->timestamp, -1, NULL);
- sqlite3_bind_text(priv->stmt_aer_event, 2, ev->error_type, -1, NULL);
- sqlite3_bind_text(priv->stmt_aer_event, 3, ev->msg, -1, NULL);
+ sqlite3_bind_text(priv->stmt_aer_event, 2, ev->dev_name, -1, NULL);
+ sqlite3_bind_text(priv->stmt_aer_event, 3, ev->error_type, -1, NULL);
+ sqlite3_bind_text(priv->stmt_aer_event, 4, ev->msg, -1, NULL);
rc = sqlite3_step(priv->stmt_aer_event);
if (rc != SQLITE_OK && rc != SQLITE_DONE)
diff --git a/ras-record.h b/ras-record.h
index 440669d..cc217a9 100644
--- a/ras-record.h
+++ b/ras-record.h
@@ -43,6 +43,8 @@ struct ras_aer_event {
char timestamp[64];
const char *error_type;
const char *dev_name;
+ uint8_t tlp_header_valid;
+ uint32_t *tlp_header;
const char *msg;
};
--
1.9.1
prev parent reply other threads:[~2019-11-13 16:31 UTC|newest]
Thread overview: 33+ messages / expand[flat|nested] mbox.gz Atom feed top
[not found] <Shiju Jose>
2019-06-17 14:28 ` [PATCH 0/6] rasdaemon:add logging of HiSilicon HIP08 non-standard H/W errors and changes in the error decoding code Shiju Jose
2019-06-17 14:28 ` [PATCH 1/6] rasdaemon:print non-standard error data if not decoded Shiju Jose
2019-06-17 14:28 ` [PATCH 2/6] rasdaemon: rearrange HiSilicon HIP07 decoding function table Shiju Jose
2019-06-17 14:28 ` [PATCH 3/6] rasdaemon: update iteration logic for the non-standard error decoding functions Shiju Jose
2019-06-17 14:28 ` [PATCH 4/6] rasdaemon:add logging HiSilicon HIP08 H/W errors reported in the OEM format1 Shiju Jose
2019-06-17 14:28 ` [PATCH 5/6] rasdaemon:add logging HiSilicon HIP08 H/W errors reported in the OEM format2 Shiju Jose
2019-06-17 14:28 ` [PATCH 6/6] rasdaemon:add logging HiSilicon HIP08 PCIe local errors Shiju Jose
2019-06-21 18:42 ` [PATCH 0/6] rasdaemon:add logging of HiSilicon HIP08 non-standard H/W errors and changes in the error decoding code Mauro Carvalho Chehab
2019-08-12 10:11 ` [PATCH RFC 0/4] ACPI: APEI: Add support to notify the vendor specific HW errors Shiju Jose
2019-08-12 10:11 ` [PATCH RFC 1/4] " Shiju Jose
2019-08-21 17:23 ` James Morse
2019-08-22 16:57 ` Shiju Jose
2019-08-12 10:11 ` [PATCH RFC 2/4] ACPI: APEI: Add ghes_handle_memory_failure to the new notification method Shiju Jose
2019-08-21 17:22 ` James Morse
2019-08-22 16:57 ` Shiju Jose
2019-08-12 10:11 ` [PATCH RFC 3/4] ACPI: APEI: Add ghes_handle_aer " Shiju Jose
2019-08-12 10:11 ` [PATCH RFC 4/4] ACPI: APEI: Add log_arm_hw_error " Shiju Jose
2019-08-21 17:22 ` [PATCH RFC 0/4] ACPI: APEI: Add support to notify the vendor specific HW errors James Morse
2019-08-22 16:56 ` Shiju Jose
2019-10-03 17:21 ` James Morse
2019-10-16 16:33 ` [PATCH 0/7] rasdaemon: add fixes, database closure and signal handling Shiju Jose
2019-10-16 16:33 ` [PATCH 1/7] rasdaemon: fix cleanup issues in ras-events.c:read_ras_event_all_cpus() Shiju Jose
2019-10-16 16:33 ` [PATCH 2/7] rasdaemon: fix memory leak in ras-events.c:handle_ras_events() Shiju Jose
2019-10-16 16:33 ` [PATCH 3/7] rasdaemon: fix missing fclose in ras-events.c:select_tracing_timestamp() Shiju Jose
2019-10-16 16:33 ` [PATCH 4/7] rasdaemon: fix memory leak in ras-events.c:add_event_handler() Shiju Jose
2019-10-16 16:33 ` [PATCH 5/7] rasdaemon: delete multiple definitions of ARRAY_SIZE Shiju Jose
2019-10-16 16:34 ` [PATCH 6/7] rasdaemon: add closure and cleanups for the database Shiju Jose
2019-10-16 16:34 ` [PATCH 7/7] rasdaemon: add signal handling for the cleanup Shiju Jose
2019-11-13 16:38 ` [PATCH 0/7] rasdaemon: add fixes, database closure and signal handling Shiju Jose
2019-11-20 4:37 ` Mauro Carvalho Chehab
2019-11-13 16:31 ` [PATCH rasdaemon 0/2] rasdaemon: add fix for the sql table Shiju Jose
2019-11-13 16:31 ` [PATCH rasdaemon 1/2] rasdaemon: fix for the ras-record.c:ras_mc_prepare_stmt() failure when new fields added to " Shiju Jose
2019-11-13 16:31 ` Shiju Jose [this message]
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20191113163113.3356-3-shiju.jose@huawei.com \
--to=shiju.jose@huawei.com \
--cc=linux-edac@vger.kernel.org \
--cc=linuxarm@huawei.com \
--cc=mchehab@kernel.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).