From: Robert Richter <rrichter@marvell.com>
To: Borislav Petkov <bp@alien8.de>,
Mauro Carvalho Chehab <mchehab@kernel.org>,
Tony Luck <tony.luck@intel.com>
Cc: James Morse <james.morse@arm.com>,
Aristeu Rozanski <aris@redhat.com>,
Robert Richter <rrichter@marvell.com>,
Matthias Brugger <mbrugger@suse.com>,
<linux-edac@vger.kernel.org>, <linux-kernel@vger.kernel.org>
Subject: [PATCH v3 3/5] EDAC/ghes: Carve out MC device handling into separate functions
Date: Tue, 19 May 2020 12:44:41 +0200 [thread overview]
Message-ID: <20200519104443.15673-4-rrichter@marvell.com> (raw)
In-Reply-To: <20200519104443.15673-1-rrichter@marvell.com>
The functions are too long, carve out code that handles MC devices
into the new functions ghes_mc_create(), ghes_mc_add_or_free() and
ghes_mc_free(). Apart from better code readability the functions can
be reused and the implementation of the error paths becomes easier.
Signed-off-by: Robert Richter <rrichter@marvell.com>
---
drivers/edac/ghes_edac.c | 128 ++++++++++++++++++++++++---------------
1 file changed, 80 insertions(+), 48 deletions(-)
diff --git a/drivers/edac/ghes_edac.c b/drivers/edac/ghes_edac.c
index b72fe10b84d4..8329af037fbe 100644
--- a/drivers/edac/ghes_edac.c
+++ b/drivers/edac/ghes_edac.c
@@ -461,16 +461,83 @@ static struct acpi_platform_list plat_list[] = {
{ } /* End */
};
-int ghes_edac_register(struct ghes *ghes, struct device *dev)
+static struct mem_ctl_info *ghes_mc_create(struct device *dev, int mc_idx,
+ int num_dimm)
{
- bool fake = false;
- int rc = 0, num_dimm = 0;
+ struct edac_mc_layer layers[1];
struct mem_ctl_info *mci;
struct ghes_pvt *pvt;
- struct edac_mc_layer layers[1];
- struct dimm_fill dimm_fill;
+
+ layers[0].type = EDAC_MC_LAYER_ALL_MEM;
+ layers[0].size = num_dimm;
+ layers[0].is_virt_csrow = true;
+
+ mci = edac_mc_alloc(mc_idx, ARRAY_SIZE(layers), layers, sizeof(struct ghes_pvt));
+ if (!mci)
+ return NULL;
+
+ pvt = mci->pvt_info;
+ pvt->mci = mci;
+
+ mci->pdev = dev;
+ mci->mtype_cap = MEM_FLAG_EMPTY;
+ mci->edac_ctl_cap = EDAC_FLAG_NONE;
+ mci->edac_cap = EDAC_FLAG_NONE;
+ mci->mod_name = "ghes_edac.c";
+ mci->ctl_name = "ghes_edac";
+ mci->dev_name = "ghes";
+
+ return mci;
+}
+
+static void ghes_mc_destroy(struct mem_ctl_info *mci)
+{
+ if (mci)
+ edac_mc_free(mci);
+}
+
+static int ghes_mc_add(struct mem_ctl_info *mci)
+{
unsigned long flags;
- int idx = -1;
+ int rc;
+
+ rc = edac_mc_add_mc(mci);
+ if (rc < 0)
+ return rc;
+
+ spin_lock_irqsave(&ghes_lock, flags);
+ ghes_pvt = mci->pvt_info;
+ spin_unlock_irqrestore(&ghes_lock, flags);
+
+ return 0;
+}
+
+static struct mem_ctl_info *ghes_mc_del(void)
+{
+ struct mem_ctl_info *mci;
+ unsigned long flags;
+
+ /*
+ * Wait for the irq handler being finished.
+ */
+ spin_lock_irqsave(&ghes_lock, flags);
+ mci = ghes_pvt ? ghes_pvt->mci : NULL;
+ ghes_pvt = NULL;
+ spin_unlock_irqrestore(&ghes_lock, flags);
+
+ if (mci)
+ mci = edac_mc_del_mc(mci->pdev);
+
+ return mci;
+}
+
+int ghes_edac_register(struct ghes *ghes, struct device *dev)
+{
+ struct dimm_fill dimm_fill;
+ int rc = 0, num_dimm = 0;
+ struct mem_ctl_info *mci;
+ bool fake = false;
+ int idx;
if (IS_ENABLED(CONFIG_X86)) {
/* Check if safe to enable on this system */
@@ -499,28 +566,13 @@ int ghes_edac_register(struct ghes *ghes, struct device *dev)
num_dimm = 1;
}
- layers[0].type = EDAC_MC_LAYER_ALL_MEM;
- layers[0].size = num_dimm;
- layers[0].is_virt_csrow = true;
-
- mci = edac_mc_alloc(0, ARRAY_SIZE(layers), layers, sizeof(struct ghes_pvt));
+ mci = ghes_mc_create(dev, 0, num_dimm);
if (!mci) {
pr_info("Can't allocate memory for EDAC data\n");
rc = -ENOMEM;
goto unlock;
}
- pvt = mci->pvt_info;
- pvt->mci = mci;
-
- mci->pdev = dev;
- mci->mtype_cap = MEM_FLAG_EMPTY;
- mci->edac_ctl_cap = EDAC_FLAG_NONE;
- mci->edac_cap = EDAC_FLAG_NONE;
- mci->mod_name = "ghes_edac.c";
- mci->ctl_name = "ghes_edac";
- mci->dev_name = "ghes";
-
if (fake) {
pr_info("This system has a very crappy BIOS: It doesn't even list the DIMMS.\n");
pr_info("Its SMBIOS info is wrong. It is doubtful that the error report would\n");
@@ -548,18 +600,13 @@ int ghes_edac_register(struct ghes *ghes, struct device *dev)
dimm->edac_mode = EDAC_SECDED;
}
- rc = edac_mc_add_mc(mci);
+ rc = ghes_mc_add(mci);
if (rc < 0) {
pr_info("Can't register at EDAC core\n");
- edac_mc_free(mci);
- rc = -ENODEV;
+ ghes_mc_destroy(mci);
goto unlock;
}
- spin_lock_irqsave(&ghes_lock, flags);
- ghes_pvt = pvt;
- spin_unlock_irqrestore(&ghes_lock, flags);
-
/* only set on success */
refcount_set(&ghes_refcount, 1);
@@ -572,28 +619,13 @@ int ghes_edac_register(struct ghes *ghes, struct device *dev)
void ghes_edac_unregister(struct ghes *ghes)
{
struct mem_ctl_info *mci;
- unsigned long flags;
mutex_lock(&ghes_reg_mutex);
- if (!refcount_dec_and_test(&ghes_refcount))
- goto unlock;
-
- /*
- * Wait for the irq handler being finished.
- */
- spin_lock_irqsave(&ghes_lock, flags);
- mci = ghes_pvt ? ghes_pvt->mci : NULL;
- ghes_pvt = NULL;
- spin_unlock_irqrestore(&ghes_lock, flags);
-
- if (!mci)
- goto unlock;
-
- mci = edac_mc_del_mc(mci->pdev);
- if (mci)
- edac_mc_free(mci);
+ if (refcount_dec_and_test(&ghes_refcount)) {
+ mci = ghes_mc_del();
+ ghes_mc_destroy(mci);
+ }
-unlock:
mutex_unlock(&ghes_reg_mutex);
}
--
2.20.1
next prev parent reply other threads:[~2020-05-19 10:46 UTC|newest]
Thread overview: 6+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-05-19 10:44 [PATCH v3 0/5] EDAC/ghes: Cleanup and reworks Robert Richter
2020-05-19 10:44 ` [PATCH v3 1/5] EDAC/ghes: Remove unused members of struct ghes_edac_pvt, rename it to ghes_pvt Robert Richter
2020-05-19 10:44 ` [PATCH v3 2/5] EDAC/ghes: Cleanup struct dimm_fill Robert Richter
2020-05-19 10:44 ` Robert Richter [this message]
2020-05-19 10:44 ` [PATCH v3 4/5] EDAC/ghes: Have a separate code path for creating the fake MC Robert Richter
2020-05-19 10:44 ` [PATCH v3 5/5] EDAC/ghes: Carve out code into ghes_edac_register_{one,fake}() Robert Richter
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