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Wed, 23 Sep 2020 16:25:24 +0000 Date: Wed, 23 Sep 2020 11:25:10 -0500 From: Yazen Ghannam To: Borislav Petkov Cc: linux-edac@vger.kernel.org, linux-kernel@vger.kernel.org, tony.luck@intel.com, x86@kernel.org, Smita.KoralahalliChannabasappa@amd.com Subject: Re: [PATCH v2 8/8] x86/MCE/AMD Support new memory interleaving modes during address translation Message-ID: <20200923162510.GB1684790@yaz-nikka.amd.com> References: <20200903200144.310991-1-Yazen.Ghannam@amd.com> <20200903200144.310991-9-Yazen.Ghannam@amd.com> <20200923082039.GB28545@zn.tnic> Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20200923082039.GB28545@zn.tnic> X-ClientProxiedBy: SN1PR12CA0102.namprd12.prod.outlook.com (2603:10b6:802:21::37) To BN8PR12MB3108.namprd12.prod.outlook.com (2603:10b6:408:40::20) MIME-Version: 1.0 X-MS-Exchange-MessageSentRepresentingType: 1 Received: from yaz-nikka.amd.com (165.204.78.2) by SN1PR12CA0102.namprd12.prod.outlook.com (2603:10b6:802:21::37) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.3412.22 via Frontend Transport; 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X-MS-Exchange-AntiSpam-MessageData: Rwe93WzqTGN2SehrwENWQlHxbbow7feypJUhARLGrMQiK+HJleMFxLge5pbNT3uNeD1bLx3Sh5puZ6T/i02uYhsWf5me4oJ4TDfSpdxhNGif3zZBdWGhW8X5xI4FNf96UzgiQRrDw6ktQt9qYAYkVwzgJeI8OLxq2n4cmsPs199XdQQgPwRDuetSM6lZvLILQ/QjlXDJRGQN1IlqdLtSDQXhXewk4JRNj+bkY4dl5KhMd6VbMh41g6W+Fzng8z0ODaATeCJZxve6tZu94Hl0aHvT1wup5dFU4dQ95PZMa8ifPE3dQFFmumYKihHRcHWz2vJPByp+N7tTNltUFiYBuWYX0n4wk1klXmlgejmgT70x/xNT8VOvn5XQ/WLFi+BTVwJaPF17lt/B8f8oZq3hR8NRLNAT6fLwJlzVuWLItIiB2SqR58I7kGLejz1brkUpsV4GKsLWO6i0FhMdlf51txzZ37g32untWIeTzx+l1q2KujF/Tj2uhiWo3xvNnCCR3C+tJRQOk5caf4Y6ZrfZIEGJuIoiuNxsk+l+I/7k1xJ8Wh3BzjIhMm2wjfR9DvsSVSBJrNviFaU7TPC3rMpnwMdeY7j3Ph6xBJ9HPPy20NCgpH3dBxXpCZOWs/lf0XfbGYOn87bzw6kg93BciBuZkg== X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-Network-Message-Id: c9b20475-2c9d-469b-e381-08d85fdd45f9 X-MS-Exchange-CrossTenant-AuthSource: BN8PR12MB3108.namprd12.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-OriginalArrivalTime: 23 Sep 2020 16:25:24.4178 (UTC) X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-MailboxType: HOSTED X-MS-Exchange-CrossTenant-UserPrincipalName: ZIKzSWXB2Ek3APjJJWePhkhBI9rsUCoAJGOBXhXLheWpoNYesk09Z1qy785WjtGj46SRfE+7Ulu2KZpBeZl4Vg== X-MS-Exchange-Transport-CrossTenantHeadersStamped: BN6PR12MB1747 Precedence: bulk List-ID: X-Mailing-List: linux-edac@vger.kernel.org On Wed, Sep 23, 2020 at 10:20:39AM +0200, Borislav Petkov wrote: > On Thu, Sep 03, 2020 at 08:01:44PM +0000, Yazen Ghannam wrote: > > From: Muralidhara M K > > > > Add support for new memory interleaving modes used in current AMD systems. > > > > Check if the system is using a current Data Fabric version or a legacy > > version as some bit and register definitions have changed. > > > > Tested on AMD reference platforms with the following memory interleaving > > options. > > > > Naples > > - None > > - Channel > > - Die > > - Socket > > > > Rome (NPS = Nodes per Socket) > > - None > > - NPS0 > > - NPS1 > > - NPS2 > > - NPS4 > > > > The fixes tag refers to the commit that allows amd64_edac_mod to load on > > Rome systems. > > Err, why? This is adding new stuff to an address translation function. > How does that fix amd64_edac loading on Rome? > > > The module may report an incorrect system addresses on > > Rome systems depending on the interleaving option used. > > That doesn't stop it from loading, sorry. > Okay, no problem. > Now, before you guys do any new features, I'd like you to split this > humongous function umc_normaddr_to_sysaddr() logically into separate > helpers and each helper does exactly one thing and one thing only. > > Then use a verb in its name: umc_translate_normaddr_to_sysaddr() or so. > Okay, will do. > Also, Yazen, remind me again pls why isn't this function in > drivers/edac/amd64_edac.c, where it is needed? > > If the reason is not valid anymore, let's move it there before splitting > so that it doesn't bloat the core code. > I don't remember the original reason, and I was recently asked about this code living in a module. I did some looking after this ask, and I found that we should be using this translation to get a proper value for the memory error notifiers to use. So I think we still need to use this function some way with the core code even if the EDAC interface isn't used. I think this set can be split up. 1) Set with patches 1-3 fixed up to use cpu_die_id. 2) Set with the address translation updates. a) Move umc_normaddr_to_sysaddr() into a new module under EDAC. b) Hook the new module into amd64_edac.c where it's used today. c) Refactor the code as you suggested above. d) Add the new features. 3) New set that sets up a proper notifier for the address translation. a) Unhook the new module from amd64_edac.c. b) Register a notifer that runs before any notifiers that operate on memory errors. c) Find a way to pass the translated address through the chain without losing the original value. What do you think? Thanks, Yazen