From: Yazen Ghannam <yazen.ghannam@amd.com>
To: Borislav Petkov <bp@alien8.de>
Cc: linux-edac@vger.kernel.org, linux-kernel@vger.kernel.org,
Smita.KoralahalliChannabasappa@amd.com, wgh@torlan.ru
Subject: Re: [PATCH] EDAC/AMD64: Update scrub register addresses for newer models
Date: Wed, 20 Jan 2021 08:41:11 -0600 [thread overview]
Message-ID: <20210120144111.GB1385775@yaz-nikka.amd.com> (raw)
In-Reply-To: <20210118193112.GF30090@zn.tnic>
On Mon, Jan 18, 2021 at 08:31:12PM +0100, Borislav Petkov wrote:
> On Sat, Jan 16, 2021 at 02:33:53PM +0000, Yazen Ghannam wrote:
> > +static struct {
> > + u32 base, limit;
> > +} f17h_scrub_regs = {F17H_M30H_SCR_BASE_ADDR, F17H_M30H_SCR_LIMIT_ADDR};
>
> Why not make this part of struct amd64_umc so that you can access them
> through pvt->umc?
>
We have a struct amd64_umc per channel, so putting these fixed values
there seemed redundant. Would you mind if we put this in struct
amd64_family_type? We can then set the values per family/model group
like we do with the max_mcs.
Thanks,
Yazen
next prev parent reply other threads:[~2021-01-20 14:47 UTC|newest]
Thread overview: 6+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-01-16 14:33 [PATCH] EDAC/AMD64: Update scrub register addresses for newer models Yazen Ghannam
2021-01-18 1:30 ` WGH
2021-01-20 14:35 ` Yazen Ghannam
2021-01-18 19:31 ` Borislav Petkov
2021-01-20 14:41 ` Yazen Ghannam [this message]
2021-01-20 14:50 ` Borislav Petkov
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