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From: Yazen Ghannam <>
	Yazen Ghannam <>
Subject: [PATCH 0/2] AMD Zen-based IF Unit Poison Quirk
Date: Tue,  4 May 2021 17:47:10 +0000	[thread overview]
Message-ID: <> (raw)

From: Yazen Ghannam <>

The Instruction Fetch unit on AMD Zen-based systems has a
microarchitectural quirk in which RIPV is not set on poison consumption
errors. However, the error is guaranteed to be delivered before a
context switch. Therefore, the CS register can be considered valid.

Patch 1 handles this behavior. Patch 2 addresses fallout from the change
in behavior in Patch 1.

Both patches Cc: stable because there have been bug reports that seem to
exhibit this behavior. There are no Fixes tags, because I don't think we
can point to specific commits that introduced this issue.


Yazen Ghannam (2):
  x86/MCE: Always save CS register on AMD Zen IF errors
  x86/MCE: Don't call kill_me_now() directly

 arch/x86/kernel/cpu/mce/amd.c      | 17 +++++++++++++++++
 arch/x86/kernel/cpu/mce/core.c     | 12 ++++++++----
 arch/x86/kernel/cpu/mce/internal.h |  2 ++
 3 files changed, 27 insertions(+), 4 deletions(-)


             reply	other threads:[~2021-05-04 17:48 UTC|newest]

Thread overview: 5+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-05-04 17:47 Yazen Ghannam [this message]
2021-05-04 17:47 ` [PATCH 1/2] x86/MCE: Always save CS register on AMD Zen IF errors Yazen Ghannam
2021-05-04 17:47 ` [PATCH 2/2] x86/MCE: Don't call kill_me_now() directly Yazen Ghannam
2021-05-04 18:07   ` Luck, Tony
2021-05-04 18:29     ` Yazen Ghannam

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