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From: Yazen Ghannam <yazen.ghannam@amd.com>
To: linux-edac@vger.kernel.org
Cc: linux-kernel@vger.kernel.org, bp@alien8.de, mchehab@kernel.org,
	tony.luck@intel.com, Smita.KoralahalliChannabasappa@amd.com,
	Yazen Ghannam <yazen.ghannam@amd.com>
Subject: [PATCH v2 22/31] EDAC/amd64: Define function to make space for CS ID
Date: Wed, 23 Jun 2021 19:19:53 +0000	[thread overview]
Message-ID: <20210623192002.3671647-23-yazen.ghannam@amd.com> (raw)
In-Reply-To: <20210623192002.3671647-1-yazen.ghannam@amd.com>

Move code that makes a gap for the CS ID into a separate helper function.
The exact bits to use vary based on interleaving mode. New interleaving
modes in future DF versions will be added as new cases.

Also, introduce a helper function that does the bit manipulation to make
the gap. The current version of this function is "simple", and future
interleaving modes may reuse this or use a more advanced function.

Signed-off-by: Yazen Ghannam <yazen.ghannam@amd.com>
---
Link:
https://lkml.kernel.org/r/20210507190140.18854-19-Yazen.Ghannam@amd.com

v1->v2:
* Moved from arch/x86 to EDAC.
* Added new function pointer to ctx struct.

 drivers/edac/amd64_edac.c | 37 +++++++++++++++++++++++++++++--------
 1 file changed, 29 insertions(+), 8 deletions(-)

diff --git a/drivers/edac/amd64_edac.c b/drivers/edac/amd64_edac.c
index e5c296b00f5c..b497af7c3561 100644
--- a/drivers/edac/amd64_edac.c
+++ b/drivers/edac/amd64_edac.c
@@ -1102,6 +1102,7 @@ struct addr_ctx {
 	u8 intlv_num_sockets;
 	u8 cs_id;
 	int (*dehash_addr)(struct addr_ctx *ctx);
+	void (*make_space_for_cs_id)(struct addr_ctx *ctx);
 };
 
 struct data_fabric_ops {
@@ -1111,6 +1112,29 @@ struct data_fabric_ops {
 	void (*get_intlv_num_sockets)(struct addr_ctx *ctx);
 };
 
+static void expand_bits(u8 start_bit, u8 num_bits, u64 *value)
+{
+	u64 temp1, temp2;
+
+	if (start_bit == 0) {
+		*value <<= num_bits;
+		return;
+	}
+
+	temp1 = *value & GENMASK_ULL(start_bit - 1, 0);
+	temp2 = (*value & GENMASK_ULL(63, start_bit)) << num_bits;
+	*value = temp1 | temp2;
+}
+
+static void make_space_for_cs_id_simple(struct addr_ctx *ctx)
+{
+	u8 num_intlv_bits = ctx->intlv_num_chan;
+
+	num_intlv_bits += ctx->intlv_num_dies;
+	num_intlv_bits += ctx->intlv_num_sockets;
+	expand_bits(ctx->intlv_addr_bit, num_intlv_bits, &ctx->ret_addr);
+}
+
 static u64 get_hi_addr_offset_df2(struct addr_ctx *ctx)
 {
 	return (ctx->reg_dram_offset & GENMASK_ULL(31, 20)) << 8;
@@ -1141,6 +1165,8 @@ static int get_intlv_mode_df2(struct addr_ctx *ctx)
 		ctx->dehash_addr = &dehash_addr_df2;
 	}
 
+	ctx->make_space_for_cs_id = &make_space_for_cs_id_simple;
+
 	if (ctx->intlv_mode != NONE &&
 	    ctx->intlv_mode != NOHASH_2CH &&
 	    ctx->intlv_mode != DF2_HASH_2CH)
@@ -1278,13 +1304,11 @@ static int denormalize_addr(struct addr_ctx *ctx)
 	df_ops->get_intlv_num_dies(ctx);
 	df_ops->get_intlv_num_sockets(ctx);
 
-	num_intlv_bits = ctx->intlv_num_chan;
-	num_intlv_bits += ctx->intlv_num_dies;
-	num_intlv_bits += ctx->intlv_num_sockets;
+	ctx->make_space_for_cs_id(ctx);
 
 	if (num_intlv_bits > 0) {
-		u64 temp_addr_x, temp_addr_i, temp_addr_y;
 		u8 die_id_bit, sock_id_bit, cs_fabric_id;
+		u64 temp_addr_i;
 
 		/*
 		 * Read FabricBlockInstanceInformation3_CS[BlockFabricID].
@@ -1340,11 +1364,8 @@ static int denormalize_addr(struct addr_ctx *ctx)
 		 * bits there are. "intlv_addr_bit" tells us how many "Y" bits
 		 * there are (where "I" starts).
 		 */
-		temp_addr_y = ctx->ret_addr & GENMASK_ULL(ctx->intlv_addr_bit - 1, 0);
 		temp_addr_i = (ctx->cs_id << ctx->intlv_addr_bit);
-		temp_addr_x = (ctx->ret_addr & GENMASK_ULL(63, ctx->intlv_addr_bit))
-			       << num_intlv_bits;
-		ctx->ret_addr    = temp_addr_x | temp_addr_i | temp_addr_y;
+		ctx->ret_addr |= temp_addr_i;
 	}
 
 	return 0;
-- 
2.25.1


  parent reply	other threads:[~2021-06-23 19:21 UTC|newest]

Thread overview: 45+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-06-23 19:19 [PATCH v2 00/31] AMD MCA Address Translation Updates Yazen Ghannam
2021-06-23 19:19 ` [PATCH v2 01/31] x86/MCE/AMD, EDAC/amd64: Move address translation to AMD64 EDAC Yazen Ghannam
2021-06-23 19:19 ` [PATCH v2 02/31] x86/amd_nb, EDAC/amd64: Move DF Indirect Read " Yazen Ghannam
2021-06-23 19:19 ` [PATCH v2 03/31] EDAC/amd64: Don't use naked values for DF registers Yazen Ghannam
2021-06-25 15:21   ` Borislav Petkov
2021-07-08 19:35     ` Yazen Ghannam
2021-06-23 19:19 ` [PATCH v2 04/31] EDAC/amd64: Allow for DF Indirect Broadcast reads Yazen Ghannam
2021-06-30 16:22   ` Borislav Petkov
2021-07-08 19:44     ` Yazen Ghannam
2021-06-23 19:19 ` [PATCH v2 05/31] EDAC/amd64: Add context struct Yazen Ghannam
2021-06-30 17:17   ` Borislav Petkov
2021-07-08 19:53     ` Yazen Ghannam
2021-06-23 19:19 ` [PATCH v2 06/31] EDAC/amd64: Define Data Fabric operations Yazen Ghannam
2021-06-30 17:19   ` Borislav Petkov
2021-07-08 19:55     ` Yazen Ghannam
2021-06-23 19:19 ` [PATCH v2 07/31] EDAC/amd64: Define functions for DramOffset Yazen Ghannam
2021-06-30 17:27   ` Borislav Petkov
2021-07-08 20:08     ` Yazen Ghannam
2021-06-23 19:19 ` [PATCH v2 08/31] EDAC/amd64: Define function to read DRAM address map registers Yazen Ghannam
2021-06-30 17:29   ` Borislav Petkov
2021-06-23 19:19 ` [PATCH v2 09/31] EDAC/amd64: Define function to find interleaving mode Yazen Ghannam
2021-06-30 17:33   ` Borislav Petkov
2021-07-08 20:09     ` Yazen Ghannam
2021-06-23 19:19 ` [PATCH v2 10/31] EDAC/amd64: Define function to denormalize address Yazen Ghannam
2021-06-23 19:19 ` [PATCH v2 11/31] EDAC/amd64: Define function to add DRAM base and hole Yazen Ghannam
2021-06-23 19:19 ` [PATCH v2 12/31] EDAC/amd64: Define function to dehash address Yazen Ghannam
2021-06-23 19:19 ` [PATCH v2 13/31] EDAC/amd64: Define function to check DRAM limit address Yazen Ghannam
2021-06-23 19:19 ` [PATCH v2 14/31] EDAC/amd64: Remove goto statements Yazen Ghannam
2021-06-23 19:19 ` [PATCH v2 15/31] EDAC/amd64: Simplify function parameters Yazen Ghannam
2021-06-23 19:19 ` [PATCH v2 16/31] EDAC/amd64: Define function to get Interleave Address Bit Yazen Ghannam
2021-06-23 19:19 ` [PATCH v2 17/31] EDAC/amd64: Skip denormalization if no interleaving Yazen Ghannam
2021-06-23 19:19 ` [PATCH v2 18/31] EDAC/amd64: Define function to get number of interleaved channels Yazen Ghannam
2021-06-23 19:19 ` [PATCH v2 19/31] EDAC/amd64: Define function to get number of interleaved dies Yazen Ghannam
2021-06-23 19:19 ` [PATCH v2 20/31] EDAC/amd64: Define function to get number of interleaved sockets Yazen Ghannam
2021-06-23 19:19 ` [PATCH v2 21/31] EDAC/amd64: Remove unnecessary assert Yazen Ghannam
2021-06-23 19:19 ` Yazen Ghannam [this message]
2021-06-23 19:19 ` [PATCH v2 23/31] EDAC/amd64: Define function to calculate CS ID Yazen Ghannam
2021-06-23 19:19 ` [PATCH v2 24/31] EDAC/amd64: Define function to insert CS ID into address Yazen Ghannam
2021-06-23 19:19 ` [PATCH v2 25/31] EDAC/amd64: Define function to get CS Fabric ID Yazen Ghannam
2021-06-23 19:19 ` [PATCH v2 26/31] EDAC/amd64: Define function to find shift and mask values Yazen Ghannam
2021-06-23 19:19 ` [PATCH v2 27/31] EDAC/amd64: Update CS ID calculation to match reference code Yazen Ghannam
2021-06-23 19:19 ` [PATCH v2 28/31] EDAC/amd64: Match hash function to " Yazen Ghannam
2021-06-23 19:20 ` [PATCH v2 29/31] EDAC/amd64: Define helper function to get interleave address select bit Yazen Ghannam
2021-06-23 19:20 ` [PATCH v2 30/31] EDAC/amd64: Add support for address translation on DF3 systems Yazen Ghannam
2021-06-23 19:20 ` [PATCH v2 31/31] EDAC/amd64: Add glossary of acronyms for address translation Yazen Ghannam

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