From: Yazen Ghannam <yazen.ghannam@amd.com>
To: <linux-edac@vger.kernel.org>
Cc: <linux-kernel@vger.kernel.org>, <bp@alien8.de>,
<mchehab@kernel.org>, <tony.luck@intel.com>,
<james.morse@arm.com>, <rric@kernel.org>,
<Smita.KoralahalliChannabasappa@amd.com>,
<NaveenKrishna.Chatradhi@amd.com>, <Muralidhara.MK@amd.com>,
Yazen Ghannam <yazen.ghannam@amd.com>
Subject: [PATCH v3 17/33] EDAC/amd64: Define function to get number of interleaved channels
Date: Thu, 28 Oct 2021 17:57:12 +0000 [thread overview]
Message-ID: <20211028175728.121452-18-yazen.ghannam@amd.com> (raw)
In-Reply-To: <20211028175728.121452-1-yazen.ghannam@amd.com>
Move number of interleaved channel calculation to a separate helper
function. Drop unused cases.
Signed-off-by: Yazen Ghannam <yazen.ghannam@amd.com>
---
Link:
https://lkml.kernel.org/r/20210623192002.3671647-19-yazen.ghannam@amd.com
v2->v3:
* Was patch 18 in v2.
v1->v2:
* Moved from arch/x86 to EDAC.
drivers/edac/amd64_edac.c | 42 +++++++++++++++++++++------------------
1 file changed, 23 insertions(+), 19 deletions(-)
diff --git a/drivers/edac/amd64_edac.c b/drivers/edac/amd64_edac.c
index b6a8366e40ba..11a54e7a0432 100644
--- a/drivers/edac/amd64_edac.c
+++ b/drivers/edac/amd64_edac.c
@@ -1068,6 +1068,7 @@ struct addr_ctx {
u8 inst_id;
u8 map_num;
u8 intlv_addr_bit;
+ u8 intlv_num_chan;
u8 cs_id;
int (*dehash_addr)(struct addr_ctx *ctx);
};
@@ -1187,10 +1188,27 @@ static int get_intlv_addr_bit(struct addr_ctx *ctx)
return 0;
}
+static void get_intlv_num_chan(struct addr_ctx *ctx)
+{
+ /* Save the log2(# of channels). */
+ switch (ctx->intlv_mode) {
+ case NONE:
+ ctx->intlv_num_chan = 0;
+ break;
+ case NOHASH_2CH:
+ case DF2_HASH_2CH:
+ ctx->intlv_num_chan = 1;
+ break;
+ default:
+ /* Valid interleaving modes where checked earlier. */
+ break;
+ }
+}
+
static int denormalize_addr(struct addr_ctx *ctx)
{
u8 die_id_shift, die_id_mask, socket_id_shift, socket_id_mask;
- u8 intlv_num_dies, intlv_num_chan, intlv_num_sockets;
+ u8 intlv_num_dies, intlv_num_sockets;
u8 num_intlv_bits, cs_mask = 0;
/* Return early if no interleaving. */
@@ -1203,23 +1221,9 @@ static int denormalize_addr(struct addr_ctx *ctx)
intlv_num_sockets = (ctx->reg_limit_addr >> 8) & 0x1;
intlv_num_dies = (ctx->reg_limit_addr >> 10) & 0x3;
- /* Re-use intlv_num_chan by setting it equal to log2(#channels) */
- switch (intlv_num_chan) {
- case 0: intlv_num_chan = 0; break;
- case 1: intlv_num_chan = 1; break;
- case 3: intlv_num_chan = 2; break;
- case 5: intlv_num_chan = 3; break;
- case 7: intlv_num_chan = 4; break;
-
- case 8: intlv_num_chan = 1;
- break;
- default:
- pr_err("%s: Invalid number of interleaved channels %d.\n",
- __func__, intlv_num_chan);
- return -EINVAL;
- }
+ get_intlv_num_chan(ctx);
- num_intlv_bits = intlv_num_chan;
+ num_intlv_bits = ctx->intlv_num_chan;
if (intlv_num_dies > 2) {
pr_err("%s: Invalid number of interleaved nodes/dies %d.\n",
@@ -1256,8 +1260,8 @@ static int denormalize_addr(struct addr_ctx *ctx)
die_id_bit = 0;
/* If interleaved over more than 1 channel: */
- if (intlv_num_chan) {
- die_id_bit = intlv_num_chan;
+ if (ctx->intlv_num_chan) {
+ die_id_bit = ctx->intlv_num_chan;
cs_mask = (1 << die_id_bit) - 1;
ctx->cs_id = cs_fabric_id & cs_mask;
}
--
2.25.1
next prev parent reply other threads:[~2021-10-28 17:59 UTC|newest]
Thread overview: 34+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-10-28 17:56 [PATCH v3 00/33] AMD MCA Address Translation Updates Yazen Ghannam
2021-10-28 17:56 ` [PATCH v3 01/33] x86/MCE/AMD, EDAC/amd64: Move address translation to AMD64 EDAC Yazen Ghannam
2021-10-28 17:56 ` [PATCH v3 02/33] x86/amd_nb, EDAC/amd64: Move DF Indirect Read " Yazen Ghannam
2021-10-28 17:56 ` [PATCH v3 03/33] EDAC/amd64: Allow for DF Indirect Broadcast reads Yazen Ghannam
2021-10-28 17:56 ` [PATCH v3 04/33] EDAC/amd64: Add context struct Yazen Ghannam
2021-10-28 17:57 ` [PATCH v3 05/33] EDAC/amd64: Define Data Fabric operations Yazen Ghannam
2021-10-28 17:57 ` [PATCH v3 06/33] EDAC/amd64: Define functions for DramOffset Yazen Ghannam
2021-10-28 17:57 ` [PATCH v3 07/33] EDAC/amd64: Define function to read DRAM address map registers Yazen Ghannam
2021-10-28 17:57 ` [PATCH v3 08/33] EDAC/amd64: Define function to find interleaving mode Yazen Ghannam
2021-10-28 17:57 ` [PATCH v3 09/33] EDAC/amd64: Define function to denormalize address Yazen Ghannam
2021-10-28 17:57 ` [PATCH v3 10/33] EDAC/amd64: Define function to add DRAM base and hole Yazen Ghannam
2021-10-28 17:57 ` [PATCH v3 11/33] EDAC/amd64: Define function to dehash address Yazen Ghannam
2021-10-28 17:57 ` [PATCH v3 12/33] EDAC/amd64: Define function to check DRAM limit address Yazen Ghannam
2021-10-28 17:57 ` [PATCH v3 13/33] EDAC/amd64: Remove goto statements Yazen Ghannam
2021-10-28 17:57 ` [PATCH v3 14/33] EDAC/amd64: Simplify function parameters Yazen Ghannam
2021-10-28 17:57 ` [PATCH v3 15/33] EDAC/amd64: Define function to get Interleave Address Bit Yazen Ghannam
2021-10-28 17:57 ` [PATCH v3 16/33] EDAC/amd64: Skip denormalization if no interleaving Yazen Ghannam
2021-10-28 17:57 ` Yazen Ghannam [this message]
2021-10-28 17:57 ` [PATCH v3 18/33] EDAC/amd64: Define function to get number of interleaved dies Yazen Ghannam
2021-10-28 17:57 ` [PATCH v3 19/33] EDAC/amd64: Define function to get number of interleaved sockets Yazen Ghannam
2021-10-28 17:57 ` [PATCH v3 20/33] EDAC/amd64: Remove unnecessary assert Yazen Ghannam
2021-10-28 17:57 ` [PATCH v3 21/33] EDAC/amd64: Define function to make space for CS ID Yazen Ghannam
2021-10-28 17:57 ` [PATCH v3 22/33] EDAC/amd64: Define function to calculate " Yazen Ghannam
2021-10-28 17:57 ` [PATCH v3 23/33] EDAC/amd64: Define function to insert CS ID into address Yazen Ghannam
2021-10-28 17:57 ` [PATCH v3 24/33] EDAC/amd64: Define function to get CS Fabric ID Yazen Ghannam
2021-10-28 17:57 ` [PATCH v3 25/33] EDAC/amd64: Define function to find shift and mask values Yazen Ghannam
2021-10-28 17:57 ` [PATCH v3 26/33] EDAC/amd64: Update CS ID calculation to match reference code Yazen Ghannam
2021-10-28 17:57 ` [PATCH v3 27/33] EDAC/amd64: Match hash function to " Yazen Ghannam
2021-10-28 17:57 ` [PATCH v3 28/33] EDAC/amd64: Define function to get interleave address select bit Yazen Ghannam
2021-10-28 17:57 ` [PATCH v3 29/33] EDAC/amd64: Add support for address translation on DF3 systems Yazen Ghannam
2021-10-28 17:57 ` [PATCH v3 30/33] EDAC/amd64: Add glossary of acronyms for address translation Yazen Ghannam
2021-10-28 17:57 ` [PATCH v3 31/33] EDAC/amd64: Add check for when to add DRAM base and hole Yazen Ghannam
2021-10-28 17:57 ` [PATCH v3 32/33] EDAC/amd64: Save the number of block instances Yazen Ghannam
2021-10-28 17:57 ` [PATCH v3 33/33] EDAC/amd64: Add address translation support for DF3.5 Yazen Ghannam
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