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From: Serge Semin <Sergey.Semin@baikalelectronics.ru>
To: Rob Herring <robh+dt@kernel.org>,
	Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
	Michal Simek <michal.simek@xilinx.com>,
	Borislav Petkov <bp@alien8.de>,
	Mauro Carvalho Chehab <mchehab@kernel.org>,
	Tony Luck <tony.luck@intel.com>,
	James Morse <james.morse@arm.com>,
	Robert Richter <rric@kernel.org>
Cc: Serge Semin <Sergey.Semin@baikalelectronics.ru>,
	Serge Semin <fancer.lancer@gmail.com>,
	Alexey Malahov <Alexey.Malahov@baikalelectronics.ru>,
	Michail Ivanov <Michail.Ivanov@baikalelectronics.ru>,
	Pavel Parkhomenko <Pavel.Parkhomenko@baikalelectronics.ru>,
	Punnaiah Choudary Kalluri  <punnaiah.choudary.kalluri@xilinx.com>,
	Manish Narani <manish.narani@xilinx.com>,
	Dinh Nguyen <dinguyen@kernel.org>, Rob Herring <robh@kernel.org>,
	Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>,
	<devicetree@vger.kernel.org>,
	<linux-arm-kernel@lists.infradead.org>,
	<linux-edac@vger.kernel.org>, <linux-kernel@vger.kernel.org>
Subject: [PATCH v2 15/15] EDAC/synopsys: Add Baikal-T1 DDRC support
Date: Sat, 10 Sep 2022 22:56:59 +0300	[thread overview]
Message-ID: <20220910195659.11843-16-Sergey.Semin@baikalelectronics.ru> (raw)
In-Reply-To: <20220910195659.11843-1-Sergey.Semin@baikalelectronics.ru>

Baikal-T1 SoC is equipped with the DW uMCTl2 DDRC of v2.61a with 32-bit
DQ-bus accepting DDR2/DDR3 SDRAMs of up to 2 ranks, 1:2 HIF/SDRAM clocks
rate ratio, HIF interface burst length of 8 Full DQ-bus words, 40-bit
System/Application address width and 128-bits data width, 3 System address
regions with block size 256MB. There is SEC/DED ECC capability with Scrub
(RMW) and Scrubber features.

Since the Baikal-T1 DDR controller is capable of the ECC let's add it to
the DW uMCTL2 DDRC EDAC driver. The most of the parameters above will be
autodetected except HIF burst length and SAR block size, which will be set
by means of the Baikal-T1-specific initialization method. The controller
compatible string "baikal,bt1-ddrc" will be used to attach the driver to
the kernel device. It's chosen in accordance with the just updated
DT-bindings.

Signed-off-by: Serge Semin <Sergey.Semin@baikalelectronics.ru>
---
 drivers/edac/synopsys_edac.c | 15 +++++++++++++++
 1 file changed, 15 insertions(+)

diff --git a/drivers/edac/synopsys_edac.c b/drivers/edac/synopsys_edac.c
index 0a00e80ddeb9..24cd8f23242a 100644
--- a/drivers/edac/synopsys_edac.c
+++ b/drivers/edac/synopsys_edac.c
@@ -1342,6 +1342,20 @@ static int zynqmp_init_plat(struct snps_edac_priv *priv)
 	return 0;
 }
 
+/*
+ * bt1_init_plat - Baikal-T1-specific platform initialization.
+ * @priv:	DDR memory controller private data.
+ *
+ * Return: always zero.
+ */
+static int bt1_init_plat(struct snps_edac_priv *priv)
+{
+	priv->info.hif_burst_len = SNPS_DDR_BL8;
+	priv->sys_app_map.minsize = DDR_MIN_SARSIZE;
+
+	return 0;
+}
+
 /**
  * snps_get_dtype - Return the controller memory width.
  * @mstr:	Master CSR value.
@@ -2470,6 +2484,7 @@ static int snps_mc_remove(struct platform_device *pdev)
 
 static const struct of_device_id snps_edac_match[] = {
 	{ .compatible = "xlnx,zynqmp-ddrc-2.40a", .data = zynqmp_init_plat },
+	{ .compatible = "baikal,bt1-ddrc", .data = bt1_init_plat },
 	{ .compatible = "snps,ddrc-3.80a" },
 	{ }
 };
-- 
2.37.2


      parent reply	other threads:[~2022-09-10 19:59 UTC|newest]

Thread overview: 26+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-09-10 19:56 [PATCH v2 00/15] EDAC/synopsys: Add generic resources and Baikal-T1 support Serge Semin
2022-09-10 19:56 ` [PATCH v2 01/15] dt-bindings: memory: snps: Replace opencoded numbers with macros Serge Semin
2022-09-12 14:18   ` Rob Herring
2022-09-21 18:35   ` (subset) " Krzysztof Kozlowski
2022-09-10 19:56 ` [PATCH v2 02/15] dt-bindings: memory: snps: Extend schema with IRQs/resets/clocks props Serge Semin
2022-09-12 14:20   ` Rob Herring
2022-09-21 18:35   ` (subset) " Krzysztof Kozlowski
2022-09-10 19:56 ` [PATCH v2 03/15] dt-bindings: memory: snps: Convert the schema to being generic Serge Semin
2022-09-12 14:32   ` Rob Herring
2022-09-26 10:56     ` Serge Semin
2022-09-27 22:02       ` Rob Herring
2022-09-28 10:39         ` Serge Semin
2022-09-10 19:56 ` [PATCH v2 04/15] dt-bindings: memory: Add Baikal-T1 DDRC DT-schema Serge Semin
2022-09-12  0:44   ` Rob Herring
2022-09-12 15:01   ` Rob Herring
2022-09-10 19:56 ` [PATCH v2 05/15] EDAC/synopsys: Add multi-ranked memory support Serge Semin
2022-09-10 19:56 ` [PATCH v2 06/15] EDAC/synopsys: Add optional ECC Scrub support Serge Semin
2022-09-10 19:56 ` [PATCH v2 07/15] EDAC/synopsys: Drop ECC poison address from private data Serge Semin
2022-09-10 19:56 ` [PATCH v2 08/15] EDAC/synopsys: Add data poisoning disable support Serge Semin
2022-09-10 19:56 ` [PATCH v2 09/15] EDAC/synopsys: Split up ECC UE/CE IRQs handler Serge Semin
2022-09-10 19:56 ` [PATCH v2 10/15] EDAC/synopsys: Add individual named ECC IRQs support Serge Semin
2022-09-10 19:56 ` [PATCH v2 11/15] EDAC/synopsys: Add DFI alert_n IRQ support Serge Semin
2022-09-10 19:56 ` [PATCH v2 12/15] EDAC/synopsys: Add reference clocks support Serge Semin
2022-09-10 19:56 ` [PATCH v2 13/15] EDAC/synopsys: Add ECC Scrubber support Serge Semin
2022-09-10 19:56 ` [PATCH v2 14/15] EDAC/synopsys: Drop vendor-specific arch dependency Serge Semin
2022-09-10 19:56 ` Serge Semin [this message]

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