From: niravkumar.l.rabara@intel.com
To: Dinh Nguyen <dinguyen@kernel.org>, Borislav Petkov <bp@alien8.de>,
Tony Luck <tony.luck@intel.com>,
James Morse <james.morse@arm.com>,
Mauro Carvalho Chehab <mchehab@kernel.org>,
Robert Richter <rric@kernel.org>,
linux-edac@vger.kernel.org
Cc: linux-kernel@vger.kernel.org,
Niravkumar L Rabara <niravkumar.l.rabara@intel.com>
Subject: [PATCH 0/2] EDAC/altera: Check previous DDR DBE during driver probe
Date: Wed, 3 May 2023 11:06:22 +0800 [thread overview]
Message-ID: <20230503030622.3269205-1-niravkumar.l.rabara@intel.com> (raw)
From: Niravkumar L Rabara <niravkumar.l.rabara@intel.com>
Starting from SoCFPGA Agilex7, new SDM mailbox command is introduced
to read Single Event Update Error information, SEU detects both
corrected and uncorrected error.
If the previous HPS reboot caused by the DDR double bit error, bit-31 is
set high of boot scratch register 8. EDAC driver probe will check this
bit status and sends the SMC command to Arm Trusted Firmware.
Firmware will send mailbox command to SDM to get the SEU error
information and pass it to EDAC driver, driver will print error count,
sector address and error data for previous DDR DBE.
Niravkumar L Rabara (2):
firmware: stratix10-svc: Add command to get SEU error info
EDAC/altera: Check previous DDR DBE during driver probe
drivers/edac/altera_edac.c | 29 ++++++++++++++++----
include/linux/firmware/intel/stratix10-smc.h | 20 ++++++++++++++
2 files changed, 44 insertions(+), 5 deletions(-)
--
2.25.1
next reply other threads:[~2023-05-03 3:06 UTC|newest]
Thread overview: 2+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-05-03 3:06 niravkumar.l.rabara [this message]
2023-05-03 6:09 [PATCH 0/2] EDAC/altera: Check previous DDR DBE during driver probe niravkumar.l.rabara
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