* [RFC v2 0/5] arm64 / clk: socfpga: simplifying, cleanups and compile testing
@ 2021-03-10 8:33 Krzysztof Kozlowski
2021-03-10 8:33 ` [RFC v2 1/5] clk: socfpga: allow building N5X clocks with ARCH_N5X Krzysztof Kozlowski
` (2 more replies)
0 siblings, 3 replies; 18+ messages in thread
From: Krzysztof Kozlowski @ 2021-03-10 8:33 UTC (permalink / raw)
To: Catalin Marinas, Will Deacon, Dinh Nguyen, Rob Herring,
Michael Turquette, Stephen Boyd, Moritz Fischer, Tom Rix,
Lee Jones, linux-arm-kernel, linux-kernel, devicetree, linux-clk,
linux-edac, linux-fpga, netdev, linux-stm32, arm, soc,
Arnd Bergmann, Olof Johansson
Cc: Krzysztof Kozlowski
Hi,
All three Intel arm64 SoCFPGA architectures (Agilex, N5X and Stratix 10)
are basically flavors/platforms of the same architecture. At least from
the Linux point of view. Up to a point that N5X and Agilex share DTSI.
Having three top-level architectures for the same one barely makes
sense and complicates driver selection.
Try to unify them.
Changes since v1:
=================
1. New patch 3/5: arm64: socfpga: rename ARCH_STRATIX10 to ARCH_SOCFPGA64
2. New patch 4/5: arm64: intel: merge Agilex and N5X into ARCH_SOCFPGA64
3. Fix build issue reported by kernel test robot (with ARCH_STRATIX10
and COMPILE_TEST but without selecting some of the clocks).
I tested compile builds on few configurations, so I hope kbuild 0-day
will check more options (please give it few days on the lists).
Best regards,
Krzysztof
Krzysztof Kozlowski (5):
clk: socfpga: allow building N5X clocks with ARCH_N5X
clk: socfpga: build together Stratix 10, Agilex and N5X clock drivers
arm64: socfpga: rename ARCH_STRATIX10 to ARCH_SOCFPGA64
arm64: intel: merge Agilex and N5X into ARCH_SOCFPGA64
clk: socfpga: allow compile testing of Stratix 10 / Agilex clocks
arch/arm64/Kconfig.platforms | 17 ++++-------------
arch/arm64/boot/dts/altera/Makefile | 2 +-
arch/arm64/boot/dts/intel/Makefile | 6 +++---
arch/arm64/configs/defconfig | 3 +--
drivers/clk/Kconfig | 1 +
drivers/clk/Makefile | 4 +---
drivers/clk/socfpga/Kconfig | 17 +++++++++++++++++
drivers/clk/socfpga/Makefile | 7 +++----
drivers/edac/Kconfig | 2 +-
drivers/edac/altera_edac.c | 10 +++++-----
drivers/firmware/Kconfig | 2 +-
drivers/fpga/Kconfig | 2 +-
drivers/mfd/Kconfig | 2 +-
drivers/net/ethernet/stmicro/stmmac/Kconfig | 4 ++--
drivers/reset/Kconfig | 2 +-
15 files changed, 43 insertions(+), 38 deletions(-)
create mode 100644 drivers/clk/socfpga/Kconfig
--
2.25.1
^ permalink raw reply [flat|nested] 18+ messages in thread* [RFC v2 1/5] clk: socfpga: allow building N5X clocks with ARCH_N5X 2021-03-10 8:33 [RFC v2 0/5] arm64 / clk: socfpga: simplifying, cleanups and compile testing Krzysztof Kozlowski @ 2021-03-10 8:33 ` Krzysztof Kozlowski 2021-03-10 8:33 ` [RFC v2 2/5] clk: socfpga: build together Stratix 10, Agilex and N5X clock drivers Krzysztof Kozlowski 2021-03-10 8:38 ` [RFC v2 3/5] arm64: socfpga: rename ARCH_STRATIX10 to ARCH_SOCFPGA64 Krzysztof Kozlowski 2 siblings, 0 replies; 18+ messages in thread From: Krzysztof Kozlowski @ 2021-03-10 8:33 UTC (permalink / raw) To: Catalin Marinas, Will Deacon, Dinh Nguyen, Rob Herring, Michael Turquette, Stephen Boyd, Moritz Fischer, Tom Rix, Lee Jones, linux-arm-kernel, linux-kernel, devicetree, linux-clk, linux-edac, linux-fpga, netdev, linux-stm32, arm, soc, Arnd Bergmann, Olof Johansson Cc: Krzysztof Kozlowski The Intel's eASIC N5X (ARCH_N5X) architecture shares a lot with Agilex (ARCH_AGILEX) so it uses the same socfpga_agilex.dtsi, with minor changes. Also the clock drivers are the same. However the clock drivers won't be build without ARCH_AGILEX. One could assume that ARCH_N5X simply depends on ARCH_AGILEX but this was not modeled in Kconfig. In current stage the ARCH_N5X is simply unbootable. Add a separate Kconfig entry for clocks used by both ARCH_N5X and ARCH_AGILEX so the necessary objects will be built if either of them is selected. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com> --- drivers/clk/Kconfig | 1 + drivers/clk/Makefile | 1 + drivers/clk/socfpga/Kconfig | 6 ++++++ drivers/clk/socfpga/Makefile | 4 ++-- 4 files changed, 10 insertions(+), 2 deletions(-) create mode 100644 drivers/clk/socfpga/Kconfig diff --git a/drivers/clk/Kconfig b/drivers/clk/Kconfig index a588d56502d4..1d1891b9cad2 100644 --- a/drivers/clk/Kconfig +++ b/drivers/clk/Kconfig @@ -394,6 +394,7 @@ source "drivers/clk/renesas/Kconfig" source "drivers/clk/rockchip/Kconfig" source "drivers/clk/samsung/Kconfig" source "drivers/clk/sifive/Kconfig" +source "drivers/clk/socfpga/Kconfig" source "drivers/clk/sprd/Kconfig" source "drivers/clk/sunxi/Kconfig" source "drivers/clk/sunxi-ng/Kconfig" diff --git a/drivers/clk/Makefile b/drivers/clk/Makefile index b22ae4f81e0b..12e46b12e587 100644 --- a/drivers/clk/Makefile +++ b/drivers/clk/Makefile @@ -106,6 +106,7 @@ obj-$(CONFIG_COMMON_CLK_SAMSUNG) += samsung/ obj-$(CONFIG_CLK_SIFIVE) += sifive/ obj-$(CONFIG_ARCH_SOCFPGA) += socfpga/ obj-$(CONFIG_ARCH_AGILEX) += socfpga/ +obj-$(CONFIG_ARCH_N5X) += socfpga/ obj-$(CONFIG_ARCH_STRATIX10) += socfpga/ obj-$(CONFIG_PLAT_SPEAR) += spear/ obj-y += sprd/ diff --git a/drivers/clk/socfpga/Kconfig b/drivers/clk/socfpga/Kconfig new file mode 100644 index 000000000000..cae6fd9fac64 --- /dev/null +++ b/drivers/clk/socfpga/Kconfig @@ -0,0 +1,6 @@ +# SPDX-License-Identifier: GPL-2.0 +config COMMON_CLK_AGILEX + bool + # Intel Agilex / N5X clock controller support + default y if ARCH_AGILEX || ARCH_N5X + depends on ARCH_AGILEX || ARCH_N5X diff --git a/drivers/clk/socfpga/Makefile b/drivers/clk/socfpga/Makefile index bf736f8d201a..e3614f758184 100644 --- a/drivers/clk/socfpga/Makefile +++ b/drivers/clk/socfpga/Makefile @@ -3,5 +3,5 @@ obj-$(CONFIG_ARCH_SOCFPGA) += clk.o clk-gate.o clk-pll.o clk-periph.o obj-$(CONFIG_ARCH_SOCFPGA) += clk-pll-a10.o clk-periph-a10.o clk-gate-a10.o obj-$(CONFIG_ARCH_STRATIX10) += clk-s10.o obj-$(CONFIG_ARCH_STRATIX10) += clk-pll-s10.o clk-periph-s10.o clk-gate-s10.o -obj-$(CONFIG_ARCH_AGILEX) += clk-agilex.o -obj-$(CONFIG_ARCH_AGILEX) += clk-pll-s10.o clk-periph-s10.o clk-gate-s10.o +obj-$(CONFIG_COMMON_CLK_AGILEX) += clk-agilex.o +obj-$(CONFIG_COMMON_CLK_AGILEX) += clk-pll-s10.o clk-periph-s10.o clk-gate-s10.o -- 2.25.1 ^ permalink raw reply related [flat|nested] 18+ messages in thread
* [RFC v2 2/5] clk: socfpga: build together Stratix 10, Agilex and N5X clock drivers 2021-03-10 8:33 [RFC v2 0/5] arm64 / clk: socfpga: simplifying, cleanups and compile testing Krzysztof Kozlowski 2021-03-10 8:33 ` [RFC v2 1/5] clk: socfpga: allow building N5X clocks with ARCH_N5X Krzysztof Kozlowski @ 2021-03-10 8:33 ` Krzysztof Kozlowski 2021-03-10 8:38 ` [RFC v2 3/5] arm64: socfpga: rename ARCH_STRATIX10 to ARCH_SOCFPGA64 Krzysztof Kozlowski 2 siblings, 0 replies; 18+ messages in thread From: Krzysztof Kozlowski @ 2021-03-10 8:33 UTC (permalink / raw) To: Catalin Marinas, Will Deacon, Dinh Nguyen, Rob Herring, Michael Turquette, Stephen Boyd, Moritz Fischer, Tom Rix, Lee Jones, linux-arm-kernel, linux-kernel, devicetree, linux-clk, linux-edac, linux-fpga, netdev, linux-stm32, arm, soc, Arnd Bergmann, Olof Johansson Cc: Krzysztof Kozlowski On a multiplatform kernel there is little benefit in splitting each clock driver per platform because space savings are minimal. Such split also complicates the code, especially after adding compile testing. Build all arm64 Intel SoCFPGA clocks together with one entry in Makefile. This also removed duplicated line in the Makefile (selecting common part of clocks per platform). Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com> --- drivers/clk/socfpga/Kconfig | 8 ++++---- drivers/clk/socfpga/Makefile | 7 +++---- 2 files changed, 7 insertions(+), 8 deletions(-) diff --git a/drivers/clk/socfpga/Kconfig b/drivers/clk/socfpga/Kconfig index cae6fd9fac64..7d4772faf93d 100644 --- a/drivers/clk/socfpga/Kconfig +++ b/drivers/clk/socfpga/Kconfig @@ -1,6 +1,6 @@ # SPDX-License-Identifier: GPL-2.0 -config COMMON_CLK_AGILEX +config COMMON_CLK_SOCFPGA64 bool - # Intel Agilex / N5X clock controller support - default y if ARCH_AGILEX || ARCH_N5X - depends on ARCH_AGILEX || ARCH_N5X + # Intel Stratix / Agilex / N5X clock controller support + default y if ARCH_AGILEX || ARCH_N5X || ARCH_STRATIX10 + depends on ARCH_AGILEX || ARCH_N5X || ARCH_STRATIX10 diff --git a/drivers/clk/socfpga/Makefile b/drivers/clk/socfpga/Makefile index e3614f758184..0446240162cf 100644 --- a/drivers/clk/socfpga/Makefile +++ b/drivers/clk/socfpga/Makefile @@ -1,7 +1,6 @@ # SPDX-License-Identifier: GPL-2.0 obj-$(CONFIG_ARCH_SOCFPGA) += clk.o clk-gate.o clk-pll.o clk-periph.o obj-$(CONFIG_ARCH_SOCFPGA) += clk-pll-a10.o clk-periph-a10.o clk-gate-a10.o -obj-$(CONFIG_ARCH_STRATIX10) += clk-s10.o -obj-$(CONFIG_ARCH_STRATIX10) += clk-pll-s10.o clk-periph-s10.o clk-gate-s10.o -obj-$(CONFIG_COMMON_CLK_AGILEX) += clk-agilex.o -obj-$(CONFIG_COMMON_CLK_AGILEX) += clk-pll-s10.o clk-periph-s10.o clk-gate-s10.o +obj-$(CONFIG_COMMON_CLK_SOCFPGA64) += clk-s10.o \ + clk-pll-s10.o clk-periph-s10.o clk-gate-s10.o \ + clk-agilex.o -- 2.25.1 ^ permalink raw reply related [flat|nested] 18+ messages in thread
* [RFC v2 3/5] arm64: socfpga: rename ARCH_STRATIX10 to ARCH_SOCFPGA64 2021-03-10 8:33 [RFC v2 0/5] arm64 / clk: socfpga: simplifying, cleanups and compile testing Krzysztof Kozlowski 2021-03-10 8:33 ` [RFC v2 1/5] clk: socfpga: allow building N5X clocks with ARCH_N5X Krzysztof Kozlowski 2021-03-10 8:33 ` [RFC v2 2/5] clk: socfpga: build together Stratix 10, Agilex and N5X clock drivers Krzysztof Kozlowski @ 2021-03-10 8:38 ` Krzysztof Kozlowski 2021-03-10 8:38 ` [RFC v2 4/5] arm64: intel: merge Agilex and N5X into ARCH_SOCFPGA64 Krzysztof Kozlowski ` (2 more replies) 2 siblings, 3 replies; 18+ messages in thread From: Krzysztof Kozlowski @ 2021-03-10 8:38 UTC (permalink / raw) To: Catalin Marinas, Will Deacon, Dinh Nguyen, Rob Herring, Michael Turquette, Stephen Boyd, Moritz Fischer, Tom Rix, Lee Jones, linux-arm-kernel, linux-kernel, devicetree, linux-clk, linux-edac, linux-fpga, netdev, linux-stm32, arm, soc, Arnd Bergmann, Olof Johansson Cc: Krzysztof Kozlowski Prepare for merging Stratix 10, Agilex and N5X into one arm64 architecture by first renaming the ARCH_STRATIX10 into ARCH_SOCFPGA64. The existing ARCH_SOCFPGA (in ARMv7) Kconfig symbol cannot be used because altera_edac driver builds differently between them (with ifdefs). Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com> --- arch/arm64/Kconfig.platforms | 7 ++++--- arch/arm64/boot/dts/altera/Makefile | 2 +- arch/arm64/configs/defconfig | 2 +- drivers/clk/Makefile | 2 +- drivers/clk/socfpga/Kconfig | 4 ++-- drivers/edac/Kconfig | 2 +- drivers/edac/altera_edac.c | 10 +++++----- drivers/firmware/Kconfig | 2 +- drivers/fpga/Kconfig | 2 +- drivers/mfd/Kconfig | 2 +- drivers/net/ethernet/stmicro/stmmac/Kconfig | 4 ++-- drivers/reset/Kconfig | 2 +- 12 files changed, 21 insertions(+), 20 deletions(-) diff --git a/arch/arm64/Kconfig.platforms b/arch/arm64/Kconfig.platforms index cdfd5fed457f..78bba3633eab 100644 --- a/arch/arm64/Kconfig.platforms +++ b/arch/arm64/Kconfig.platforms @@ -254,10 +254,11 @@ config ARCH_SEATTLE help This enables support for AMD Seattle SOC Family -config ARCH_STRATIX10 - bool "Altera's Stratix 10 SoCFPGA Family" +config ARCH_SOCFPGA64 + bool "Intel's SoCFPGA ARMv8 Families" help - This enables support for Altera's Stratix 10 SoCFPGA Family. + This enables support for Intel's SoCFPGA ARMv8 families: + Stratix 10 (ex. Altera), Agilex and eASIC N5X. config ARCH_SYNQUACER bool "Socionext SynQuacer SoC Family" diff --git a/arch/arm64/boot/dts/altera/Makefile b/arch/arm64/boot/dts/altera/Makefile index 10119c7ab437..b45b92f8b4ec 100644 --- a/arch/arm64/boot/dts/altera/Makefile +++ b/arch/arm64/boot/dts/altera/Makefile @@ -1,3 +1,3 @@ # SPDX-License-Identifier: GPL-2.0-only -dtb-$(CONFIG_ARCH_STRATIX10) += socfpga_stratix10_socdk.dtb \ +dtb-$(CONFIG_ARCH_SOCFPGA64) += socfpga_stratix10_socdk.dtb \ socfpga_stratix10_socdk_nand.dtb diff --git a/arch/arm64/configs/defconfig b/arch/arm64/configs/defconfig index d612f633b771..ee742900a150 100644 --- a/arch/arm64/configs/defconfig +++ b/arch/arm64/configs/defconfig @@ -50,7 +50,7 @@ CONFIG_ARCH_RENESAS=y CONFIG_ARCH_ROCKCHIP=y CONFIG_ARCH_S32=y CONFIG_ARCH_SEATTLE=y -CONFIG_ARCH_STRATIX10=y +CONFIG_ARCH_SOCFPGA64=y CONFIG_ARCH_SYNQUACER=y CONFIG_ARCH_TEGRA=y CONFIG_ARCH_SPRD=y diff --git a/drivers/clk/Makefile b/drivers/clk/Makefile index 12e46b12e587..e34457539edf 100644 --- a/drivers/clk/Makefile +++ b/drivers/clk/Makefile @@ -107,7 +107,7 @@ obj-$(CONFIG_CLK_SIFIVE) += sifive/ obj-$(CONFIG_ARCH_SOCFPGA) += socfpga/ obj-$(CONFIG_ARCH_AGILEX) += socfpga/ obj-$(CONFIG_ARCH_N5X) += socfpga/ -obj-$(CONFIG_ARCH_STRATIX10) += socfpga/ +obj-$(CONFIG_ARCH_SOCFPGA64) += socfpga/ obj-$(CONFIG_PLAT_SPEAR) += spear/ obj-y += sprd/ obj-$(CONFIG_ARCH_STI) += st/ diff --git a/drivers/clk/socfpga/Kconfig b/drivers/clk/socfpga/Kconfig index 7d4772faf93d..8cf3dfdba255 100644 --- a/drivers/clk/socfpga/Kconfig +++ b/drivers/clk/socfpga/Kconfig @@ -2,5 +2,5 @@ config COMMON_CLK_SOCFPGA64 bool # Intel Stratix / Agilex / N5X clock controller support - default y if ARCH_AGILEX || ARCH_N5X || ARCH_STRATIX10 - depends on ARCH_AGILEX || ARCH_N5X || ARCH_STRATIX10 + default y if ARCH_AGILEX || ARCH_N5X || ARCH_SOCFPGA64 + depends on ARCH_AGILEX || ARCH_N5X || ARCH_SOCFPGA64 diff --git a/drivers/edac/Kconfig b/drivers/edac/Kconfig index 27d0c4cdc58d..97fa2056bd47 100644 --- a/drivers/edac/Kconfig +++ b/drivers/edac/Kconfig @@ -396,7 +396,7 @@ config EDAC_THUNDERX config EDAC_ALTERA bool "Altera SOCFPGA ECC" - depends on EDAC=y && (ARCH_SOCFPGA || ARCH_STRATIX10) + depends on EDAC=y && (ARCH_SOCFPGA || ARCH_SOCFPGA64) help Support for error detection and correction on the Altera SOCs. This is the global enable for the diff --git a/drivers/edac/altera_edac.c b/drivers/edac/altera_edac.c index e91cf1147a4e..ba11219664ca 100644 --- a/drivers/edac/altera_edac.c +++ b/drivers/edac/altera_edac.c @@ -1502,7 +1502,7 @@ static int altr_portb_setup(struct altr_edac_device_dev *device) dci->dev_name = ecc_name; /* Update the PortB IRQs - A10 has 4, S10 has 2, Index accordingly */ -#ifdef CONFIG_ARCH_STRATIX10 +#ifdef CONFIG_ARCH_SOCFPGA64 altdev->sb_irq = irq_of_parse_and_map(np, 1); #else altdev->sb_irq = irq_of_parse_and_map(np, 2); @@ -1521,7 +1521,7 @@ static int altr_portb_setup(struct altr_edac_device_dev *device) goto err_release_group_1; } -#ifdef CONFIG_ARCH_STRATIX10 +#ifdef CONFIG_ARCH_SOCFPGA64 /* Use IRQ to determine SError origin instead of assigning IRQ */ rc = of_property_read_u32_index(np, "interrupts", 1, &altdev->db_irq); if (rc) { @@ -1931,7 +1931,7 @@ static int altr_edac_a10_device_add(struct altr_arria10_edac *edac, goto err_release_group1; } -#ifdef CONFIG_ARCH_STRATIX10 +#ifdef CONFIG_ARCH_SOCFPGA64 /* Use IRQ to determine SError origin instead of assigning IRQ */ rc = of_property_read_u32_index(np, "interrupts", 0, &altdev->db_irq); if (rc) { @@ -2016,7 +2016,7 @@ static const struct irq_domain_ops a10_eccmgr_ic_ops = { /************** Stratix 10 EDAC Double Bit Error Handler ************/ #define to_a10edac(p, m) container_of(p, struct altr_arria10_edac, m) -#ifdef CONFIG_ARCH_STRATIX10 +#ifdef CONFIG_ARCH_SOCFPGA64 /* panic routine issues reboot on non-zero panic_timeout */ extern int panic_timeout; @@ -2109,7 +2109,7 @@ static int altr_edac_a10_probe(struct platform_device *pdev) altr_edac_a10_irq_handler, edac); -#ifdef CONFIG_ARCH_STRATIX10 +#ifdef CONFIG_ARCH_SOCFPGA64 { int dberror, err_addr; diff --git a/drivers/firmware/Kconfig b/drivers/firmware/Kconfig index 3f14dffb9669..59660798f05f 100644 --- a/drivers/firmware/Kconfig +++ b/drivers/firmware/Kconfig @@ -206,7 +206,7 @@ config FW_CFG_SYSFS_CMDLINE config INTEL_STRATIX10_SERVICE tristate "Intel Stratix10 Service Layer" - depends on (ARCH_STRATIX10 || ARCH_AGILEX) && HAVE_ARM_SMCCC + depends on (ARCH_SOCFPGA64 || ARCH_AGILEX) && HAVE_ARM_SMCCC default n help Intel Stratix10 service layer runs at privileged exception level, diff --git a/drivers/fpga/Kconfig b/drivers/fpga/Kconfig index 5ff9438b7b46..7f7504d1c961 100644 --- a/drivers/fpga/Kconfig +++ b/drivers/fpga/Kconfig @@ -60,7 +60,7 @@ config FPGA_MGR_ZYNQ_FPGA config FPGA_MGR_STRATIX10_SOC tristate "Intel Stratix10 SoC FPGA Manager" - depends on (ARCH_STRATIX10 && INTEL_STRATIX10_SERVICE) + depends on (ARCH_SOCFPGA64 && INTEL_STRATIX10_SERVICE) help FPGA manager driver support for the Intel Stratix10 SoC. diff --git a/drivers/mfd/Kconfig b/drivers/mfd/Kconfig index a03de3f7a8ed..8fbd10cc6944 100644 --- a/drivers/mfd/Kconfig +++ b/drivers/mfd/Kconfig @@ -32,7 +32,7 @@ config MFD_ALTERA_A10SR config MFD_ALTERA_SYSMGR bool "Altera SOCFPGA System Manager" - depends on (ARCH_SOCFPGA || ARCH_STRATIX10) && OF + depends on (ARCH_SOCFPGA || ARCH_SOCFPGA64) && OF select MFD_SYSCON help Select this to get System Manager support for all Altera branded diff --git a/drivers/net/ethernet/stmicro/stmmac/Kconfig b/drivers/net/ethernet/stmicro/stmmac/Kconfig index e675ba12fde2..ab6eb792fbdb 100644 --- a/drivers/net/ethernet/stmicro/stmmac/Kconfig +++ b/drivers/net/ethernet/stmicro/stmmac/Kconfig @@ -140,8 +140,8 @@ config DWMAC_ROCKCHIP config DWMAC_SOCFPGA tristate "SOCFPGA dwmac support" - default (ARCH_SOCFPGA || ARCH_STRATIX10) - depends on OF && (ARCH_SOCFPGA || ARCH_STRATIX10 || COMPILE_TEST) + default (ARCH_SOCFPGA || ARCH_SOCFPGA64) + depends on OF && (ARCH_SOCFPGA || ARCH_SOCFPGA64 || COMPILE_TEST) select MFD_SYSCON help Support for ethernet controller on Altera SOCFPGA diff --git a/drivers/reset/Kconfig b/drivers/reset/Kconfig index 4171c6f76385..fa7f1394697b 100644 --- a/drivers/reset/Kconfig +++ b/drivers/reset/Kconfig @@ -183,7 +183,7 @@ config RESET_SCMI config RESET_SIMPLE bool "Simple Reset Controller Driver" if COMPILE_TEST - default ARCH_AGILEX || ARCH_ASPEED || ARCH_BCM4908 || ARCH_BITMAIN || ARCH_REALTEK || ARCH_STM32 || ARCH_STRATIX10 || ARCH_SUNXI || ARC + default ARCH_AGILEX || ARCH_ASPEED || ARCH_BCM4908 || ARCH_BITMAIN || ARCH_REALTEK || ARCH_STM32 || ARCH_SOCFPGA64 || ARCH_SUNXI || ARC help This enables a simple reset controller driver for reset lines that that can be asserted and deasserted by toggling bits in a contiguous, -- 2.25.1 ^ permalink raw reply related [flat|nested] 18+ messages in thread
* [RFC v2 4/5] arm64: intel: merge Agilex and N5X into ARCH_SOCFPGA64 2021-03-10 8:38 ` [RFC v2 3/5] arm64: socfpga: rename ARCH_STRATIX10 to ARCH_SOCFPGA64 Krzysztof Kozlowski @ 2021-03-10 8:38 ` Krzysztof Kozlowski 2021-03-10 8:38 ` [RFC v2 5/5] clk: socfpga: allow compile testing of Stratix 10 / Agilex clocks Krzysztof Kozlowski 2021-03-10 9:45 ` [RFC v2 3/5] arm64: socfpga: rename ARCH_STRATIX10 to ARCH_SOCFPGA64 Lee Jones 2 siblings, 0 replies; 18+ messages in thread From: Krzysztof Kozlowski @ 2021-03-10 8:38 UTC (permalink / raw) To: Catalin Marinas, Will Deacon, Dinh Nguyen, Rob Herring, Michael Turquette, Stephen Boyd, Moritz Fischer, Tom Rix, Lee Jones, linux-arm-kernel, linux-kernel, devicetree, linux-clk, linux-edac, linux-fpga, netdev, linux-stm32, arm, soc, Arnd Bergmann, Olof Johansson Cc: Krzysztof Kozlowski Agilex, N5X and Stratix 10 share all quite similar arm64 hard cores and SoC-part. Up to a point that N5X uses the same DTSI as Agilex. From the Linux kernel point of view these are flavors of the same architecture so there is no need for three top-level arm64 architectures. Simplify this by merging all three architectures into ARCH_SOCFPGA64. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com> --- arch/arm64/Kconfig.platforms | 10 ---------- arch/arm64/boot/dts/intel/Makefile | 6 +++--- arch/arm64/configs/defconfig | 1 - drivers/clk/socfpga/Kconfig | 4 ++-- drivers/firmware/Kconfig | 2 +- drivers/reset/Kconfig | 2 +- 6 files changed, 7 insertions(+), 18 deletions(-) diff --git a/arch/arm64/Kconfig.platforms b/arch/arm64/Kconfig.platforms index 78bba3633eab..754738029cc6 100644 --- a/arch/arm64/Kconfig.platforms +++ b/arch/arm64/Kconfig.platforms @@ -8,16 +8,6 @@ config ARCH_ACTIONS help This enables support for the Actions Semiconductor S900 SoC family. -config ARCH_AGILEX - bool "Intel's Agilex SoCFPGA Family" - help - This enables support for Intel's Agilex SoCFPGA Family. - -config ARCH_N5X - bool "Intel's eASIC N5X SoCFPGA Family" - help - This enables support for Intel's eASIC N5X SoCFPGA Family. - config ARCH_SUNXI bool "Allwinner sunxi 64-bit SoC Family" select ARCH_HAS_RESET_CONTROLLER diff --git a/arch/arm64/boot/dts/intel/Makefile b/arch/arm64/boot/dts/intel/Makefile index 3a052540605b..bb340584785c 100644 --- a/arch/arm64/boot/dts/intel/Makefile +++ b/arch/arm64/boot/dts/intel/Makefile @@ -1,5 +1,5 @@ # SPDX-License-Identifier: GPL-2.0-only -dtb-$(CONFIG_ARCH_AGILEX) += socfpga_agilex_socdk.dtb \ - socfpga_agilex_socdk_nand.dtb +dtb-$(CONFIG_ARCH_SOCFPGA64) += socfpga_agilex_socdk.dtb \ + socfpga_agilex_socdk_nand.dtb dtb-$(CONFIG_ARCH_KEEMBAY) += keembay-evm.dtb -dtb-$(CONFIG_ARCH_N5X) += socfpga_n5x_socdk.dtb +dtb-$(CONFIG_ARCH_SOCFPGA64) += socfpga_n5x_socdk.dtb diff --git a/arch/arm64/configs/defconfig b/arch/arm64/configs/defconfig index ee742900a150..4968d4b3d89d 100644 --- a/arch/arm64/configs/defconfig +++ b/arch/arm64/configs/defconfig @@ -28,7 +28,6 @@ CONFIG_KALLSYMS_ALL=y # CONFIG_COMPAT_BRK is not set CONFIG_PROFILING=y CONFIG_ARCH_ACTIONS=y -CONFIG_ARCH_AGILEX=y CONFIG_ARCH_SUNXI=y CONFIG_ARCH_ALPINE=y CONFIG_ARCH_BCM2835=y diff --git a/drivers/clk/socfpga/Kconfig b/drivers/clk/socfpga/Kconfig index 8cf3dfdba255..834797c68cb2 100644 --- a/drivers/clk/socfpga/Kconfig +++ b/drivers/clk/socfpga/Kconfig @@ -2,5 +2,5 @@ config COMMON_CLK_SOCFPGA64 bool # Intel Stratix / Agilex / N5X clock controller support - default y if ARCH_AGILEX || ARCH_N5X || ARCH_SOCFPGA64 - depends on ARCH_AGILEX || ARCH_N5X || ARCH_SOCFPGA64 + default y if ARCH_SOCFPGA64 + depends on ARCH_SOCFPGA64 diff --git a/drivers/firmware/Kconfig b/drivers/firmware/Kconfig index 59660798f05f..f290fad41731 100644 --- a/drivers/firmware/Kconfig +++ b/drivers/firmware/Kconfig @@ -206,7 +206,7 @@ config FW_CFG_SYSFS_CMDLINE config INTEL_STRATIX10_SERVICE tristate "Intel Stratix10 Service Layer" - depends on (ARCH_SOCFPGA64 || ARCH_AGILEX) && HAVE_ARM_SMCCC + depends on ARCH_SOCFPGA64 && HAVE_ARM_SMCCC default n help Intel Stratix10 service layer runs at privileged exception level, diff --git a/drivers/reset/Kconfig b/drivers/reset/Kconfig index fa7f1394697b..796c9e3e5e81 100644 --- a/drivers/reset/Kconfig +++ b/drivers/reset/Kconfig @@ -183,7 +183,7 @@ config RESET_SCMI config RESET_SIMPLE bool "Simple Reset Controller Driver" if COMPILE_TEST - default ARCH_AGILEX || ARCH_ASPEED || ARCH_BCM4908 || ARCH_BITMAIN || ARCH_REALTEK || ARCH_STM32 || ARCH_SOCFPGA64 || ARCH_SUNXI || ARC + default ARCH_ASPEED || ARCH_BCM4908 || ARCH_BITMAIN || ARCH_REALTEK || ARCH_STM32 || ARCH_SOCFPGA64 || ARCH_SUNXI || ARC help This enables a simple reset controller driver for reset lines that that can be asserted and deasserted by toggling bits in a contiguous, -- 2.25.1 ^ permalink raw reply related [flat|nested] 18+ messages in thread
* [RFC v2 5/5] clk: socfpga: allow compile testing of Stratix 10 / Agilex clocks 2021-03-10 8:38 ` [RFC v2 3/5] arm64: socfpga: rename ARCH_STRATIX10 to ARCH_SOCFPGA64 Krzysztof Kozlowski 2021-03-10 8:38 ` [RFC v2 4/5] arm64: intel: merge Agilex and N5X into ARCH_SOCFPGA64 Krzysztof Kozlowski @ 2021-03-10 8:38 ` Krzysztof Kozlowski 2021-03-10 16:48 ` Arnd Bergmann 2021-03-10 9:45 ` [RFC v2 3/5] arm64: socfpga: rename ARCH_STRATIX10 to ARCH_SOCFPGA64 Lee Jones 2 siblings, 1 reply; 18+ messages in thread From: Krzysztof Kozlowski @ 2021-03-10 8:38 UTC (permalink / raw) To: Catalin Marinas, Will Deacon, Dinh Nguyen, Rob Herring, Michael Turquette, Stephen Boyd, Moritz Fischer, Tom Rix, Lee Jones, linux-arm-kernel, linux-kernel, devicetree, linux-clk, linux-edac, linux-fpga, netdev, linux-stm32, arm, soc, Arnd Bergmann, Olof Johansson Cc: Krzysztof Kozlowski The Stratix 10 / Agilex / N5X clocks do not use anything other than OF or COMMON_CLK so they should be compile testable on most of the platforms. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com> --- drivers/clk/Makefile | 5 +---- drivers/clk/socfpga/Kconfig | 17 ++++++++++++++--- 2 files changed, 15 insertions(+), 7 deletions(-) diff --git a/drivers/clk/Makefile b/drivers/clk/Makefile index e34457539edf..9b582b3fca34 100644 --- a/drivers/clk/Makefile +++ b/drivers/clk/Makefile @@ -104,10 +104,7 @@ obj-y += renesas/ obj-$(CONFIG_ARCH_ROCKCHIP) += rockchip/ obj-$(CONFIG_COMMON_CLK_SAMSUNG) += samsung/ obj-$(CONFIG_CLK_SIFIVE) += sifive/ -obj-$(CONFIG_ARCH_SOCFPGA) += socfpga/ -obj-$(CONFIG_ARCH_AGILEX) += socfpga/ -obj-$(CONFIG_ARCH_N5X) += socfpga/ -obj-$(CONFIG_ARCH_SOCFPGA64) += socfpga/ +obj-y += socfpga/ obj-$(CONFIG_PLAT_SPEAR) += spear/ obj-y += sprd/ obj-$(CONFIG_ARCH_STI) += st/ diff --git a/drivers/clk/socfpga/Kconfig b/drivers/clk/socfpga/Kconfig index 834797c68cb2..fb93b7cede27 100644 --- a/drivers/clk/socfpga/Kconfig +++ b/drivers/clk/socfpga/Kconfig @@ -1,6 +1,17 @@ # SPDX-License-Identifier: GPL-2.0 +config COMMON_CLK_SOCFPGA + bool "Intel SoCFPGA family clock support" if COMPILE_TEST && !ARCH_SOCFPGA && !ARCH_SOCFPGA64 + depends on ARCH_SOCFPGA || ARCH_SOCFPGA64 || COMPILE_TEST + default y if ARCH_SOCFPGA || ARCH_SOCFPGA64 + help + Support for the clock controllers present on Intel SoCFPGA and eASIC + devices like Stratix 10, Agilex and N5X eASIC. + +if COMMON_CLK_SOCFPGA + config COMMON_CLK_SOCFPGA64 - bool - # Intel Stratix / Agilex / N5X clock controller support + bool "Intel Stratix / Agilex / N5X clock controller support" if COMPILE_TEST && !ARCH_SOCFPGA64 default y if ARCH_SOCFPGA64 - depends on ARCH_SOCFPGA64 + depends on ARCH_SOCFPGA64 || COMPILE_TEST + +endif # COMMON_CLK_SOCFPGA -- 2.25.1 ^ permalink raw reply related [flat|nested] 18+ messages in thread
* Re: [RFC v2 5/5] clk: socfpga: allow compile testing of Stratix 10 / Agilex clocks 2021-03-10 8:38 ` [RFC v2 5/5] clk: socfpga: allow compile testing of Stratix 10 / Agilex clocks Krzysztof Kozlowski @ 2021-03-10 16:48 ` Arnd Bergmann 2021-03-11 7:29 ` Krzysztof Kozlowski 0 siblings, 1 reply; 18+ messages in thread From: Arnd Bergmann @ 2021-03-10 16:48 UTC (permalink / raw) To: Krzysztof Kozlowski Cc: Catalin Marinas, Will Deacon, Dinh Nguyen, Rob Herring, Michael Turquette, Stephen Boyd, Moritz Fischer, Tom Rix, Lee Jones, Linux ARM, linux-kernel, DTML, linux-clk, linux-edac, linux-fpga, Networking, linux-stm32, arm-soc, SoC Team, Olof Johansson On Wed, Mar 10, 2021 at 9:38 AM Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com> wrote: > --- a/drivers/clk/socfpga/Kconfig > +++ b/drivers/clk/socfpga/Kconfig > @@ -1,6 +1,17 @@ > # SPDX-License-Identifier: GPL-2.0 > +config COMMON_CLK_SOCFPGA > + bool "Intel SoCFPGA family clock support" if COMPILE_TEST && !ARCH_SOCFPGA && !ARCH_SOCFPGA64 > + depends on ARCH_SOCFPGA || ARCH_SOCFPGA64 || COMPILE_TEST > + default y if ARCH_SOCFPGA || ARCH_SOCFPGA64 I think the 'depends on' line here is redundant if you also have the 'if' line and the default. Arnd ^ permalink raw reply [flat|nested] 18+ messages in thread
* Re: [RFC v2 5/5] clk: socfpga: allow compile testing of Stratix 10 / Agilex clocks 2021-03-10 16:48 ` Arnd Bergmann @ 2021-03-11 7:29 ` Krzysztof Kozlowski 0 siblings, 0 replies; 18+ messages in thread From: Krzysztof Kozlowski @ 2021-03-11 7:29 UTC (permalink / raw) To: Arnd Bergmann Cc: Catalin Marinas, Will Deacon, Dinh Nguyen, Rob Herring, Michael Turquette, Stephen Boyd, Moritz Fischer, Tom Rix, Lee Jones, Linux ARM, linux-kernel, DTML, linux-clk, linux-edac, linux-fpga, Networking, linux-stm32, arm-soc, SoC Team, Olof Johansson On 10/03/2021 17:48, Arnd Bergmann wrote: > On Wed, Mar 10, 2021 at 9:38 AM Krzysztof Kozlowski > <krzysztof.kozlowski@canonical.com> wrote: >> --- a/drivers/clk/socfpga/Kconfig >> +++ b/drivers/clk/socfpga/Kconfig >> @@ -1,6 +1,17 @@ >> # SPDX-License-Identifier: GPL-2.0 >> +config COMMON_CLK_SOCFPGA >> + bool "Intel SoCFPGA family clock support" if COMPILE_TEST && !ARCH_SOCFPGA && !ARCH_SOCFPGA64 >> + depends on ARCH_SOCFPGA || ARCH_SOCFPGA64 || COMPILE_TEST >> + default y if ARCH_SOCFPGA || ARCH_SOCFPGA64 > > I think the 'depends on' line here is redundant if you also have the > 'if' line and the default. Yes, you're right. Best regards, Krzysztof ^ permalink raw reply [flat|nested] 18+ messages in thread
* Re: [RFC v2 3/5] arm64: socfpga: rename ARCH_STRATIX10 to ARCH_SOCFPGA64 2021-03-10 8:38 ` [RFC v2 3/5] arm64: socfpga: rename ARCH_STRATIX10 to ARCH_SOCFPGA64 Krzysztof Kozlowski 2021-03-10 8:38 ` [RFC v2 4/5] arm64: intel: merge Agilex and N5X into ARCH_SOCFPGA64 Krzysztof Kozlowski 2021-03-10 8:38 ` [RFC v2 5/5] clk: socfpga: allow compile testing of Stratix 10 / Agilex clocks Krzysztof Kozlowski @ 2021-03-10 9:45 ` Lee Jones 2021-03-10 14:45 ` Tom Rix 2 siblings, 1 reply; 18+ messages in thread From: Lee Jones @ 2021-03-10 9:45 UTC (permalink / raw) To: Krzysztof Kozlowski Cc: Catalin Marinas, Will Deacon, Dinh Nguyen, Rob Herring, Michael Turquette, Stephen Boyd, Moritz Fischer, Tom Rix, linux-arm-kernel, linux-kernel, devicetree, linux-clk, linux-edac, linux-fpga, netdev, linux-stm32, arm, soc, Arnd Bergmann, Olof Johansson On Wed, 10 Mar 2021, Krzysztof Kozlowski wrote: > Prepare for merging Stratix 10, Agilex and N5X into one arm64 > architecture by first renaming the ARCH_STRATIX10 into ARCH_SOCFPGA64. > > The existing ARCH_SOCFPGA (in ARMv7) Kconfig symbol cannot be used > because altera_edac driver builds differently between them (with > ifdefs). > > Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com> > --- > arch/arm64/Kconfig.platforms | 7 ++++--- > arch/arm64/boot/dts/altera/Makefile | 2 +- > arch/arm64/configs/defconfig | 2 +- > drivers/clk/Makefile | 2 +- > drivers/clk/socfpga/Kconfig | 4 ++-- > drivers/edac/Kconfig | 2 +- > drivers/edac/altera_edac.c | 10 +++++----- > drivers/firmware/Kconfig | 2 +- > drivers/fpga/Kconfig | 2 +- > drivers/mfd/Kconfig | 2 +- If it's okay with everyone else, it'll be okay with me: Acked-by: Lee Jones <lee.jones@linaro.org> > drivers/net/ethernet/stmicro/stmmac/Kconfig | 4 ++-- > drivers/reset/Kconfig | 2 +- > 12 files changed, 21 insertions(+), 20 deletions(-) -- Lee Jones [李琼斯] Senior Technical Lead - Developer Services Linaro.org │ Open source software for Arm SoCs Follow Linaro: Facebook | Twitter | Blog ^ permalink raw reply [flat|nested] 18+ messages in thread
* Re: [RFC v2 3/5] arm64: socfpga: rename ARCH_STRATIX10 to ARCH_SOCFPGA64 2021-03-10 9:45 ` [RFC v2 3/5] arm64: socfpga: rename ARCH_STRATIX10 to ARCH_SOCFPGA64 Lee Jones @ 2021-03-10 14:45 ` Tom Rix 2021-03-10 15:05 ` Krzysztof Kozlowski 0 siblings, 1 reply; 18+ messages in thread From: Tom Rix @ 2021-03-10 14:45 UTC (permalink / raw) To: Lee Jones, Krzysztof Kozlowski Cc: Catalin Marinas, Will Deacon, Dinh Nguyen, Rob Herring, Michael Turquette, Stephen Boyd, Moritz Fischer, linux-arm-kernel, linux-kernel, devicetree, linux-clk, linux-edac, linux-fpga, netdev, linux-stm32, arm, soc, Arnd Bergmann, Olof Johansson On 3/10/21 1:45 AM, Lee Jones wrote: > On Wed, 10 Mar 2021, Krzysztof Kozlowski wrote: > >> Prepare for merging Stratix 10, Agilex and N5X into one arm64 >> architecture by first renaming the ARCH_STRATIX10 into ARCH_SOCFPGA64. >> >> The existing ARCH_SOCFPGA (in ARMv7) Kconfig symbol cannot be used >> because altera_edac driver builds differently between them (with >> ifdefs). >> >> Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com> >> --- >> arch/arm64/Kconfig.platforms | 7 ++++--- >> arch/arm64/boot/dts/altera/Makefile | 2 +- >> arch/arm64/configs/defconfig | 2 +- >> drivers/clk/Makefile | 2 +- >> drivers/clk/socfpga/Kconfig | 4 ++-- >> drivers/edac/Kconfig | 2 +- >> drivers/edac/altera_edac.c | 10 +++++----- >> drivers/firmware/Kconfig | 2 +- >> drivers/fpga/Kconfig | 2 +- >> drivers/mfd/Kconfig | 2 +- > If it's okay with everyone else, it'll be okay with me: > > Acked-by: Lee Jones <lee.jones@linaro.org> I think the name is too broad, from the description in the config + bool "Intel's SoCFPGA ARMv8 Families" A better name would be ARCH_INTEL_SOCFPGA64 So other vendors like Xilinx could do their own thing. Tom > >> drivers/net/ethernet/stmicro/stmmac/Kconfig | 4 ++-- >> drivers/reset/Kconfig | 2 +- >> 12 files changed, 21 insertions(+), 20 deletions(-) ^ permalink raw reply [flat|nested] 18+ messages in thread
* Re: [RFC v2 3/5] arm64: socfpga: rename ARCH_STRATIX10 to ARCH_SOCFPGA64 2021-03-10 14:45 ` Tom Rix @ 2021-03-10 15:05 ` Krzysztof Kozlowski 2021-03-10 15:39 ` Arnd Bergmann 0 siblings, 1 reply; 18+ messages in thread From: Krzysztof Kozlowski @ 2021-03-10 15:05 UTC (permalink / raw) To: Tom Rix, Lee Jones Cc: Catalin Marinas, Will Deacon, Dinh Nguyen, Rob Herring, Michael Turquette, Stephen Boyd, Moritz Fischer, linux-arm-kernel, linux-kernel, devicetree, linux-clk, linux-edac, linux-fpga, netdev, linux-stm32, arm, soc, Arnd Bergmann, Olof Johansson On 10/03/2021 15:45, Tom Rix wrote: > > On 3/10/21 1:45 AM, Lee Jones wrote: >> On Wed, 10 Mar 2021, Krzysztof Kozlowski wrote: >> >>> Prepare for merging Stratix 10, Agilex and N5X into one arm64 >>> architecture by first renaming the ARCH_STRATIX10 into ARCH_SOCFPGA64. >>> >>> The existing ARCH_SOCFPGA (in ARMv7) Kconfig symbol cannot be used >>> because altera_edac driver builds differently between them (with >>> ifdefs). >>> >>> Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com> >>> --- >>> arch/arm64/Kconfig.platforms | 7 ++++--- >>> arch/arm64/boot/dts/altera/Makefile | 2 +- >>> arch/arm64/configs/defconfig | 2 +- >>> drivers/clk/Makefile | 2 +- >>> drivers/clk/socfpga/Kconfig | 4 ++-- >>> drivers/edac/Kconfig | 2 +- >>> drivers/edac/altera_edac.c | 10 +++++----- >>> drivers/firmware/Kconfig | 2 +- >>> drivers/fpga/Kconfig | 2 +- >>> drivers/mfd/Kconfig | 2 +- >> If it's okay with everyone else, it'll be okay with me: >> >> Acked-by: Lee Jones <lee.jones@linaro.org> > > I think the name is too broad, from the description in the config > > + bool "Intel's SoCFPGA ARMv8 Families" > > A better name would be ARCH_INTEL_SOCFPGA64 > > So other vendors like Xilinx could do their own thing. Many other architectures do not have vendor prefix (TEGRA, EXYNOS, ZYNQMP etc). I would call it the same as in ARMv7 - ARCH_SOCFPGA - but the Altera EDAC driver depends on these symbols to be different. Anyway, I don't mind using something else for the name. Best regards, Krzysztof ^ permalink raw reply [flat|nested] 18+ messages in thread
* Re: [RFC v2 3/5] arm64: socfpga: rename ARCH_STRATIX10 to ARCH_SOCFPGA64 2021-03-10 15:05 ` Krzysztof Kozlowski @ 2021-03-10 15:39 ` Arnd Bergmann 2021-03-10 15:47 ` Krzysztof Kozlowski 0 siblings, 1 reply; 18+ messages in thread From: Arnd Bergmann @ 2021-03-10 15:39 UTC (permalink / raw) To: Krzysztof Kozlowski Cc: Tom Rix, Lee Jones, Catalin Marinas, Will Deacon, Dinh Nguyen, Rob Herring, Michael Turquette, Stephen Boyd, Moritz Fischer, Linux ARM, linux-kernel, DTML, linux-clk, linux-edac, linux-fpga, Networking, linux-stm32, arm-soc, SoC Team, Olof Johansson On Wed, Mar 10, 2021 at 4:06 PM Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com> wrote: > On 10/03/2021 15:45, Tom Rix wrote: > > On 3/10/21 1:45 AM, Lee Jones wrote: > > Many other architectures do not have vendor prefix (TEGRA, EXYNOS, > ZYNQMP etc). I would call it the same as in ARMv7 - ARCH_SOCFPGA - but > the Altera EDAC driver depends on these symbols to be different. > Anyway, I don't mind using something else for the name. I agree the name SOCFPGA is confusing, since it is really a class of device that is made by multiple manufacturers rather than a brand name, but renaming that now would be equally confusing. If the Intel folks could suggest a better name that describes all products in the platform and is less ambiguous, we could rename it to that. I think ARCH_ALTERA would make sense, but I don't know if that is a name that is getting phased out. (We once renamed the Marvell Orion platform to ARCH_MVEBU, but shortly afterwards, Marvell renamed their embedded business unit (EBU) and the name has no longer made sense since). Regardless of what name we end up with, I do think we should have the same name for 32-bit and 64-bit and instead fix the edac driver to do runtime detection based on the compatible string. Arnd ^ permalink raw reply [flat|nested] 18+ messages in thread
* Re: [RFC v2 3/5] arm64: socfpga: rename ARCH_STRATIX10 to ARCH_SOCFPGA64 2021-03-10 15:39 ` Arnd Bergmann @ 2021-03-10 15:47 ` Krzysztof Kozlowski 2021-03-10 15:54 ` Krzysztof Kozlowski 0 siblings, 1 reply; 18+ messages in thread From: Krzysztof Kozlowski @ 2021-03-10 15:47 UTC (permalink / raw) To: Arnd Bergmann Cc: Tom Rix, Lee Jones, Catalin Marinas, Will Deacon, Dinh Nguyen, Rob Herring, Michael Turquette, Stephen Boyd, Moritz Fischer, Linux ARM, linux-kernel, DTML, linux-clk, linux-edac, linux-fpga, Networking, linux-stm32, arm-soc, SoC Team, Olof Johansson On 10/03/2021 16:39, Arnd Bergmann wrote: > On Wed, Mar 10, 2021 at 4:06 PM Krzysztof Kozlowski > <krzysztof.kozlowski@canonical.com> wrote: >> On 10/03/2021 15:45, Tom Rix wrote: >>> On 3/10/21 1:45 AM, Lee Jones wrote: >> >> Many other architectures do not have vendor prefix (TEGRA, EXYNOS, >> ZYNQMP etc). I would call it the same as in ARMv7 - ARCH_SOCFPGA - but >> the Altera EDAC driver depends on these symbols to be different. >> Anyway, I don't mind using something else for the name. > > I agree the name SOCFPGA is confusing, since it is really a class of > device that is made by multiple manufacturers rather than a brand name, > but renaming that now would be equally confusing. If the Intel folks > could suggest a better name that describes all products in the platform > and is less ambiguous, we could rename it to that. I think ARCH_ALTERA > would make sense, but I don't know if that is a name that is getting > phased out. (We once renamed the Marvell Orion platform to ARCH_MVEBU, > but shortly afterwards, Marvell renamed their embedded business unit (EBU) > and the name has no longer made sense since). I wait then for some ideas from Dinh (or anyone else). > > Regardless of what name we end up with, I do think we should have the > same name for 32-bit and 64-bit and instead fix the edac driver to do > runtime detection based on the compatible string. I can rename ARCH_SOCFPGA on 32-bit ARM as well, however converting edac driver from #ifdef ARCH_SOCFPGA64 to proper compatible string will be too much for me: I am not able to test it. This edac Altera driver is very weird... it uses the same compatible differently depending whether this is 32-bit or 64-bit (e.g. Stratix 10)! On ARMv7 the compatible means for example one IRQ... On ARMv8, we have two. It's quite a new code (2019 from Intel), not some ancient legacy, so it should never have been accepted... Best regards, Krzysztof ^ permalink raw reply [flat|nested] 18+ messages in thread
* Re: [RFC v2 3/5] arm64: socfpga: rename ARCH_STRATIX10 to ARCH_SOCFPGA64 2021-03-10 15:47 ` Krzysztof Kozlowski @ 2021-03-10 15:54 ` Krzysztof Kozlowski 2021-03-10 16:42 ` Arnd Bergmann 0 siblings, 1 reply; 18+ messages in thread From: Krzysztof Kozlowski @ 2021-03-10 15:54 UTC (permalink / raw) To: Arnd Bergmann Cc: Tom Rix, Lee Jones, Catalin Marinas, Will Deacon, Dinh Nguyen, Rob Herring, Michael Turquette, Stephen Boyd, Moritz Fischer, Linux ARM, linux-kernel, DTML, linux-clk, linux-edac, linux-fpga, Networking, linux-stm32, arm-soc, SoC Team, Olof Johansson On 10/03/2021 16:47, Krzysztof Kozlowski wrote: > On 10/03/2021 16:39, Arnd Bergmann wrote: >> On Wed, Mar 10, 2021 at 4:06 PM Krzysztof Kozlowski >> <krzysztof.kozlowski@canonical.com> wrote: >>> On 10/03/2021 15:45, Tom Rix wrote: >>>> On 3/10/21 1:45 AM, Lee Jones wrote: >>> >>> Many other architectures do not have vendor prefix (TEGRA, EXYNOS, >>> ZYNQMP etc). I would call it the same as in ARMv7 - ARCH_SOCFPGA - but >>> the Altera EDAC driver depends on these symbols to be different. >>> Anyway, I don't mind using something else for the name. >> >> I agree the name SOCFPGA is confusing, since it is really a class of >> device that is made by multiple manufacturers rather than a brand name, >> but renaming that now would be equally confusing. If the Intel folks >> could suggest a better name that describes all products in the platform >> and is less ambiguous, we could rename it to that. I think ARCH_ALTERA >> would make sense, but I don't know if that is a name that is getting >> phased out. (We once renamed the Marvell Orion platform to ARCH_MVEBU, >> but shortly afterwards, Marvell renamed their embedded business unit (EBU) >> and the name has no longer made sense since). > > I wait then for some ideas from Dinh (or anyone else). > >> >> Regardless of what name we end up with, I do think we should have the >> same name for 32-bit and 64-bit and instead fix the edac driver to do >> runtime detection based on the compatible string. > > I can rename ARCH_SOCFPGA on 32-bit ARM as well, however converting edac > driver from #ifdef ARCH_SOCFPGA64 to proper compatible string will be > too much for me: I am not able to test it. > > This edac Altera driver is very weird... it uses the same compatible > differently depending whether this is 32-bit or 64-bit (e.g. Stratix > 10)! On ARMv7 the compatible means for example one IRQ... On ARMv8, we > have two. It's quite a new code (2019 from Intel), not some ancient > legacy, so it should never have been accepted... Oh, it's not that horrible as it sounds. They actually have different compatibles for edac driver with these differences (e.g. in interrupts). They just do not use them and instead check for the basic (common?) compatible and architecture... Anyway without testing I am not the person to fix the edac driver. Best regards, Krzysztof ^ permalink raw reply [flat|nested] 18+ messages in thread
* Re: [RFC v2 3/5] arm64: socfpga: rename ARCH_STRATIX10 to ARCH_SOCFPGA64 2021-03-10 15:54 ` Krzysztof Kozlowski @ 2021-03-10 16:42 ` Arnd Bergmann 2021-03-11 7:08 ` Krzysztof Kozlowski 0 siblings, 1 reply; 18+ messages in thread From: Arnd Bergmann @ 2021-03-10 16:42 UTC (permalink / raw) To: Krzysztof Kozlowski Cc: Tom Rix, Lee Jones, Catalin Marinas, Will Deacon, Dinh Nguyen, Rob Herring, Michael Turquette, Stephen Boyd, Moritz Fischer, Linux ARM, linux-kernel, DTML, linux-clk, linux-edac, linux-fpga, Networking, linux-stm32, arm-soc, SoC Team, Olof Johansson On Wed, Mar 10, 2021 at 4:54 PM Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com> wrote: > On 10/03/2021 16:47, Krzysztof Kozlowski wrote: > > This edac Altera driver is very weird... it uses the same compatible > > differently depending whether this is 32-bit or 64-bit (e.g. Stratix > > 10)! On ARMv7 the compatible means for example one IRQ... On ARMv8, we > > have two. It's quite a new code (2019 from Intel), not some ancient > > legacy, so it should never have been accepted... > > Oh, it's not that horrible as it sounds. They actually have different > compatibles for edac driver with these differences (e.g. in interrupts). > They just do not use them and instead check for the basic (common?) > compatible and architecture... Anyway without testing I am not the > person to fix the edac driver. Ok, This should be fixed properly as you describe, but as a quick hack it wouldn't be hard to just change the #ifdef to check for CONFIG_64BIT instead of CONFIG_ARCH_STRATIX10 during the rename of the config symbol. Arnd ^ permalink raw reply [flat|nested] 18+ messages in thread
* Re: [RFC v2 3/5] arm64: socfpga: rename ARCH_STRATIX10 to ARCH_SOCFPGA64 2021-03-10 16:42 ` Arnd Bergmann @ 2021-03-11 7:08 ` Krzysztof Kozlowski 2021-03-11 9:14 ` Arnd Bergmann 0 siblings, 1 reply; 18+ messages in thread From: Krzysztof Kozlowski @ 2021-03-11 7:08 UTC (permalink / raw) To: Arnd Bergmann Cc: Tom Rix, Lee Jones, Catalin Marinas, Will Deacon, Dinh Nguyen, Rob Herring, Michael Turquette, Stephen Boyd, Moritz Fischer, Linux ARM, linux-kernel, DTML, linux-clk, linux-edac, linux-fpga, Networking, linux-stm32, arm-soc, SoC Team, Olof Johansson On 10/03/2021 17:42, Arnd Bergmann wrote: > On Wed, Mar 10, 2021 at 4:54 PM Krzysztof Kozlowski > <krzysztof.kozlowski@canonical.com> wrote: >> On 10/03/2021 16:47, Krzysztof Kozlowski wrote: >>> This edac Altera driver is very weird... it uses the same compatible >>> differently depending whether this is 32-bit or 64-bit (e.g. Stratix >>> 10)! On ARMv7 the compatible means for example one IRQ... On ARMv8, we >>> have two. It's quite a new code (2019 from Intel), not some ancient >>> legacy, so it should never have been accepted... >> >> Oh, it's not that horrible as it sounds. They actually have different >> compatibles for edac driver with these differences (e.g. in interrupts). >> They just do not use them and instead check for the basic (common?) >> compatible and architecture... Anyway without testing I am not the >> person to fix the edac driver. > > Ok, This should be fixed properly as you describe, but as a quick hack > it wouldn't be hard to just change the #ifdef to check for CONFIG_64BIT > instead of CONFIG_ARCH_STRATIX10 during the rename of the config > symbol. This would work. The trouble with renaming ARCH_SOCFPGA into ARCH_INTEL_SOCFPGA is that still SOCFPGA will appear in many other Kconfig symbols or even directory paths. Let me use ARCH_INTEL_SOCFPGA for 64bit here and renaming of 32bit a little bit later. Best regards, Krzysztof ^ permalink raw reply [flat|nested] 18+ messages in thread
* Re: [RFC v2 3/5] arm64: socfpga: rename ARCH_STRATIX10 to ARCH_SOCFPGA64 2021-03-11 7:08 ` Krzysztof Kozlowski @ 2021-03-11 9:14 ` Arnd Bergmann 2021-03-11 14:50 ` Krzysztof Kozlowski 0 siblings, 1 reply; 18+ messages in thread From: Arnd Bergmann @ 2021-03-11 9:14 UTC (permalink / raw) To: Krzysztof Kozlowski Cc: Tom Rix, Lee Jones, Catalin Marinas, Will Deacon, Dinh Nguyen, Rob Herring, Michael Turquette, Stephen Boyd, Moritz Fischer, Linux ARM, linux-kernel, DTML, linux-clk, linux-edac, linux-fpga, Networking, linux-stm32, arm-soc, SoC Team, Olof Johansson On Thu, Mar 11, 2021 at 8:08 AM Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com> wrote: > On 10/03/2021 17:42, Arnd Bergmann wrote: > > On Wed, Mar 10, 2021 at 4:54 PM Krzysztof Kozlowski > > <krzysztof.kozlowski@canonical.com> wrote: > >> On 10/03/2021 16:47, Krzysztof Kozlowski wrote: > >>> This edac Altera driver is very weird... it uses the same compatible > >>> differently depending whether this is 32-bit or 64-bit (e.g. Stratix > >>> 10)! On ARMv7 the compatible means for example one IRQ... On ARMv8, we > >>> have two. It's quite a new code (2019 from Intel), not some ancient > >>> legacy, so it should never have been accepted... > >> > >> Oh, it's not that horrible as it sounds. They actually have different > >> compatibles for edac driver with these differences (e.g. in interrupts). > >> They just do not use them and instead check for the basic (common?) > >> compatible and architecture... Anyway without testing I am not the > >> person to fix the edac driver. > > > > Ok, This should be fixed properly as you describe, but as a quick hack > > it wouldn't be hard to just change the #ifdef to check for CONFIG_64BIT > > instead of CONFIG_ARCH_STRATIX10 during the rename of the config > > symbol. > > This would work. The trouble with renaming ARCH_SOCFPGA into > ARCH_INTEL_SOCFPGA is that still SOCFPGA will appear in many other > Kconfig symbols or even directory paths. > > Let me use ARCH_INTEL_SOCFPGA for 64bit here and renaming of 32bit a > little bit later. Maybe you can introduce a hidden 'ARCH_INTEL_SOCFPGA' option first and select that from both the 32-bit and the 64-bit platforms in the first step. That should decouple the cleanups, so you can change the drivers to (only) 'depends on ARCH_INTEL_SOCFPGA' before removing the other names. Arnd ^ permalink raw reply [flat|nested] 18+ messages in thread
* Re: [RFC v2 3/5] arm64: socfpga: rename ARCH_STRATIX10 to ARCH_SOCFPGA64 2021-03-11 9:14 ` Arnd Bergmann @ 2021-03-11 14:50 ` Krzysztof Kozlowski 0 siblings, 0 replies; 18+ messages in thread From: Krzysztof Kozlowski @ 2021-03-11 14:50 UTC (permalink / raw) To: Arnd Bergmann Cc: Tom Rix, Lee Jones, Catalin Marinas, Will Deacon, Dinh Nguyen, Rob Herring, Michael Turquette, Stephen Boyd, Moritz Fischer, Linux ARM, linux-kernel, DTML, linux-clk, linux-edac, linux-fpga, Networking, linux-stm32, arm-soc, SoC Team, Olof Johansson On 11/03/2021 10:14, Arnd Bergmann wrote: > On Thu, Mar 11, 2021 at 8:08 AM Krzysztof Kozlowski > <krzysztof.kozlowski@canonical.com> wrote: >> On 10/03/2021 17:42, Arnd Bergmann wrote: >>> On Wed, Mar 10, 2021 at 4:54 PM Krzysztof Kozlowski >>> <krzysztof.kozlowski@canonical.com> wrote: >>>> On 10/03/2021 16:47, Krzysztof Kozlowski wrote: >>>>> This edac Altera driver is very weird... it uses the same compatible >>>>> differently depending whether this is 32-bit or 64-bit (e.g. Stratix >>>>> 10)! On ARMv7 the compatible means for example one IRQ... On ARMv8, we >>>>> have two. It's quite a new code (2019 from Intel), not some ancient >>>>> legacy, so it should never have been accepted... >>>> >>>> Oh, it's not that horrible as it sounds. They actually have different >>>> compatibles for edac driver with these differences (e.g. in interrupts). >>>> They just do not use them and instead check for the basic (common?) >>>> compatible and architecture... Anyway without testing I am not the >>>> person to fix the edac driver. >>> >>> Ok, This should be fixed properly as you describe, but as a quick hack >>> it wouldn't be hard to just change the #ifdef to check for CONFIG_64BIT >>> instead of CONFIG_ARCH_STRATIX10 during the rename of the config >>> symbol. >> >> This would work. The trouble with renaming ARCH_SOCFPGA into >> ARCH_INTEL_SOCFPGA is that still SOCFPGA will appear in many other >> Kconfig symbols or even directory paths. >> >> Let me use ARCH_INTEL_SOCFPGA for 64bit here and renaming of 32bit a >> little bit later. > > Maybe you can introduce a hidden 'ARCH_INTEL_SOCFPGA' option first > and select that from both the 32-bit and the 64-bit platforms in the first step. > > That should decouple the cleanups, so you can change the drivers to > (only) 'depends on ARCH_INTEL_SOCFPGA' before removing the other > names. Sure, let me try that. I have a v3 almost ready. Best regards, Krzysztof ^ permalink raw reply [flat|nested] 18+ messages in thread
end of thread, other threads:[~2021-03-11 14:51 UTC | newest] Thread overview: 18+ messages (download: mbox.gz / follow: Atom feed) -- links below jump to the message on this page -- 2021-03-10 8:33 [RFC v2 0/5] arm64 / clk: socfpga: simplifying, cleanups and compile testing Krzysztof Kozlowski 2021-03-10 8:33 ` [RFC v2 1/5] clk: socfpga: allow building N5X clocks with ARCH_N5X Krzysztof Kozlowski 2021-03-10 8:33 ` [RFC v2 2/5] clk: socfpga: build together Stratix 10, Agilex and N5X clock drivers Krzysztof Kozlowski 2021-03-10 8:38 ` [RFC v2 3/5] arm64: socfpga: rename ARCH_STRATIX10 to ARCH_SOCFPGA64 Krzysztof Kozlowski 2021-03-10 8:38 ` [RFC v2 4/5] arm64: intel: merge Agilex and N5X into ARCH_SOCFPGA64 Krzysztof Kozlowski 2021-03-10 8:38 ` [RFC v2 5/5] clk: socfpga: allow compile testing of Stratix 10 / Agilex clocks Krzysztof Kozlowski 2021-03-10 16:48 ` Arnd Bergmann 2021-03-11 7:29 ` Krzysztof Kozlowski 2021-03-10 9:45 ` [RFC v2 3/5] arm64: socfpga: rename ARCH_STRATIX10 to ARCH_SOCFPGA64 Lee Jones 2021-03-10 14:45 ` Tom Rix 2021-03-10 15:05 ` Krzysztof Kozlowski 2021-03-10 15:39 ` Arnd Bergmann 2021-03-10 15:47 ` Krzysztof Kozlowski 2021-03-10 15:54 ` Krzysztof Kozlowski 2021-03-10 16:42 ` Arnd Bergmann 2021-03-11 7:08 ` Krzysztof Kozlowski 2021-03-11 9:14 ` Arnd Bergmann 2021-03-11 14:50 ` Krzysztof Kozlowski
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