messages from 2019-04-14 20:16:27 to 2019-05-16 10:36:02 UTC [more...]
[GIT PULL] EDAC fixes for 5.2
2019-05-16 10:35 UTC
[PATCH 4.4 183/266] x86/MCE: Save microcode revision in machine check records
2019-05-15 10:54 UTC
[PATCH] fix rasdaemon high CPU usage when part of CPUs offline
2019-05-15 3:15 UTC
[PATCH v2] EDAC, mc: Fix edac_mc_find() in case no device is found
2019-05-14 10:49 UTC
[PATCH] EDAC, mc: Fix edac_mc_find() in case no device is found
2019-05-14 9:43 UTC (2+ messages)
[PATCH] EDAC, mpc85xx: Prevent building as a module
2019-05-14 8:31 UTC (11+ messages)
[PATCH] fix rasdaemon high CPU usage when part of CPUs offline
2019-05-13 22:16 UTC
[PATCH 0/4] Add Stratix10 OCRAM & SDMMC EDAC Support
2019-05-10 14:34 UTC (12+ messages)
` [1/4] EDAC, altera: Add Stratix10 OCRAM ECC support
` [PATCH 1/4] "
` [2/4] arm64: dts: stratix10: Add OCRAM EDAC node
` [PATCH 2/4] "
` [3/4] EDAC, altera: Add Stratix10 SDMMC support
` [PATCH 3/4] "
` [4/4] arm64: dts: stratix10: Add SDMMC EDAC node
` [PATCH 4/4] "
[PATCH v8 0/9] EDAC drivers for Armada XP L2 and DDR
2019-05-10 10:15 UTC (10+ messages)
` [PATCH v8 1/9] ARM: l2c: move cache-aurora-l2.h to asm/hardware
` [PATCH v8 2/9] ARM: aurora-l2: add prefix to MAX_RANGE_SIZE
` [PATCH v8 3/9] ARM: aurora-l2: add defines for parity and ECC registers
` [PATCH v8 4/9] ARM: l2x0: support parity-enable/disable on aurora
` [PATCH v8 5/9] dt-bindings: ARM: document marvell,ecc-enable binding
` [PATCH v8 6/9] ARM: l2x0: add marvell,ecc-enable property for aurora
` [PATCH v8 7/9] EDAC: Add missing debugfs_create_x32 wrapper
` [PATCH v8 8/9] EDAC: Add driver for the Marvell Armada XP SDRAM and L2 cache ECC
` [PATCH v8 9/9] EDAC: armada_xp: Add support for more SoCs
[PATCH 00/11] RAS/CEC: Fixes and cleanups
2019-05-09 18:09 UTC (12+ messages)
` [PATCH 01/11] RAS/CEC: Fix binary search function
` [PATCH 02/11] RAS/CEC: Convert the timer callback to a workqueue
` [PATCH 03/11] RAS/CEC: Fix pfn insertion
` [PATCH 04/11] RAS/CEC: Check count_threshold unconditionally
` [PATCH 05/11] RAS/CEC: Do not set decay value on error
` [PATCH 06/11] RAS/CEC: Fix potential memory leak
` [PATCH 07/11] RAS/CEC: Sanity-check array on every insertion
` [PATCH 08/11] RAS/CEC: Rename count_threshold to action_threshold
` [PATCH 09/11] RAS/CEC: Dump the different array element sections
` [PATCH 10/11] RAS/CEC: Add CONFIG_RAS_CEC_DEBUG and move CEC debug features there
` [PATCH 11/11] RAS/CEC: Add copyright
[PATCH] EDAC, sb_edac: remove redundant update of tad_base
2019-05-09 15:01 UTC (9+ messages)
EDAC: Fix memory leak in creating CSROW object
2019-05-08 18:50 UTC (15+ messages)
` [PATCH 1/2] EDAC/sysfs: Fix memory leak when creating a csrow object
` [PATCH 2/2] EDAC/sysfs: Drop device references properly
[GIT PULL] EDAC pile for 5.2
2019-05-07 3:25 UTC (2+ messages)
[GIT PULL] RAS updates for 5.2
2019-05-07 3:25 UTC (2+ messages)
[PATCH v2] EDAC support for SiFive SoCs
2019-05-06 11:27 UTC (2+ messages)
` [PATCH v2] edac: sifive: Add EDAC platform driver "
[PATCH] EDAC support for SiFive SoCs
2019-05-06 9:50 UTC (5+ messages)
` [PATCH] edac: sifive: Add EDAC platform driver "
(no subject)
2019-05-02 4:36 UTC
[PATCH v3 0/6] Handle MCA banks in a per_cpu way
2019-04-30 20:32 UTC (13+ messages)
` [v3,1/6] x86/MCE: Make struct mce_banks[] static
` [PATCH v3 1/6] "
` [v3,2/6] x86/MCE: Handle MCA controls in a per_cpu way
` [PATCH v3 2/6] "
` [v3,3/6] x86/MCE/AMD: Don't cache block addresses on SMCA systems
` [PATCH v3 3/6] "
` [v3,5/6] x86/MCE: Save MCA control bits that get set in hardware
` [PATCH v3 5/6] "
` [v3,4/6] x86/MCE: Make number of MCA banks per_cpu
` [PATCH v3 4/6] "
` [v3,6/6] x86/MCE: Treat MCE bank as initialized if control bits set in hardware
` [PATCH v3 6/6] "
Revert "EDAC/amd64: Support more than two controllers for chip select handling"
2019-04-25 14:55 UTC (2+ messages)
` [PATCH] "
[1/3] RAS/CEC: fix __find_elem
2019-04-25 8:05 UTC (20+ messages)
` [PATCH 1/3] "
` [2/3] RAS/CEC: make ces_entered smp safe
` [PATCH 2/3] "
` [tip:ras/core] RAS/CEC: Increment cec_entered under the mutex lock
` [3/3] RAS/CEC: immediate soft-offline page when count_threshold == 1
` [PATCH 3/3] "
[v4,2/2] x86/MCE/AMD: Don't report L1 BTB MCA errors on some Family 17h models
2019-04-23 18:19 UTC (3+ messages)
` [tip:ras/core] x86/MCE/AMD: Don't report L1 BTB MCA errors on some family "
[v2,1/2] ras: fix an off-by-one error in __find_elem()
2019-04-21 8:27 UTC (18+ messages)
` [PATCH v2 1/2] "
` [v2,2/2] ras: close the race condition with timer
` [PATCH v2 2/2] "
[1/2] ras: fix an off-by-one error in __find_elem()
2019-04-18 22:54 UTC (36+ messages)
` [PATCH 1/2] "
` [2/2] ras: close the race condition with timer
` [PATCH 2/2] "
[PATCH 0/3] L2 cache controller and EDAC support for SiFive SoCs
2019-04-18 12:50 UTC (11+ messages)
` [1/3] RISC-V: Add DT documentation for SiFive L2 Cache Controller
` [PATCH 1/3] "
` [2/3] RISC-V: sifive_l2_cache: Add L2 cache controller driver for SiFive SoCs
` [PATCH 2/3] "
` [3/3] edac: sifive: Add EDAC platform "
` [PATCH 3/3] "
[PATCH v2 0/6] Handle MCA banks in a per_cpu way
2019-04-16 17:36 UTC (12+ messages)
` [v2,2/6] x86/MCE: Handle MCA controls "
` [PATCH v2 2/6] "
` [v2,3/6] x86/MCE/AMD: Don't cache block addresses on SMCA systems
` [PATCH v2 3/6] "
` [v2,4/6] x86/MCE: Make number of MCA banks per_cpu
` [PATCH v2 4/6] "
[PATCHv1] drivers: edac: This patch fix the following checkpatch warning
2019-04-14 20:16 UTC (4+ messages)
` [PATCH] "
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