RE: [EXT] mpc85xx_edac PCI broken for P2010 and T1042, possibly more

From: York Sun <york.sun@nxp.com>
To: "jocke@infinera.com" <joakim.tjernlund@infinera.com>,
	"linux-edac@vger.kernel.org" <linux-edac@vger.kernel.org>,
	Leo Li <leoyang.li@nxp.com>
Subject: RE: [EXT] mpc85xx_edac PCI broken for P2010 and T1042, possibly more
Date: Thu, 29 Aug 2019 12:32:37 +0000	[thread overview]
Message-ID: <AM0PR04MB39719E7D451AA7DFD109A5139AA20@AM0PR04MB3971.eurprd04.prod.outlook.com> (raw)
In-Reply-To: <1b86d79d26eafe50731e0664e7b7bc05aab12b47.camel@infinera.com>

Joakim,

You are probably right about PCI. It has legacy code and not regularly used. Please follow up with Leo as I have left software department.

York

> -----Original Message-----
> From: Joakim Tjernlund <Joakim.Tjernlund@infinera.com>
> Sent: Thursday, August 29, 2019 3:40 AM
> To: linux-edac@vger.kernel.org; York Sun <york.sun@nxp.com>
> Subject: [EXT] mpc85xx_edac PCI broken for P2010 and T1042, possibly more
>
> Caution: EXT Email
>
> PCIe errors, don't know which, causes endless IRQs for EDAC's PCIe routine:
>
> [   17.690716] irq 26: nobody cared (try booting with the "irqpoll" option)
> [   17.697417] CPU: 0 PID: 0 Comm: swapper Not tainted 4.14.92+ #24
> [   17.703334] Call Trace:
> [   17.705780] [df9edf10] [c0056990] __report_bad_irq.isra.7+0x34/0xdc
> (unreliable)
> [   17.713181] [df9edf30] [c0056d20] note_interrupt+0x274/0x2c0
> [   17.718840] [df9edf60] [c00549e0] handle_irq_event_percpu+0x1a0/0x208
> [   17.725281] [df9edfa0] [c0054a80] handle_irq_event+0x38/0x5c
> [   17.730940] [df9edfb0] [c0057668] handle_fasteoi_irq+0xb0/0x1e0
> [   17.736867] [df9edfc0] [c005404c] generic_handle_irq+0x3c/0x5c
> [   17.742703] [df9edfd0] [c0004be0] __do_irq+0x48/0x10c
> [   17.747752] [df9edff0] [c000c398] call_do_irq+0x24/0x3c
> [   17.752977] [c0453e80] [c0004d08] do_IRQ+0x64/0xc4
> [   17.757768] [c0453ea0] [c000da3c] ret_from_except+0x0/0x18
> [   17.763257] --- interrupt: 501 at arch_cpu_idle+0x4c/0x5c
> [   17.763257]     LR = cpu_startup_entry+0x17c/0x20c
> [   17.773437] [c0453f60] [c004de1c] cpu_startup_entry+0x74/0x20c
> (unreliable)
> [   17.780405] [c0453fb0] [c03fc988] start_kernel+0x34c/0x360
> [   17.785889] [c0453ff0] [c0000380] set_ivor+0x10c/0x148
> [   17.791024] handlers:
> [   17.793296] [<c0238e74>] mpc85xx_pci_isr
> [   17.797213] Disabling IRQ #26
>
> This is because
> static irqreturn_t mpc85xx_pci_isr(int irq, void *dev_id) {
>         struct edac_pci_ctl_info *pci = dev_id;
>         struct mpc85xx_pci_pdata *pdata = pci->pvt_info;
>         u32 err_detect;
>
>         err_detect = in_be32(pdata->pci_vbase + MPC85XX_PCI_ERR_DR);
>
>         if (!err_detect)
>                 return IRQ_NONE;
> always end with IRQ_NONE.
>
>
> Making EDAC polled just logs endless garbage:
> Aug 29 10:44:22 xhaul-b02 kernel: PCIe error(s) detected Aug 29 10:44:22
> xhaul-b02 kernel: PCIe ERR_DR register: 0x00000000 Aug 29 10:44:22 xhaul-
> b02 kernel: PCIe ERR_CAP_STAT register: 0x00000000 Aug 29 10:44:22 xhaul-
> b02 kernel: PCIe ERR_CAP_R0 register: 0x00000000 Aug 29 10:44:22 xhaul-b02
> kernel: PCIe ERR_CAP_R1 register: 0x00000000 Aug 29 10:44:22 xhaul-b02
> kernel: PCIe ERR_CAP_R2 register: 0x00000000 Aug 29 10:44:22 xhaul-b02
> kernel: PCIe ERR_CAP_R3 register: 0x00000000
>
> It seems to that PCI edac has never worked and needs some love from NXP
> not sure who is the NXP maintainer though, York?
>
>   Jocke