From: Sherry Sun <sherry.sun@nxp.com>
To: Robert Richter <rrichter@marvell.com>
Cc: "bp@alien8.de" <bp@alien8.de>,
"mchehab@kernel.org" <mchehab@kernel.org>,
"tony.luck@intel.com" <tony.luck@intel.com>,
"james.morse@arm.com" <james.morse@arm.com>,
"michal.simek@xilinx.com" <michal.simek@xilinx.com>,
"manish.narani@xilinx.com" <manish.narani@xilinx.com>,
"linux-edac@vger.kernel.org" <linux-edac@vger.kernel.org>,
"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
Frank Li <frank.li@nxp.com>
Subject: RE: [PATCH v2 4/4] EDAC: synopsys: Add useful debug and output information for 64bit systems
Date: Thu, 2 Apr 2020 08:44:57 +0000 [thread overview]
Message-ID: <VI1PR04MB49608E4D6AAB50FA550380EC92C60@VI1PR04MB4960.eurprd04.prod.outlook.com> (raw)
In-Reply-To: <20200402072005.ma6etmns2pdzuqaw@rric.localdomain>
Hi Robert,
> -----Original Message-----
> From: Robert Richter <rrichter@marvell.com>
> Sent: 2020年4月2日 15:20
> To: Sherry Sun <sherry.sun@nxp.com>
> Cc: bp@alien8.de; mchehab@kernel.org; tony.luck@intel.com;
> james.morse@arm.com; michal.simek@xilinx.com;
> manish.narani@xilinx.com; linux-edac@vger.kernel.org; linux-
> kernel@vger.kernel.org; Frank Li <frank.li@nxp.com>
> Subject: Re: [PATCH v2 4/4] EDAC: synopsys: Add useful debug and output
> information for 64bit systems
>
> On 01.04.20 14:32:58, Sherry Sun wrote:
> > > From: Robert Richter <rrichter@marvell.com> On 01.04.20 15:39:09,
> > > Sherry Sun wrote:
>
> > > > --- a/drivers/edac/synopsys_edac.c
> > > > +++ b/drivers/edac/synopsys_edac.c
> > > > @@ -278,18 +278,22 @@
> > > > * @col: Column number.
> > > > * @bank: Bank number.
> > > > * @bitpos: Bit position.
> > > > - * @data: Data causing the error.
> > > > + * @data_low: Low bit data causing the error.
> > > > + * @data_high: High bit data causing the error(used for 64 bit
> > > systems).
> > > > * @bankgrpnr: Bank group number.
> > > > * @blknr: Block number.
> > > > + * @syndrome: Syndrome of the error.
> > > > */
> > > > struct ecc_error_info {
> > > > u32 row;
> > > > u32 col;
> > > > u32 bank;
> > > > u32 bitpos;
> > > > - u32 data;
> > > > + u32 data_low;
> > > > + u32 data_high;
> > >
> > > Where are 16, 32 and 64 bit widths. You could handle them all the
> > > same in a u64.
> > >
> > > If I am not wrong, the width is fix for the whole mci. So you could
> > > create various .get_error_info() functions depending on the data
> > > width without run time width checks.
> > >
> >
> > Yes, here we can use u64. Will correct it in v3.
> > For the zynq, it's 16-bit bus width, for imx8mp, it's 64-bit bus width.
> > But for zynqmp, it's optional between 32-bit and 64-bit bus width, So
> > we had better run time check the bus width, what do you think?
>
> I am wondering a bit here. *get_dtype() is used only in init_csrows() which
> sets up the mci. So it will be a fix value all the time after init. With that you
> easily can setup functions depending on the width, alternatively the width
> could be stored in struct synps_platform_data or struct synps_edac_priv.
>
Yes, I think your suggestion is reasonable, I will have a try later.
> >
> > > > u32 bankgrpnr;
> > > > u32 blknr;
> > > > + u32 syndrome;
> > > > };
>
> > > @@ -480,20
> > > > +559,27 @@ static void handle_error(struct mem_ctl_info *mci,
> > > > +struct
> > > > synps_ecc_status *p) {
> > > > struct synps_edac_priv *priv = mci->pvt_info;
> > > > struct ecc_error_info *pinf;
> > > > + int n;
> > > >
> > > > if (p->ce_cnt) {
> > > > pinf = &p->ceinfo;
> > > > if (priv->p_data->quirks & DDR_ECC_INTR_SUPPORT) {
> > > > - snprintf(priv->message, SYNPS_EDAC_MSG_SIZE,
> > > > - "DDR ECC error type:%s Row %d Bank %d
> > > BankGroup Number %d Block Number %d Bit Position: %d Data: 0x%08x",
> > > > - "CE", pinf->row, pinf->bank,
> > > > - pinf->bankgrpnr, pinf->blknr,
> > > > - pinf->bitpos, pinf->data);
> > > > + n = snprintf(priv->message, SYNPS_EDAC_MSG_SIZE,
> > > > + "DDR ECC error type:%s Row %d Bank %d
> > > BankGroup Number %d Block Number %d Bit Position: %d Data: 0x%08x",
> > > > + "CE", pinf->row, pinf->bank,
> > > > + pinf->bankgrpnr, pinf->blknr,
> > > > + pinf->bitpos, pinf->data_low);
> > > > +
> > > > + if (zynqmp_get_dtype(priv->baseaddr) == DEV_X8)
> > >
> > > This is zynqmp specific, right? but you call it in the generic
> > > function handle_error().
> >
> > Yes, although handle_error() is a generic function, but this operation
> > is checked by priv->p_data->quirks, so here is zynqmp and imx8mp
> > specific.
>
> Naah, this is a bit hacky, just make 2 variants of handlers and set them up
> during init. Storing the width in some private data would be an alternative.
>
Okay, I will try to store the bus width in private data.Thanks.
Best regards
Sherry Sun
> Thanks,
>
> -Robert
>
> >
> > Best regards
> > Sherry Sun
> >
> > >
> > > -Robert
> > >
> > > > + snprintf(priv->message + n,
> > > > + SYNPS_EDAC_MSG_SIZE - n,
> > > > + " Data_high: 0x%08x Syndrome:
> > > 0x%08x",
> > > > + pinf->data_high, pinf->syndrome);
> > > > } else {
> > > > snprintf(priv->message, SYNPS_EDAC_MSG_SIZE,
> > > > "DDR ECC error type:%s Row %d Bank %d
> > > Col %d Bit Position: %d Data: 0x%08x",
> > > > "CE", pinf->row, pinf->bank, pinf->col,
> > > > - pinf->bitpos, pinf->data);
> > > > + pinf->bitpos, pinf->data_low);
> > > > }
> > > >
> > > > edac_mc_handle_error(HW_EVENT_ERR_CORRECTED, mci,
prev parent reply other threads:[~2020-04-02 8:45 UTC|newest]
Thread overview: 9+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-04-01 7:39 [PATCH v2 0/4] Add edac driver for i.MX8MP based on synopsys edac driver Sherry Sun
2020-04-01 7:39 ` [PATCH v2 1/4] dt-bindings: memory-controllers: Add i.MX8MP DDRC binding doc Sherry Sun
2020-04-01 7:39 ` [PATCH v2 2/4] EDAC: Add synopsys edac driver support for i.MX8MP Sherry Sun
2020-04-01 7:39 ` [PATCH v2 3/4] EDAC: synopsys: Add " Sherry Sun
2020-04-01 7:39 ` [PATCH v2 4/4] EDAC: synopsys: Add useful debug and output information for 64bit systems Sherry Sun
2020-04-01 10:56 ` Robert Richter
2020-04-01 14:32 ` Sherry Sun
2020-04-02 7:20 ` Robert Richter
2020-04-02 8:44 ` Sherry Sun [this message]
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