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From: Borislav Petkov <bp@alien8.de>
To: Yazen Ghannam <yazen.ghannam@amd.com>
Cc: linux-edac@vger.kernel.org, linux-kernel@vger.kernel.org,
	mchehab@kernel.org, tony.luck@intel.com,
	Smita.KoralahalliChannabasappa@amd.com
Subject: Re: [PATCH v2 03/31] EDAC/amd64: Don't use naked values for DF registers
Date: Fri, 25 Jun 2021 17:21:08 +0200	[thread overview]
Message-ID: <YNX0ZLRSLgmm2LiA@zn.tnic> (raw)
In-Reply-To: <20210623192002.3671647-4-yazen.ghannam@amd.com>

On Wed, Jun 23, 2021 at 07:19:34PM +0000, Yazen Ghannam wrote:
> +static struct df_reg df_regs[] = {
> +	/* D18F0x50 (FabricBlockInstanceInformation3_CS) */
> +	[FAB_BLK_INST_INFO_3]	=	{0, 0x50},
> +	/* D18F0x104 (DramHoleControl) */
> +	[DRAM_HOLE_CTL]		=	{0, 0x104},
> +	/* D18F0x110 (DramBaseAddress) */
> +	[DRAM_BASE_ADDR]	=	{0, 0x110},
> +	/* D18F0x114 (DramLimitAddress) */
> +	[DRAM_LIMIT_ADDR]	=	{0, 0x114},
> +	/* D18F0x1B4 (DramOffset) */
> +	[DRAM_OFFSET]		=	{0, 0x1B4},
> +	/* D18F1x208 (SystemFabricIdMask) */
> +	[SYS_FAB_ID_MASK]	=	{1, 0x208},
> +};
> +
>  static int umc_normaddr_to_sysaddr(u64 norm_addr, u16 nid, u8 umc, u64 *sys_addr)
>  {
>  	u64 dram_base_addr, dram_limit_addr, dram_hole_base;
> @@ -1059,8 +1091,9 @@ static int umc_normaddr_to_sysaddr(u64 norm_addr, u16 nid, u8 umc, u64 *sys_addr
>  	u8 cs_mask, cs_id = 0;
>  	bool hash_enabled = false;
>  
> -	/* Read D18F0x1B4 (DramOffset), check if base 1 is used. */
> -	if (amd_df_indirect_read(nid, 0, 0x1B4, umc, &tmp))
> +	struct df_reg reg;
> +
> +	if (amd_df_indirect_read(nid, df_regs[DRAM_OFFSET], umc, &tmp))
>  		goto out_err;
>  
>  	/* Remove HiAddrOffset from normalized address, if enabled: */
> @@ -1073,8 +1106,9 @@ static int umc_normaddr_to_sysaddr(u64 norm_addr, u16 nid, u8 umc, u64 *sys_addr
>  		}
>  	}
>  
> -	/* Read D18F0x110 (DramBaseAddress). */
> -	if (amd_df_indirect_read(nid, 0, 0x110 + (8 * base), umc, &tmp))
> +	reg = df_regs[DRAM_BASE_ADDR];
> +	reg.offset += base * 8;

So this looks weird: you have a df_regs[] array of all those different
DF registers which I'd assume is a read-only thing because, well, those
func and offset things are immutable, i.e., hw registers offsets etc.

But then here you go and and modify the offset.

And that df_regs array is globally visible in the driver and if some
later functionality decides to use it, it'll see the modified offset.

IOW, I'd make that array read only (const) and use local vars instead to
pass down to amd_df_indirect_read().

And I'm also questioning what the point is for that df_reg thing?

You have them defined but then you have to change them.

I.e., you can just as well pass in func and offset separately and be
done with it.

But maybe there's something else happening in the patches which comes
later and which will make me go, ahaa.

Thx.

-- 
Regards/Gruss,
    Boris.

https://people.kernel.org/tglx/notes-about-netiquette

  reply	other threads:[~2021-06-25 15:21 UTC|newest]

Thread overview: 45+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-06-23 19:19 [PATCH v2 00/31] AMD MCA Address Translation Updates Yazen Ghannam
2021-06-23 19:19 ` [PATCH v2 01/31] x86/MCE/AMD, EDAC/amd64: Move address translation to AMD64 EDAC Yazen Ghannam
2021-06-23 19:19 ` [PATCH v2 02/31] x86/amd_nb, EDAC/amd64: Move DF Indirect Read " Yazen Ghannam
2021-06-23 19:19 ` [PATCH v2 03/31] EDAC/amd64: Don't use naked values for DF registers Yazen Ghannam
2021-06-25 15:21   ` Borislav Petkov [this message]
2021-07-08 19:35     ` Yazen Ghannam
2021-06-23 19:19 ` [PATCH v2 04/31] EDAC/amd64: Allow for DF Indirect Broadcast reads Yazen Ghannam
2021-06-30 16:22   ` Borislav Petkov
2021-07-08 19:44     ` Yazen Ghannam
2021-06-23 19:19 ` [PATCH v2 05/31] EDAC/amd64: Add context struct Yazen Ghannam
2021-06-30 17:17   ` Borislav Petkov
2021-07-08 19:53     ` Yazen Ghannam
2021-06-23 19:19 ` [PATCH v2 06/31] EDAC/amd64: Define Data Fabric operations Yazen Ghannam
2021-06-30 17:19   ` Borislav Petkov
2021-07-08 19:55     ` Yazen Ghannam
2021-06-23 19:19 ` [PATCH v2 07/31] EDAC/amd64: Define functions for DramOffset Yazen Ghannam
2021-06-30 17:27   ` Borislav Petkov
2021-07-08 20:08     ` Yazen Ghannam
2021-06-23 19:19 ` [PATCH v2 08/31] EDAC/amd64: Define function to read DRAM address map registers Yazen Ghannam
2021-06-30 17:29   ` Borislav Petkov
2021-06-23 19:19 ` [PATCH v2 09/31] EDAC/amd64: Define function to find interleaving mode Yazen Ghannam
2021-06-30 17:33   ` Borislav Petkov
2021-07-08 20:09     ` Yazen Ghannam
2021-06-23 19:19 ` [PATCH v2 10/31] EDAC/amd64: Define function to denormalize address Yazen Ghannam
2021-06-23 19:19 ` [PATCH v2 11/31] EDAC/amd64: Define function to add DRAM base and hole Yazen Ghannam
2021-06-23 19:19 ` [PATCH v2 12/31] EDAC/amd64: Define function to dehash address Yazen Ghannam
2021-06-23 19:19 ` [PATCH v2 13/31] EDAC/amd64: Define function to check DRAM limit address Yazen Ghannam
2021-06-23 19:19 ` [PATCH v2 14/31] EDAC/amd64: Remove goto statements Yazen Ghannam
2021-06-23 19:19 ` [PATCH v2 15/31] EDAC/amd64: Simplify function parameters Yazen Ghannam
2021-06-23 19:19 ` [PATCH v2 16/31] EDAC/amd64: Define function to get Interleave Address Bit Yazen Ghannam
2021-06-23 19:19 ` [PATCH v2 17/31] EDAC/amd64: Skip denormalization if no interleaving Yazen Ghannam
2021-06-23 19:19 ` [PATCH v2 18/31] EDAC/amd64: Define function to get number of interleaved channels Yazen Ghannam
2021-06-23 19:19 ` [PATCH v2 19/31] EDAC/amd64: Define function to get number of interleaved dies Yazen Ghannam
2021-06-23 19:19 ` [PATCH v2 20/31] EDAC/amd64: Define function to get number of interleaved sockets Yazen Ghannam
2021-06-23 19:19 ` [PATCH v2 21/31] EDAC/amd64: Remove unnecessary assert Yazen Ghannam
2021-06-23 19:19 ` [PATCH v2 22/31] EDAC/amd64: Define function to make space for CS ID Yazen Ghannam
2021-06-23 19:19 ` [PATCH v2 23/31] EDAC/amd64: Define function to calculate " Yazen Ghannam
2021-06-23 19:19 ` [PATCH v2 24/31] EDAC/amd64: Define function to insert CS ID into address Yazen Ghannam
2021-06-23 19:19 ` [PATCH v2 25/31] EDAC/amd64: Define function to get CS Fabric ID Yazen Ghannam
2021-06-23 19:19 ` [PATCH v2 26/31] EDAC/amd64: Define function to find shift and mask values Yazen Ghannam
2021-06-23 19:19 ` [PATCH v2 27/31] EDAC/amd64: Update CS ID calculation to match reference code Yazen Ghannam
2021-06-23 19:19 ` [PATCH v2 28/31] EDAC/amd64: Match hash function to " Yazen Ghannam
2021-06-23 19:20 ` [PATCH v2 29/31] EDAC/amd64: Define helper function to get interleave address select bit Yazen Ghannam
2021-06-23 19:20 ` [PATCH v2 30/31] EDAC/amd64: Add support for address translation on DF3 systems Yazen Ghannam
2021-06-23 19:20 ` [PATCH v2 31/31] EDAC/amd64: Add glossary of acronyms for address translation Yazen Ghannam

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