From: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
To: Arnd Bergmann <arnd@arndb.de>
Cc: Catalin Marinas <catalin.marinas@arm.com>,
Will Deacon <will@kernel.org>, Dinh Nguyen <dinguyen@kernel.org>,
Rob Herring <robh+dt@kernel.org>,
Michael Turquette <mturquette@baylibre.com>,
Stephen Boyd <sboyd@kernel.org>, Moritz Fischer <mdf@kernel.org>,
Tom Rix <trix@redhat.com>, Lee Jones <lee.jones@linaro.org>,
Linux ARM <linux-arm-kernel@lists.infradead.org>,
"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
DTML <devicetree@vger.kernel.org>,
linux-clk <linux-clk@vger.kernel.org>,
linux-edac@vger.kernel.org, linux-fpga@vger.kernel.org,
Networking <netdev@vger.kernel.org>,
linux-stm32@st-md-mailman.stormreply.com,
arm-soc <arm@kernel.org>, SoC Team <soc@kernel.org>,
Olof Johansson <olof@lixom.net>
Subject: Re: [RFC v2 5/5] clk: socfpga: allow compile testing of Stratix 10 / Agilex clocks
Date: Thu, 11 Mar 2021 08:29:42 +0100 [thread overview]
Message-ID: <a1f296ad-19db-824e-5d33-c93c6af87e70@canonical.com> (raw)
In-Reply-To: <CAK8P3a27hAExCKtsO7k1HQwLKk-5Q8uxYYt_G2v-Osq8RZv2tg@mail.gmail.com>
On 10/03/2021 17:48, Arnd Bergmann wrote:
> On Wed, Mar 10, 2021 at 9:38 AM Krzysztof Kozlowski
> <krzysztof.kozlowski@canonical.com> wrote:
>> --- a/drivers/clk/socfpga/Kconfig
>> +++ b/drivers/clk/socfpga/Kconfig
>> @@ -1,6 +1,17 @@
>> # SPDX-License-Identifier: GPL-2.0
>> +config COMMON_CLK_SOCFPGA
>> + bool "Intel SoCFPGA family clock support" if COMPILE_TEST && !ARCH_SOCFPGA && !ARCH_SOCFPGA64
>> + depends on ARCH_SOCFPGA || ARCH_SOCFPGA64 || COMPILE_TEST
>> + default y if ARCH_SOCFPGA || ARCH_SOCFPGA64
>
> I think the 'depends on' line here is redundant if you also have the
> 'if' line and the default.
Yes, you're right.
Best regards,
Krzysztof
next prev parent reply other threads:[~2021-03-11 7:30 UTC|newest]
Thread overview: 18+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-03-10 8:33 [RFC v2 0/5] arm64 / clk: socfpga: simplifying, cleanups and compile testing Krzysztof Kozlowski
2021-03-10 8:33 ` [RFC v2 1/5] clk: socfpga: allow building N5X clocks with ARCH_N5X Krzysztof Kozlowski
2021-03-10 8:33 ` [RFC v2 2/5] clk: socfpga: build together Stratix 10, Agilex and N5X clock drivers Krzysztof Kozlowski
2021-03-10 8:38 ` [RFC v2 3/5] arm64: socfpga: rename ARCH_STRATIX10 to ARCH_SOCFPGA64 Krzysztof Kozlowski
2021-03-10 8:38 ` [RFC v2 4/5] arm64: intel: merge Agilex and N5X into ARCH_SOCFPGA64 Krzysztof Kozlowski
2021-03-10 8:38 ` [RFC v2 5/5] clk: socfpga: allow compile testing of Stratix 10 / Agilex clocks Krzysztof Kozlowski
2021-03-10 16:48 ` Arnd Bergmann
2021-03-11 7:29 ` Krzysztof Kozlowski [this message]
2021-03-10 9:45 ` [RFC v2 3/5] arm64: socfpga: rename ARCH_STRATIX10 to ARCH_SOCFPGA64 Lee Jones
2021-03-10 14:45 ` Tom Rix
2021-03-10 15:05 ` Krzysztof Kozlowski
2021-03-10 15:39 ` Arnd Bergmann
2021-03-10 15:47 ` Krzysztof Kozlowski
2021-03-10 15:54 ` Krzysztof Kozlowski
2021-03-10 16:42 ` Arnd Bergmann
2021-03-11 7:08 ` Krzysztof Kozlowski
2021-03-11 9:14 ` Arnd Bergmann
2021-03-11 14:50 ` Krzysztof Kozlowski
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