From: Ard Biesheuvel <ardb@kernel.org>
To: linux-efi@vger.kernel.org
Cc: linux-arm-kernel@lists.infradead.org,
Ard Biesheuvel <ardb@kernel.org>,
Russell King <linux@armlinux.org.uk>,
Marc Zyngier <maz@kernel.org>, Nicolas Pitre <nico@fluxnic.net>,
Catalin Marinas <catalin.marinas@arm.com>,
Tony Lindgren <tony@atomide.com>,
Linus Walleij <linus.walleij@linaro.org>
Subject: [PATCH v3 4/5] ARM: decompressor: prepare cache_clean_flush for doing by-VA maintenance
Date: Mon, 24 Feb 2020 13:17:32 +0100 [thread overview]
Message-ID: <20200224121733.2202-5-ardb@kernel.org> (raw)
In-Reply-To: <20200224121733.2202-1-ardb@kernel.org>
In preparation for turning the decompressor's cache clean/flush
operations into proper by-VA maintenance for v7 cores, pass the
start and end addresses of the regions that need cache maintenance
into cache_clean_flush in registers r0 and r1.
Currently, all implementations of cache_clean_flush ignore these
values, so no functional change is expected as a result of this
patch.
Signed-off-by: Ard Biesheuvel <ardb@kernel.org>
---
arch/arm/boot/compressed/head.S | 15 +++++++++++++++
1 file changed, 15 insertions(+)
diff --git a/arch/arm/boot/compressed/head.S b/arch/arm/boot/compressed/head.S
index 674e55400cfd..12d631503bfa 100644
--- a/arch/arm/boot/compressed/head.S
+++ b/arch/arm/boot/compressed/head.S
@@ -533,12 +533,19 @@ dtb_check_done:
add sp, sp, r6
#endif
+ adr r0, restart
+ ldr r1, .Lclean_size
+ add r0, r0, r6
+ add r1, r1, r0
bl cache_clean_flush
badr r0, restart
add r0, r0, r6
mov pc, r0
+ .align 2
+.Lclean_size: .long _edata - restart
+
wont_overwrite:
/*
* If delta is zero, we are running at the address we were linked at.
@@ -629,6 +636,11 @@ not_relocated: mov r0, #0
add r2, sp, #0x10000 @ 64k max
mov r3, r7
bl decompress_kernel
+
+ get_inflated_image_size r1, r2, r3
+
+ mov r0, r4 @ start of inflated image
+ add r1, r1, r0 @ end of inflated image
bl cache_clean_flush
bl cache_off
@@ -1182,6 +1194,9 @@ __armv7_mmu_cache_off:
/*
* Clean and flush the cache to maintain consistency.
*
+ * On entry,
+ * r0 = start address
+ * r1 = end address (exclusive)
* On exit,
* r1, r2, r3, r9, r10, r11, r12 corrupted
* This routine must preserve:
--
2.17.1
next prev parent reply other threads:[~2020-02-24 12:17 UTC|newest]
Thread overview: 10+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-02-24 12:17 [PATCH v3 0/5] ARM: decompressor: use by-VA cache maintenance for v7 cores Ard Biesheuvel
2020-02-24 12:17 ` [PATCH v3 1/5] efi/arm: Work around missing cache maintenance in decompressor handover Ard Biesheuvel
2020-02-24 12:17 ` [PATCH v3 2/5] efi/arm: Pass start and end addresses to cache_clean_flush() Ard Biesheuvel
2020-02-24 12:17 ` [PATCH v3 3/5] ARM: decompressor: factor out routine to obtain the inflated image size Ard Biesheuvel
2020-02-24 12:17 ` Ard Biesheuvel [this message]
2020-02-24 12:17 ` [PATCH v3 5/5] ARM: decompressor: switch to by-VA cache maintenance for v7 cores Ard Biesheuvel
2020-02-25 15:48 ` [PATCH v3 0/5] ARM: decompressor: use " Linus Walleij
2020-02-25 17:18 ` Ard Biesheuvel
2020-02-25 17:30 ` Ard Biesheuvel
2020-02-25 21:25 ` Linus Walleij
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