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[2.7.60.249]) by smtp.gmail.com with ESMTPSA id q7sm129478wrc.55.2021.09.29.07.51.32 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 29 Sep 2021 07:51:33 -0700 (PDT) From: Alexandre Ghiti To: Jonathan Corbet , Paul Walmsley , Palmer Dabbelt , Albert Ou , Zong Li , Anup Patel , Atish Patra , Christoph Hellwig , Andrey Ryabinin , Alexander Potapenko , Andrey Konovalov , Dmitry Vyukov , Ard Biesheuvel , Arnd Bergmann , Kees Cook , Guo Ren , Heinrich Schuchardt , Mayuresh Chitale , linux-doc@vger.kernel.org, linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org, kasan-dev@googlegroups.com, linux-efi@vger.kernel.org, linux-arch@vger.kernel.org Cc: Alexandre Ghiti Subject: [PATCH v2 00/10] Introduce sv48 support without relocatable kernel Date: Wed, 29 Sep 2021 16:51:03 +0200 Message-Id: <20210929145113.1935778-1-alexandre.ghiti@canonical.com> X-Mailer: git-send-email 2.30.2 MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Precedence: bulk List-ID: X-Mailing-List: linux-efi@vger.kernel.org This patchset allows to have a single kernel for sv39 and sv48 without being relocatable. The idea comes from Arnd Bergmann who suggested to do the same as x86, that is mapping the kernel to the end of the address space, which allows the kernel to be linked at the same address for both sv39 and sv48 and then does not require to be relocated at runtime. This implements sv48 support at runtime. The kernel will try to boot with 4-level page table and will fallback to 3-level if the HW does not support it. Folding the 4th level into a 3-level page table has almost no cost at runtime. Tested on: - qemu rv64 sv39: OK - qemu rv64 sv48: OK - qemu rv64 sv39 + kasan: OK - qemu rv64 sv48 + kasan: OK - qemu rv32: OK - Unmatched: OK Changes in v2: - Rebase onto for-next - Fix KASAN - Fix stack canary - Get completely rid of MAXPHYSMEM configs - Add documentation Alexandre Ghiti (10): riscv: Allow to dynamically define VA_BITS riscv: Get rid of MAXPHYSMEM configs asm-generic: Prepare for riscv use of pud_alloc_one and pud_free riscv: Implement sv48 support riscv: Use pgtable_l4_enabled to output mmu_type in cpuinfo riscv: Explicit comment about user virtual address space size riscv: Improve virtual kernel memory layout dump Documentation: riscv: Add sv48 description to VM layout riscv: Initialize thread pointer before calling C functions riscv: Allow user to downgrade to sv39 when hw supports sv48 Documentation/riscv/vm-layout.rst | 36 ++ arch/riscv/Kconfig | 35 +- arch/riscv/configs/nommu_k210_defconfig | 1 - .../riscv/configs/nommu_k210_sdcard_defconfig | 1 - arch/riscv/configs/nommu_virt_defconfig | 1 - arch/riscv/include/asm/csr.h | 3 +- arch/riscv/include/asm/fixmap.h | 1 + arch/riscv/include/asm/kasan.h | 2 +- arch/riscv/include/asm/page.h | 10 + arch/riscv/include/asm/pgalloc.h | 40 +++ arch/riscv/include/asm/pgtable-64.h | 108 +++++- arch/riscv/include/asm/pgtable.h | 30 +- arch/riscv/include/asm/sparsemem.h | 6 +- arch/riscv/kernel/cpu.c | 23 +- arch/riscv/kernel/head.S | 4 +- arch/riscv/mm/context.c | 4 +- arch/riscv/mm/init.c | 323 +++++++++++++++--- arch/riscv/mm/kasan_init.c | 91 +++-- drivers/firmware/efi/libstub/efi-stub.c | 2 + include/asm-generic/pgalloc.h | 24 +- include/linux/sizes.h | 1 + 21 files changed, 615 insertions(+), 131 deletions(-) -- 2.30.2