From: Ira Weiny <ira.weiny@intel.com>
To: Dan Williams <dan.j.williams@intel.com>,
Ira Weiny <ira.weiny@intel.com>,
Dave Jiang <dave.jiang@intel.com>,
Jonathan Cameron <jonathan.cameron@huawei.com>,
Smita Koralahalli <Smita.KoralahalliChannabasappa@amd.com>,
Shiju Jose <shiju.jose@huawei.com>
Cc: Dan Carpenter <dan.carpenter@linaro.org>,
Yazen Ghannam <yazen.ghannam@amd.com>,
Davidlohr Bueso <dave@stgolabs.net>,
"Alison Schofield" <alison.schofield@intel.com>,
Vishal Verma <vishal.l.verma@intel.com>,
Ard Biesheuvel <ardb@kernel.org>, <linux-efi@vger.kernel.org>,
<linux-kernel@vger.kernel.org>, <linux-cxl@vger.kernel.org>,
Ira Weiny <ira.weiny@intel.com>,
"Rafael J. Wysocki" <rafael@kernel.org>,
Tony Luck <tony.luck@intel.com>, "Borislav Petkov" <bp@alien8.de>
Subject: RE: [PATCH v2 3/3] ras/events: Trace CXL CPER events without CXL stack
Date: Mon, 22 Apr 2024 21:10:29 -0700 [thread overview]
Message-ID: <662734b5cd6d4_bbee629455@iweiny-mobl.notmuch> (raw)
In-Reply-To: <6626fdc7b7e31_690a294a6@dwillia2-xfh.jf.intel.com.notmuch>
Dan Williams wrote:
> Ira Weiny wrote:
> > If CXL is solely managed by firmware (including HDM configuration and
> > event processing via firmware first) it is possible to run the system
> > without the CXL software loaded. In this case no CXL callback will be
> > loaded and CXL CPER errors will not be processed at all.
> >
> > In this case memory device and region (HPA) information is missing but
> > omitting the error completely is not friendly. Some device information
> > is available the event.
> >
> > Trace CXL CPER events if the CXL stack is not loaded. A balance was
> > chosen to decode only the CPER header as this configuration is likely
> > rare.
>
> I think the justification for this is weak and it pollutes the user ABI.
Do you want me to drop this patch or slim the tracepoint down even
further?
Looking at this again I feel like
54ce1927eb78 ("cxl/cper: Fix errant CPER prints for CXL events")
Was a mistake. PCI AER errors are both printed in
cper_estatus_print_section() and again printed/traced in pci_print_aer()
Why should CXL be any different?
Ira
prev parent reply other threads:[~2024-04-23 4:10 UTC|newest]
Thread overview: 9+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-04-22 22:25 [PATCH v2 0/3] efi/cxl-cper: Report CXL CPER events through tracing Ira Weiny
2024-04-22 22:25 ` [PATCH v2 1/3] acpi/ghes: Process CXL Component Events Ira Weiny
2024-04-22 23:54 ` Dan Williams
2024-04-23 3:47 ` Ira Weiny
2024-04-23 4:16 ` Ira Weiny
2024-04-22 22:25 ` [PATCH v2 2/3] cxl/pci: Process CPER events Ira Weiny
2024-04-22 22:25 ` [PATCH v2 3/3] ras/events: Trace CXL CPER events without CXL stack Ira Weiny
2024-04-23 0:16 ` Dan Williams
2024-04-23 4:10 ` Ira Weiny [this message]
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