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Wed, 18 Aug 2021 06:35:43 -0700 (PDT) Date: Wed, 18 Aug 2021 15:35:42 +0200 From: Thierry Reding To: Ulf Hansson Cc: Dmitry Osipenko , Jens Axboe , Jonathan Hunter , =?utf-8?B?TWljaGHFgiBNaXJvc8WCYXc=?= , David Heidelberg , Peter Geis , Adrian Hunter , Christoph Hellwig , Davidlohr Bueso , Rob Herring , Ion Agorria , Svyatoslav Ryhel , linux-tegra , linux-block , linux-efi Subject: Re: [PATCH v5 4/5] mmc: sdhci-tegra: Implement alternative_gpt_sector() Message-ID: References: <20210818005547.14497-1-digetx@gmail.com> <20210818005547.14497-5-digetx@gmail.com> MIME-Version: 1.0 Content-Type: multipart/signed; micalg=pgp-sha256; protocol="application/pgp-signature"; boundary="YsFHapze9CfLadea" Content-Disposition: inline In-Reply-To: User-Agent: Mutt/2.1.1 (e2a89abc) (2021-07-12) Precedence: bulk List-ID: X-Mailing-List: linux-efi@vger.kernel.org --YsFHapze9CfLadea Content-Type: text/plain; charset=us-ascii Content-Disposition: inline Content-Transfer-Encoding: quoted-printable On Wed, Aug 18, 2021 at 11:55:05AM +0200, Ulf Hansson wrote: > On Wed, 18 Aug 2021 at 02:57, Dmitry Osipenko wrote: > > > > Tegra20/30/114/124 Android devices place GPT at a non-standard location. > > Implement alternative_gpt_sector() callback of the MMC host ops which > > specifies that GPT location for the partition scanner. > > > > Signed-off-by: Dmitry Osipenko > > --- > > drivers/mmc/host/sdhci-tegra.c | 42 ++++++++++++++++++++++++++++++++++ > > 1 file changed, 42 insertions(+) > > > > diff --git a/drivers/mmc/host/sdhci-tegra.c b/drivers/mmc/host/sdhci-te= gra.c > > index 387ce9cdbd7c..24a713689d5b 100644 > > --- a/drivers/mmc/host/sdhci-tegra.c > > +++ b/drivers/mmc/host/sdhci-tegra.c > > @@ -116,6 +116,8 @@ > > */ > > #define NVQUIRK_HAS_TMCLK BIT(10) > > > > +#define NVQUIRK_HAS_ANDROID_GPT_SECTOR BIT(11) > > + > > /* SDMMC CQE Base Address for Tegra Host Ver 4.1 and Higher */ > > #define SDHCI_TEGRA_CQE_BASE_ADDR 0xF000 > > > > @@ -1361,6 +1363,7 @@ static const struct sdhci_tegra_soc_data soc_data= _tegra20 =3D { > > .pdata =3D &sdhci_tegra20_pdata, > > .dma_mask =3D DMA_BIT_MASK(32), > > .nvquirks =3D NVQUIRK_FORCE_SDHCI_SPEC_200 | > > + NVQUIRK_HAS_ANDROID_GPT_SECTOR | > > NVQUIRK_ENABLE_BLOCK_GAP_DET, > > }; > > > > @@ -1390,6 +1393,7 @@ static const struct sdhci_tegra_soc_data soc_data= _tegra30 =3D { > > .nvquirks =3D NVQUIRK_ENABLE_SDHCI_SPEC_300 | > > NVQUIRK_ENABLE_SDR50 | > > NVQUIRK_ENABLE_SDR104 | > > + NVQUIRK_HAS_ANDROID_GPT_SECTOR | > > NVQUIRK_HAS_PADCALIB, > > }; > > > > @@ -1422,6 +1426,7 @@ static const struct sdhci_pltfm_data sdhci_tegra1= 14_pdata =3D { > > static const struct sdhci_tegra_soc_data soc_data_tegra114 =3D { > > .pdata =3D &sdhci_tegra114_pdata, > > .dma_mask =3D DMA_BIT_MASK(32), > > + .nvquirks =3D NVQUIRK_HAS_ANDROID_GPT_SECTOR, > > }; > > > > static const struct sdhci_pltfm_data sdhci_tegra124_pdata =3D { > > @@ -1438,6 +1443,7 @@ static const struct sdhci_pltfm_data sdhci_tegra1= 24_pdata =3D { > > static const struct sdhci_tegra_soc_data soc_data_tegra124 =3D { > > .pdata =3D &sdhci_tegra124_pdata, > > .dma_mask =3D DMA_BIT_MASK(34), > > + .nvquirks =3D NVQUIRK_HAS_ANDROID_GPT_SECTOR, > > }; > > > > static const struct sdhci_ops tegra210_sdhci_ops =3D { > > @@ -1590,6 +1596,38 @@ static int sdhci_tegra_add_host(struct sdhci_hos= t *host) > > return ret; > > } > > > > +static int sdhci_tegra_alternative_gpt_sector(struct mmc_card *card, > > + sector_t *gpt_sector) > > +{ > > + unsigned int boot_sectors_num; > > + > > + /* filter out unrelated cards */ > > + if (card->ext_csd.rev < 3 || > > + !mmc_card_mmc(card) || > > + !mmc_card_is_blockaddr(card) || > > + mmc_card_is_removable(card->host)) > > + return -ENOENT; > > + > > + /* > > + * eMMC storage has two special boot partitions in addition to = the > > + * main one. NVIDIA's bootloader linearizes eMMC boot0->boot1-= >main > > + * accesses, this means that the partition table addresses are = shifted > > + * by the size of boot partitions. In accordance with the eMMC > > + * specification, the boot partition size is calculated as foll= ows: > > + * > > + * boot partition size =3D 128K byte x BOOT_SIZE_MULT > > + * > > + * Calculate number of sectors occupied by the both boot partit= ions. > > + */ > > + boot_sectors_num =3D card->ext_csd.raw_boot_mult * SZ_128K / > > + SZ_512 * MMC_NUM_BOOT_PARTITION; > > + > > + /* Defined by NVIDIA and used by Android devices. */ > > + *gpt_sector =3D card->ext_csd.sectors - boot_sectors_num - 1; > > + > > + return 0; > > +} >=20 > I suggest you move this code into the mmc core/block layer instead (it > better belongs there). >=20 > Additionally, let's add a new host cap, MMC_CAP_ALTERNATIVE_GPT, to > let the core know when it should use the code above. Couldn't a generic "alternative GPT" mean pretty much anything? As far as I know this is very specific to a series of Tegra chips and firmware running on them. On some of these devices you can even replace the OEM firmware by something custom that's less quirky. I'm not aware of anyone else employing this kind of quirk, so I don't want anyone to get any ideas that this is a good thing. Putting it into the core runs the risk of legitimizing this. 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