From: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
To: Ivan Bornyakov <i.bornyakov@metrotek.ru>,
mdf@kernel.org, hao.wu@intel.com, yilun.xu@intel.com,
trix@redhat.com, robh+dt@kernel.org,
krzysztof.kozlowski+dt@linaro.org
Cc: linux-fpga@vger.kernel.org, devicetree@vger.kernel.org,
linux-kernel@vger.kernel.org, system@metrotek.ru
Subject: Re: [PATCH 2/2] dt-bindings: fpga: add binding doc for ecp5-spi fpga mgr
Date: Fri, 15 Jul 2022 11:33:54 +0200 [thread overview]
Message-ID: <044a9736-a4ec-c250-7755-c80a5bcbe38b@linaro.org> (raw)
In-Reply-To: <20220714122657.17972-3-i.bornyakov@metrotek.ru>
On 14/07/2022 14:26, Ivan Bornyakov wrote:
> Add Device Tree Binding doc for Lattice ECP5 FPGA manager using slave
> SPI to load .bit formatted uncompressed bitstream image.
>
> Signed-off-by: Ivan Bornyakov <i.bornyakov@metrotek.ru>
> ---
> .../fpga/lattice,ecp5-spi-fpga-mgr.yaml | 71 +++++++++++++++++++
> 1 file changed, 71 insertions(+)
> create mode 100644 Documentation/devicetree/bindings/fpga/lattice,ecp5-spi-fpga-mgr.yaml
>
> diff --git a/Documentation/devicetree/bindings/fpga/lattice,ecp5-spi-fpga-mgr.yaml b/Documentation/devicetree/bindings/fpga/lattice,ecp5-spi-fpga-mgr.yaml
> new file mode 100644
> index 000000000000..79868f9c84e2
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/fpga/lattice,ecp5-spi-fpga-mgr.yaml
> @@ -0,0 +1,71 @@
> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/fpga/lattice,ecp5-spi-fpga-mgr.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Lattice ECP5 FPGA manager.
> +
> +maintainers:
> + - Ivan Bornyakov <i.bornyakov@metrotek.ru>
> +
> +description:
> + Device Tree Bindings for Lattice ECP5 FPGA Manager using slave SPI to
> + load the uncompressed bitstream in .bit format.
s/Device Tree Bindings for//
Instead describe the hardware you are adding bindings for. What is a
"Manager"? It is so broad and unspecific... It is some dedicated
hardware to communicate with FPGA or you just called this regular FPGA
interface exposed to the CPU/SoC?
> +
> +properties:
> + compatible:
> + enum:
> + - lattice,ecp5-spi-fpga-mgr
Do not encode interface name in compatible so no "spi".
> +
> + reg:
> + description: SPI chip select
> + maxItems: 1
> +
> + spi-max-frequency:
> + maximum: 60000000
Reference spi/spi-peripheral-props.yaml in allOf
> +
> + program-gpios:
> + description:
> + A GPIO line connected to PROGRAMN (active low) pin of the device.
> + Initiates configuration sequence.
> + maxItems: 1
> +
> + init-gpios:
> + description:
> + A GPIO line connected to INITN (active low) pin of the device.
> + Indicates the FPGA is ready to be configured.
> + maxItems: 1
> +
> + done-gpios:
> + description:
> + A GPIO line connected to DONE (active high) pin of the device.
> + Indicates that the configuration sequence is complete.
> + maxItems: 1
> +
> +required:
> + - compatible
> + - reg
> + - program-gpios
> + - init-gpios
> + - done-gpios
> +
> +additionalProperties: false
> +
> +examples:
> + - |
> + #include <dt-bindings/gpio/gpio.h>
> +
> + spi {
> + #address-cells = <1>;
Wrong indentation. 4-spaces for DTS example.
> + #size-cells = <0>;
> +
> + fpga_mgr@0 {
No underscores in node names.
> + compatible = "lattice,ecp5-spi-fpga-mgr";
> + spi-max-frequency = <20000000>;
> + reg = <0>;
> + program-gpios = <&gpio3 4 GPIO_ACTIVE_LOW>;
> + init-gpios = <&gpio3 3 GPIO_ACTIVE_LOW>;
> + done-gpios = <&gpio3 2 GPIO_ACTIVE_HIGH>;
> + };
> + };
Best regards,
Krzysztof
next prev parent reply other threads:[~2022-07-15 9:35 UTC|newest]
Thread overview: 8+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-07-14 12:26 [PATCH 0/2] Lattice ECP5 FPGA manager Ivan Bornyakov
2022-07-14 12:26 ` [PATCH 1/2] fpga: ecp5-spi: add " Ivan Bornyakov
2022-07-14 12:26 ` [PATCH 2/2] dt-bindings: fpga: add binding doc for ecp5-spi fpga mgr Ivan Bornyakov
2022-07-15 9:33 ` Krzysztof Kozlowski [this message]
2022-07-15 10:03 ` Ivan Bornyakov
2022-07-18 13:06 ` Krzysztof Kozlowski
2022-07-18 13:46 ` Ivan Bornyakov
2022-07-18 14:41 ` Krzysztof Kozlowski
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=044a9736-a4ec-c250-7755-c80a5bcbe38b@linaro.org \
--to=krzysztof.kozlowski@linaro.org \
--cc=devicetree@vger.kernel.org \
--cc=hao.wu@intel.com \
--cc=i.bornyakov@metrotek.ru \
--cc=krzysztof.kozlowski+dt@linaro.org \
--cc=linux-fpga@vger.kernel.org \
--cc=linux-kernel@vger.kernel.org \
--cc=mdf@kernel.org \
--cc=robh+dt@kernel.org \
--cc=system@metrotek.ru \
--cc=trix@redhat.com \
--cc=yilun.xu@intel.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).