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From: Tom Rix <trix@redhat.com>
To: Nava kishore Manne <nava.manne@xilinx.com>,
	mdf@kernel.org, robh+dt@kernel.org, michal.simek@xilinx.com,
	linux-fpga@vger.kernel.org, devicetree@vger.kernel.org,
	linux-arm-kernel@lists.infradead.org,
	linux-kernel@vger.kernel.org, chinnikishore369@gmail.com
Cc: git@xilinx.com
Subject: Re: [PATCH v2 2/2] fpga: Add support for Xilinx DFX AXI Shutdown manager
Date: Thu, 4 Mar 2021 05:51:24 -0800	[thread overview]
Message-ID: <156f2240-2360-b47a-26af-cfd4eb88ddf5@redhat.com> (raw)
In-Reply-To: <20210211051148.16722-3-nava.manne@xilinx.com>


On 2/10/21 9:11 PM, Nava kishore Manne wrote:
> This patch adds support for Xilinx Dynamic Function eXchange(DFX) AXI
> shutdown manager IP. It can be used to safely handling the AXI traffic
> on a Reconfigurable Partition when it is undergoing dynamic reconfiguration
> and there by preventing system deadlock that may occur if AXI transactions
> are interrupted during reconfiguration.
>
> PR-Decoupler and AXI shutdown manager are completely different IPs.
> But both the IP registers are compatible and also both belong to the
> same sub-system (fpga-bridge).So using same driver for both IP's.
>
> Signed-off-by: Nava kishore Manne <nava.manne@xilinx.com>
> ---
> Changes for v2:
>                 -Fixed some minor coding issues as suggested by
>                  Tom Rix.
>
>  drivers/fpga/Kconfig               |  9 +++++++-
>  drivers/fpga/xilinx-pr-decoupler.c | 37 ++++++++++++++++++++++++++----
>  2 files changed, 40 insertions(+), 6 deletions(-)
>
> diff --git a/drivers/fpga/Kconfig b/drivers/fpga/Kconfig
> index 5645226ca3ce..bf85b9a65ec2 100644
> --- a/drivers/fpga/Kconfig
> +++ b/drivers/fpga/Kconfig
> @@ -118,10 +118,17 @@ config XILINX_PR_DECOUPLER
>  	depends on FPGA_BRIDGE
>  	depends on HAS_IOMEM
>  	help
> -	  Say Y to enable drivers for Xilinx LogiCORE PR Decoupler.
> +	  Say Y to enable drivers for Xilinx LogiCORE PR Decoupler
> +	  or Xilinx Dynamic Function eXchnage AIX Shutdown Manager.
>  	  The PR Decoupler exists in the FPGA fabric to isolate one
>  	  region of the FPGA from the busses while that region is
>  	  being reprogrammed during partial reconfig.
> +	  The Dynamic Function eXchange AXI shutdown manager prevents
> +	  AXI traffic from passing through the bridge. The controller
> +	  safely handles AXI4MM and AXI4-Lite interfaces on a
> +	  Reconfigurable Partition when it is undergoing dynamic
> +	  reconfiguration, preventing the system deadlock that can
> +	  occur if AXI transactions are interrupted by DFX.
>  
>  config FPGA_REGION
>  	tristate "FPGA Region"
> diff --git a/drivers/fpga/xilinx-pr-decoupler.c b/drivers/fpga/xilinx-pr-decoupler.c
> index 7d69af230567..78a6f5324193 100644
> --- a/drivers/fpga/xilinx-pr-decoupler.c
> +++ b/drivers/fpga/xilinx-pr-decoupler.c
> @@ -1,7 +1,7 @@
>  // SPDX-License-Identifier: GPL-2.0-only
>  /*
>   * Copyright (c) 2017, National Instruments Corp.
> - * Copyright (c) 2017, Xilix Inc
> + * Copyright (c) 2017, Xilinx Inc
>   *
>   * FPGA Bridge Driver for the Xilinx LogiCORE Partial Reconfiguration
>   * Decoupler IP Core.
> @@ -18,7 +18,12 @@
>  #define CTRL_CMD_COUPLE		0
>  #define CTRL_OFFSET		0
>  
> +struct xlnx_config_data {
> +	const char *name;
> +};
> +
>  struct xlnx_pr_decoupler_data {
> +	const struct xlnx_config_data *ipconfig;
>  	void __iomem *io_base;
>  	struct clk *clk;
>  };
> @@ -76,15 +81,28 @@ static const struct fpga_bridge_ops xlnx_pr_decoupler_br_ops = {
>  	.enable_show = xlnx_pr_decoupler_enable_show,
>  };
>  
> +static const struct xlnx_config_data decoupler_config = {
> +	.name = "Xilinx PR Decoupler",
> +};
> +
> +static const struct xlnx_config_data shutdown_config = {
> +	.name = "Xilinx DFX AXI Shutdown Manager",
> +};
> +
>  static const struct of_device_id xlnx_pr_decoupler_of_match[] = {
> -	{ .compatible = "xlnx,pr-decoupler-1.00", },
> -	{ .compatible = "xlnx,pr-decoupler", },
> +	{ .compatible = "xlnx,pr-decoupler-1.00", .data = &decoupler_config },
> +	{ .compatible = "xlnx,pr-decoupler", .data = &decoupler_config },
> +	{ .compatible = "xlnx,dfx-axi-shutdown-manager-1.00",
> +					.data = &shutdown_config },
> +	{ .compatible = "xlnx,dfx-axi-shutdown-manager",
> +					.data = &shutdown_config },
>  	{},
>  };
>  MODULE_DEVICE_TABLE(of, xlnx_pr_decoupler_of_match);
>  
>  static int xlnx_pr_decoupler_probe(struct platform_device *pdev)
>  {
> +	struct device_node *np = pdev->dev.of_node;
>  	struct xlnx_pr_decoupler_data *priv;
>  	struct fpga_bridge *br;
>  	int err;
> @@ -94,6 +112,14 @@ static int xlnx_pr_decoupler_probe(struct platform_device *pdev)
>  	if (!priv)
>  		return -ENOMEM;
>  
> +	if (np) {
> +		const struct of_device_id *match;
> +
> +		match = of_match_node(xlnx_pr_decoupler_of_match, np);
> +		if (match && match->data)
> +			priv->ipconfig = match->data;
> +	}
> +
>  	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
>  	priv->io_base = devm_ioremap_resource(&pdev->dev, res);
>  	if (IS_ERR(priv->io_base))
> @@ -114,7 +140,7 @@ static int xlnx_pr_decoupler_probe(struct platform_device *pdev)
>  
>  	clk_disable(priv->clk);
>  
> -	br = devm_fpga_bridge_create(&pdev->dev, "Xilinx PR Decoupler",
> +	br = devm_fpga_bridge_create(&pdev->dev, priv->ipconfig->name,
>  				     &xlnx_pr_decoupler_br_ops, priv);
>  	if (!br) {
>  		err = -ENOMEM;
> @@ -125,7 +151,8 @@ static int xlnx_pr_decoupler_probe(struct platform_device *pdev)
>  
>  	err = fpga_bridge_register(br);
>  	if (err) {
> -		dev_err(&pdev->dev, "unable to register Xilinx PR Decoupler");
> +		dev_err(&pdev->dev, "unable to register %s",
> +			priv->ipconfig->name);
>  		goto err_clk;
>  	}
>  

The changes I asked for were made.

Reviewed-by: Tom Rix <trix@redhat.com>


  reply	other threads:[~2021-03-04 13:53 UTC|newest]

Thread overview: 8+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-02-11  5:11 [PATCH v2 0/2] Add DFX AXI Shutdown manager IP support for Xilinx Nava kishore Manne
2021-02-11  5:11 ` [PATCH v2 1/2] dt-bindings: fpga: Add compatible value for Xilinx DFX AXI shutdown manager Nava kishore Manne
2021-03-04 13:53   ` Tom Rix
2021-03-05 19:18   ` Rob Herring
2021-02-11  5:11 ` [PATCH v2 2/2] fpga: Add support for Xilinx DFX AXI Shutdown manager Nava kishore Manne
2021-03-04 13:51   ` Tom Rix [this message]
2021-03-04  7:13 ` [PATCH v2 0/2] Add DFX AXI Shutdown manager IP support for Xilinx Nava kishore Manne
2021-03-04  7:21 ` Nava kishore Manne

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