From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Return-Path: Received: from us-smtp-2.mimecast.com ([205.139.110.61]:60730 "EHLO us-smtp-delivery-1.mimecast.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S2390070AbgEYThy (ORCPT ); Mon, 25 May 2020 15:37:54 -0400 Date: Mon, 25 May 2020 16:21:23 -0300 From: Marcelo Tosatti Subject: Re: [PATCH v5 2/7] fpga: dfl: pci: add irq info for feature devices enumeration Message-ID: <20200525192123.GB22266@fuller.cnet> References: <1587370303-25568-1-git-send-email-yilun.xu@intel.com> <1587370303-25568-3-git-send-email-yilun.xu@intel.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <1587370303-25568-3-git-send-email-yilun.xu@intel.com> Sender: linux-fpga-owner@vger.kernel.org List-Id: linux-fpga@vger.kernel.org To: Xu Yilun Cc: mdf@kernel.org, linux-fpga@vger.kernel.org, linux-kernel@vger.kernel.org, trix@redhat.com, bhu@redhat.com, Luwei Kang , Wu Hao On Mon, Apr 20, 2020 at 04:11:38PM +0800, Xu Yilun wrote: > Some DFL FPGA PCIe cards (e.g. Intel FPGA Programmable Acceleration > Card) support MSI-X based interrupts. This patch allows PCIe driver > to prepare and pass interrupt resources to DFL via enumeration API. > These interrupt resources could then be assigned to actual features > which use them. > > Signed-off-by: Luwei Kang > Signed-off-by: Wu Hao > Signed-off-by: Xu Yilun > Acked-by: Wu Hao > ---- > v2: put irq resources init code inside cce_enumerate_feature_dev() > Some minor changes for Hao's comments. > v3: Some minor fix for Hao's comments for v2. > v4: Some minor fix for Hao's comments for v3. > v5: No change. > --- > drivers/fpga/dfl-pci.c | 80 ++++++++++++++++++++++++++++++++++++++++++++------ > 1 file changed, 71 insertions(+), 9 deletions(-) > > diff --git a/drivers/fpga/dfl-pci.c b/drivers/fpga/dfl-pci.c > index a78c409..2ff1274 100644 > --- a/drivers/fpga/dfl-pci.c > +++ b/drivers/fpga/dfl-pci.c > @@ -39,6 +39,27 @@ static void __iomem *cci_pci_ioremap_bar(struct pci_dev *pcidev, int bar) > return pcim_iomap_table(pcidev)[bar]; > } > > +static int cci_pci_alloc_irq(struct pci_dev *pcidev) > +{ > + int ret, nvec = pci_msix_vec_count(pcidev); > + > + if (nvec <= 0) { > + dev_dbg(&pcidev->dev, "fpga interrupt not supported\n"); > + return 0; > + } > + > + ret = pci_alloc_irq_vectors(pcidev, nvec, nvec, PCI_IRQ_MSIX); > + if (ret < 0) > + return ret; > + > + return nvec; > +} > + > +static void cci_pci_free_irq(struct pci_dev *pcidev) > +{ > + pci_free_irq_vectors(pcidev); > +} > + > /* PCI Device ID */ > #define PCIE_DEVICE_ID_PF_INT_5_X 0xBCBD > #define PCIE_DEVICE_ID_PF_INT_6_X 0xBCC0 > @@ -78,17 +99,38 @@ static void cci_remove_feature_devs(struct pci_dev *pcidev) > > /* remove all children feature devices */ > dfl_fpga_feature_devs_remove(drvdata->cdev); > + cci_pci_free_irq(pcidev); > +} > + > +static int *cci_pci_create_irq_table(struct pci_dev *pcidev, unsigned int nvec) > +{ > + unsigned int i; > + int *table; > + > + table = kcalloc(nvec, sizeof(int), GFP_KERNEL); > + if (table) { > + for (i = 0; i < nvec; i++) > + table[i] = pci_irq_vector(pcidev, i); > + } > + > + return table; > +} > + > +static void cci_pci_free_irq_table(int *table) > +{ > + kfree(table); > } > > /* enumerate feature devices under pci device */ > static int cci_enumerate_feature_devs(struct pci_dev *pcidev) > { > struct cci_drvdata *drvdata = pci_get_drvdata(pcidev); > + int port_num, bar, i, nvec, ret = 0; > struct dfl_fpga_enum_info *info; > struct dfl_fpga_cdev *cdev; > resource_size_t start, len; > - int port_num, bar, i, ret = 0; > void __iomem *base; > + int *irq_table; > u32 offset; > u64 v; > > @@ -97,11 +139,30 @@ static int cci_enumerate_feature_devs(struct pci_dev *pcidev) > if (!info) > return -ENOMEM; > > + /* add irq info for enumeration if the device support irq */ > + nvec = cci_pci_alloc_irq(pcidev); > + if (nvec < 0) { > + dev_err(&pcidev->dev, "Fail to alloc irq %d.\n", nvec); > + ret = nvec; > + goto enum_info_free_exit; > + } else if (nvec) { > + irq_table = cci_pci_create_irq_table(pcidev, nvec); > + if (!irq_table) { > + ret = -ENOMEM; > + goto irq_free_exit; > + } > + > + ret = dfl_fpga_enum_info_add_irq(info, nvec, irq_table); > + cci_pci_free_irq_table(irq_table); > + if (ret) > + goto irq_free_exit; > + } > + > /* start to find Device Feature List from Bar 0 */ > base = cci_pci_ioremap_bar(pcidev, 0); > if (!base) { > ret = -ENOMEM; > - goto enum_info_free_exit; > + goto irq_free_exit; > } > > /* > @@ -154,7 +215,7 @@ static int cci_enumerate_feature_devs(struct pci_dev *pcidev) > dfl_fpga_enum_info_add_dfl(info, start, len, base); > } else { > ret = -ENODEV; > - goto enum_info_free_exit; > + goto irq_free_exit; > } > > /* start enumeration with prepared enumeration information */ > @@ -162,11 +223,14 @@ static int cci_enumerate_feature_devs(struct pci_dev *pcidev) > if (IS_ERR(cdev)) { > dev_err(&pcidev->dev, "Enumeration failure\n"); > ret = PTR_ERR(cdev); > - goto enum_info_free_exit; > + goto irq_free_exit; > } > > drvdata->cdev = cdev; > > +irq_free_exit: > + if (ret) > + cci_pci_free_irq(pcidev); > enum_info_free_exit: > dfl_fpga_enum_info_free(info); > > @@ -211,12 +275,10 @@ int cci_pci_probe(struct pci_dev *pcidev, const struct pci_device_id *pcidevid) > } > > ret = cci_enumerate_feature_devs(pcidev); > - if (ret) { > - dev_err(&pcidev->dev, "enumeration failure %d.\n", ret); > - goto disable_error_report_exit; > - } > + if (!ret) > + return ret; > > - return ret; > + dev_err(&pcidev->dev, "enumeration failure %d.\n", ret); > > disable_error_report_exit: > pci_disable_pcie_error_reporting(pcidev); > -- > 2.7.4 Reviewed-by: Marcelo Tosatti