From: "Martin Hundebøll" <mhu@silicom.dk>
To: Wu Hao <hao.wu@intel.com>, Tom Rix <trix@redhat.com>,
Moritz Fischer <mdf@kernel.org>, Xu Yilun <yilun.xu@intel.com>,
Jean Delvare <jdelvare@suse.com>,
Guenter Roeck <linux@roeck-us.net>,
Lee Jones <lee.jones@linaro.org>, Mark Brown <broonie@kernel.org>
Cc: "Martin Hundebøll" <mhu@geanix.com>,
linux-fpga@vger.kernel.org, linux-kernel@vger.kernel.org,
linux-hwmon@vger.kernel.org, linux-spi@vger.kernel.org,
"Martin Hundebøll" <mhu@silicom.dk>
Subject: [PATCH 4/4] hwmon: intel-m10-bmc: add sensor support for Silicom N5010 card
Date: Mon, 21 Jun 2021 09:06:21 +0200 [thread overview]
Message-ID: <20210621070621.431482-5-mhu@silicom.dk> (raw)
In-Reply-To: <20210621070621.431482-1-mhu@silicom.dk>
The Silicom N5010 PAC is similar to Intel N3000 and D5005. Enable
monitoring of its sensors like it is done for the two Intel cards.
Signed-off-by: Martin Hundebøll <mhu@silicom.dk>
---
drivers/hwmon/intel-m10-bmc-hwmon.c | 116 ++++++++++++++++++++++++++++
drivers/mfd/intel-m10-bmc.c | 12 ++-
2 files changed, 127 insertions(+), 1 deletion(-)
diff --git a/drivers/hwmon/intel-m10-bmc-hwmon.c b/drivers/hwmon/intel-m10-bmc-hwmon.c
index bd7ed2ed3a1e..7a08e4c44a4b 100644
--- a/drivers/hwmon/intel-m10-bmc-hwmon.c
+++ b/drivers/hwmon/intel-m10-bmc-hwmon.c
@@ -228,6 +228,118 @@ static const struct m10bmc_hwmon_board_data d5005bmc_hwmon_bdata = {
.hinfo = d5005bmc_hinfo,
};
+static const struct m10bmc_sdata n5010bmc_temp_tbl[] = {
+ { 0x100, 0x0, 0x104, 0x0, 0x0, 1000, "Board Local Temperature" },
+ { 0x108, 0x0, 0x10c, 0x0, 0x0, 1000, "FPGA 1 Temperature" },
+ { 0x110, 0x0, 0x114, 0x0, 0x0, 1000, "FPGA 2 Temperature" },
+ { 0x118, 0x0, 0x0, 0x0, 0x0, 1000, "Card Top Temperature" },
+ { 0x11c, 0x0, 0x0, 0x0, 0x0, 1000, "Card Bottom Temperature" },
+ { 0x128, 0x0, 0x0, 0x0, 0x0, 1000, "FPGA 1.2V Temperature" },
+ { 0x134, 0x0, 0x0, 0x0, 0x0, 1000, "FPGA 5V Temperature" },
+ { 0x140, 0x0, 0x0, 0x0, 0x0, 1000, "FPGA 0.9V Temperature" },
+ { 0x14c, 0x0, 0x0, 0x0, 0x0, 1000, "FPGA 0.85V Temperature" },
+ { 0x158, 0x0, 0x0, 0x0, 0x0, 1000, "AUX 12V Temperature" },
+ { 0x164, 0x0, 0x0, 0x0, 0x0, 1000, "Backplane 12V Temperature" },
+ { 0x1a8, 0x0, 0x0, 0x0, 0x0, 1000, "QSFP28-1 Temperature" },
+ { 0x1ac, 0x0, 0x0, 0x0, 0x0, 1000, "QSFP28-2 Temperature" },
+ { 0x1b0, 0x0, 0x0, 0x0, 0x0, 1000, "QSFP28-3 Temperature" },
+ { 0x1b4, 0x0, 0x0, 0x0, 0x0, 1000, "QSFP28-4 Temperature" },
+ { 0x1b8, 0x0, 0x0, 0x0, 0x0, 1000, "CVL1 Internal Temperature" },
+ { 0x1bc, 0x0, 0x0, 0x0, 0x0, 1000, "CVL2 Internal Temperature" },
+};
+
+static const struct m10bmc_sdata n5010bmc_in_tbl[] = {
+ { 0x120, 0x0, 0x0, 0x0, 0x0, 1, "FPGA 1.2V Voltage" },
+ { 0x12c, 0x0, 0x0, 0x0, 0x0, 1, "FPGA 5V Voltage" },
+ { 0x138, 0x0, 0x0, 0x0, 0x0, 1, "FPGA 0.9V Voltage" },
+ { 0x144, 0x0, 0x0, 0x0, 0x0, 1, "FPGA 0.85V Voltage" },
+ { 0x150, 0x0, 0x0, 0x0, 0x0, 1, "AUX 12V Voltage" },
+ { 0x15c, 0x0, 0x0, 0x0, 0x0, 1, "Backplane 12V Voltage" },
+ { 0x16c, 0x0, 0x0, 0x0, 0x0, 1, "DDR4 1.2V Voltage" },
+ { 0x17c, 0x0, 0x0, 0x0, 0x0, 1, "FPGA 1.8V Voltage" },
+ { 0x184, 0x0, 0x0, 0x0, 0x0, 1, "QDR 1.3V Voltage" },
+ { 0x18c, 0x0, 0x0, 0x0, 0x0, 1, "CVL1 0.8V Voltage" },
+ { 0x194, 0x0, 0x0, 0x0, 0x0, 1, "CVL1 1.05V Voltage" },
+ { 0x19c, 0x0, 0x0, 0x0, 0x0, 1, "CVL2 1.05V Voltage" },
+ { 0x1a4, 0x0, 0x0, 0x0, 0x0, 1, "CVL2 0.8V Voltage" },
+};
+
+static const struct m10bmc_sdata n5010bmc_curr_tbl[] = {
+ { 0x124, 0x0, 0x0, 0x0, 0x0, 1, "FPGA 1.2V Current" },
+ { 0x130, 0x0, 0x0, 0x0, 0x0, 1, "FPGA 5V Current" },
+ { 0x13c, 0x0, 0x0, 0x0, 0x0, 1, "FPGA 0.9V Current" },
+ { 0x148, 0x0, 0x0, 0x0, 0x0, 1, "FPGA 0.85V Current" },
+ { 0x154, 0x0, 0x0, 0x0, 0x0, 1, "AUX 12V Current" },
+ { 0x160, 0x0, 0x0, 0x0, 0x0, 1, "Backplane 12V Current" },
+ { 0x168, 0x0, 0x0, 0x0, 0x0, 1, "DDR4 1.2V Current" },
+ { 0x178, 0x0, 0x0, 0x0, 0x0, 1, "FPGA 1.8V Current" },
+ { 0x180, 0x0, 0x0, 0x0, 0x0, 1, "QDR 1.3V Current" },
+ { 0x188, 0x0, 0x0, 0x0, 0x0, 1, "CVL1 0.8V Current" },
+ { 0x190, 0x0, 0x0, 0x0, 0x0, 1, "CVL1 1.05V Current" },
+ { 0x198, 0x0, 0x0, 0x0, 0x0, 1, "CVL2 1.05V Current" },
+ { 0x1a0, 0x0, 0x0, 0x0, 0x0, 1, "CVL2 0.8V Current" },
+};
+
+static const struct hwmon_channel_info *n5010bmc_hinfo[] = {
+ HWMON_CHANNEL_INFO(temp,
+ HWMON_T_INPUT | HWMON_T_CRIT | HWMON_T_LABEL,
+ HWMON_T_INPUT | HWMON_T_CRIT | HWMON_T_LABEL,
+ HWMON_T_INPUT | HWMON_T_CRIT | HWMON_T_LABEL,
+ HWMON_T_INPUT | HWMON_T_LABEL,
+ HWMON_T_INPUT | HWMON_T_LABEL,
+ HWMON_T_INPUT | HWMON_T_LABEL,
+ HWMON_T_INPUT | HWMON_T_LABEL,
+ HWMON_T_INPUT | HWMON_T_LABEL,
+ HWMON_T_INPUT | HWMON_T_LABEL,
+ HWMON_T_INPUT | HWMON_T_LABEL,
+ HWMON_T_INPUT | HWMON_T_LABEL,
+ HWMON_T_INPUT | HWMON_T_LABEL,
+ HWMON_T_INPUT | HWMON_T_LABEL,
+ HWMON_T_INPUT | HWMON_T_LABEL,
+ HWMON_T_INPUT | HWMON_T_LABEL,
+ HWMON_T_INPUT | HWMON_T_LABEL,
+ HWMON_T_INPUT | HWMON_T_LABEL),
+ HWMON_CHANNEL_INFO(in,
+ HWMON_I_INPUT | HWMON_I_LABEL,
+ HWMON_I_INPUT | HWMON_I_LABEL,
+ HWMON_I_INPUT | HWMON_I_LABEL,
+ HWMON_I_INPUT | HWMON_I_LABEL,
+ HWMON_I_INPUT | HWMON_I_LABEL,
+ HWMON_I_INPUT | HWMON_I_LABEL,
+ HWMON_I_INPUT | HWMON_I_LABEL,
+ HWMON_I_INPUT | HWMON_I_LABEL,
+ HWMON_I_INPUT | HWMON_I_LABEL,
+ HWMON_I_INPUT | HWMON_I_LABEL,
+ HWMON_I_INPUT | HWMON_I_LABEL,
+ HWMON_I_INPUT | HWMON_I_LABEL,
+ HWMON_I_INPUT | HWMON_I_LABEL),
+ HWMON_CHANNEL_INFO(curr,
+ HWMON_C_INPUT | HWMON_C_LABEL,
+ HWMON_C_INPUT | HWMON_C_LABEL,
+ HWMON_C_INPUT | HWMON_C_LABEL,
+ HWMON_C_INPUT | HWMON_C_LABEL,
+ HWMON_C_INPUT | HWMON_C_LABEL,
+ HWMON_C_INPUT | HWMON_C_LABEL,
+ HWMON_C_INPUT | HWMON_C_LABEL,
+ HWMON_C_INPUT | HWMON_C_LABEL,
+ HWMON_C_INPUT | HWMON_C_LABEL,
+ HWMON_C_INPUT | HWMON_C_LABEL,
+ HWMON_C_INPUT | HWMON_C_LABEL,
+ HWMON_C_INPUT | HWMON_C_LABEL,
+ HWMON_C_INPUT | HWMON_C_LABEL),
+ NULL
+};
+
+static const struct m10bmc_hwmon_board_data n5010bmc_hwmon_bdata = {
+ .tables = {
+ [hwmon_temp] = n5010bmc_temp_tbl,
+ [hwmon_in] = n5010bmc_in_tbl,
+ [hwmon_curr] = n5010bmc_curr_tbl,
+ },
+
+ .hinfo = n5010bmc_hinfo,
+};
+
static umode_t
m10bmc_hwmon_is_visible(const void *data, enum hwmon_sensor_types type,
u32 attr, int channel)
@@ -438,6 +550,10 @@ static const struct platform_device_id intel_m10bmc_hwmon_ids[] = {
.name = "d5005bmc-hwmon",
.driver_data = (unsigned long)&d5005bmc_hwmon_bdata,
},
+ {
+ .name = "n5010bmc-hwmon",
+ .driver_data = (unsigned long)&n5010bmc_hwmon_bdata,
+ },
{ }
};
diff --git a/drivers/mfd/intel-m10-bmc.c b/drivers/mfd/intel-m10-bmc.c
index 1a9bfb7f48cd..8db3bcf5fccc 100644
--- a/drivers/mfd/intel-m10-bmc.c
+++ b/drivers/mfd/intel-m10-bmc.c
@@ -15,7 +15,8 @@
enum m10bmc_type {
M10_N3000,
- M10_D5005
+ M10_D5005,
+ M10_N5010,
};
static struct mfd_cell m10bmc_d5005_subdevs[] = {
@@ -28,6 +29,10 @@ static struct mfd_cell m10bmc_pacn3000_subdevs[] = {
{ .name = "n3000bmc-secure" },
};
+static struct mfd_cell m10bmc_n5010_subdevs[] = {
+ { .name = "n5010bmc-hwmon" },
+};
+
static const struct regmap_range m10bmc_regmap_range[] = {
regmap_reg_range(M10BMC_LEGACY_BUILD_VER, M10BMC_LEGACY_BUILD_VER),
regmap_reg_range(M10BMC_SYS_BASE, M10BMC_SYS_END),
@@ -192,6 +197,10 @@ static int intel_m10_bmc_spi_probe(struct spi_device *spi)
cells = m10bmc_d5005_subdevs;
n_cell = ARRAY_SIZE(m10bmc_d5005_subdevs);
break;
+ case M10_N5010:
+ cells = m10bmc_n5010_subdevs;
+ n_cell = ARRAY_SIZE(m10bmc_n5010_subdevs);
+ break;
default:
return -ENODEV;
}
@@ -207,6 +216,7 @@ static int intel_m10_bmc_spi_probe(struct spi_device *spi)
static const struct spi_device_id m10bmc_spi_id[] = {
{ "m10-n3000", M10_N3000 },
{ "m10-d5005", M10_D5005 },
+ { "m10-n5010", M10_N5010 },
{ }
};
MODULE_DEVICE_TABLE(spi, m10bmc_spi_id);
--
2.31.0
next prev parent reply other threads:[~2021-06-21 7:06 UTC|newest]
Thread overview: 22+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-06-21 7:06 [PATCH 0/4] fpga/mfd/hwmon: Initial support for Silicom N5010 PAC Martin Hundebøll
2021-06-21 7:06 ` [PATCH 1/4] fpga: dfl: pci: add device IDs for Silicom N501x PAC cards Martin Hundebøll
2021-06-21 9:57 ` Wu, Hao
2021-06-21 7:06 ` [PATCH 2/4] fpga: dfl: Move DFH header register macros to linux/dfl.h Martin Hundebøll
2021-06-21 10:19 ` Wu, Hao
2021-06-22 5:22 ` Xu Yilun
2021-06-22 7:39 ` Wu, Hao
2021-06-23 11:56 ` Martin Hundebøll
2021-06-24 3:01 ` Xu Yilun
2021-06-24 4:45 ` Wu, Hao
2021-06-21 13:56 ` Tom Rix
2021-06-22 4:56 ` Xu Yilun
2021-06-22 12:31 ` Tom Rix
2021-06-23 6:37 ` Xu Yilun
2021-06-23 11:44 ` Martin Hundebøll
2021-06-23 13:38 ` Tom Rix
2021-06-21 19:33 ` kernel test robot
2021-06-21 7:06 ` [PATCH 3/4] spi: spi-altera-dfl: support n5010 feature revision Martin Hundebøll
2021-06-21 7:06 ` Martin Hundebøll [this message]
2021-06-21 8:55 ` [PATCH 4/4] hwmon: intel-m10-bmc: add sensor support for Silicom N5010 card Lee Jones
2021-06-21 8:38 ` [PATCH 0/4] fpga/mfd/hwmon: Initial support for Silicom N5010 PAC Xu Yilun
2021-06-25 7:11 ` Martin Hundebøll
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