From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-19.0 required=3.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_CR_TRAILER,INCLUDES_PATCH,MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS, USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 8B56AC49EAF for ; Tue, 22 Jun 2021 20:05:51 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 75ADB610C7 for ; Tue, 22 Jun 2021 20:05:51 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232893AbhFVUIG (ORCPT ); Tue, 22 Jun 2021 16:08:06 -0400 Received: from us-smtp-delivery-124.mimecast.com ([170.10.133.124]:58232 "EHLO us-smtp-delivery-124.mimecast.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232880AbhFVUIE (ORCPT ); Tue, 22 Jun 2021 16:08:04 -0400 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=redhat.com; s=mimecast20190719; t=1624392347; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=xjVV9K8s4gAqmtJkom3wNIKpLPAvS4gh3E4f2xdxwt0=; b=FkPhkCgNS4jaH8VweDdu9BPFOGZsNuF9dKNGSWBczT7Z3D/eKmWwhP2V+F9mXWCK7iroY+ ZZeDz9wQ8oaMCJ0cY33TJwzgNLO9uR9FsrQPhmNPUgwi1nwYzXx5B89B3lhZQAV9elQtgE nPOmGIRsB9H7PZsazvEK3cDsO16CvEI= Received: from mail-oo1-f72.google.com (mail-oo1-f72.google.com [209.85.161.72]) (Using TLS) by relay.mimecast.com with ESMTP id us-mta-480-BL1Mj-ZkPwqtQ6ouHXslfw-1; Tue, 22 Jun 2021 16:05:46 -0400 X-MC-Unique: BL1Mj-ZkPwqtQ6ouHXslfw-1 Received: by mail-oo1-f72.google.com with SMTP id r4-20020a4ab5040000b02902446eb55473so288952ooo.20 for ; Tue, 22 Jun 2021 13:05:46 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=xjVV9K8s4gAqmtJkom3wNIKpLPAvS4gh3E4f2xdxwt0=; b=Q87tbngpfiHbHrgAFnnGZSTzNfmOT2qCje6pZROF/zPFMCr8YS/uHZP7E1n5z4oyws xXaG0T5J1jCHLm6cpbatJqlVwBbeuBGrQJSGP0BG2ciJPTpvoT4bceQJHP+UkGxhDhVS k64HXofO3K9YO12iFtZqmZixnOI52WLE4RYypQ81wzKl0OMTS3jZBh00r1hkJhA4k+30 gnUy8jcBSVL1+aVeFYmVH0u4xtvGBiTabTslmUPqyip6pqzOKOk9blf9aQjdEet2Ky0Y Kp80/DHjeAT/8+srandu/2beg90ogbIJzgjZtq+cJxfBcmWXIJZ1yDR3ynJ6hJJVTguf bAZA== X-Gm-Message-State: AOAM533MCmn4fC4vUHsdY8NYNFvWLNhewJ2sasZKa0xlQV0WES6qPvk6 pOP73Je0h7wY6Q+g0GN7md8Pi/i52AnjMbN5Yv8W7U6LwNSM14pDw8CDpHDHGOkajZ/RYXIysvP sHbM50Ql1/NQKMBvZdxejIQ== X-Received: by 2002:aca:d5cd:: with SMTP id m196mr412923oig.138.1624392345807; Tue, 22 Jun 2021 13:05:45 -0700 (PDT) X-Google-Smtp-Source: ABdhPJwS8KhUtIHUWg4n/8ydyjZyfqMKWxSsU4d4VivkzppzLvINDOFC76w9kSaTEQ3Z4sF4KcVQTA== X-Received: by 2002:aca:d5cd:: with SMTP id m196mr412905oig.138.1624392345508; Tue, 22 Jun 2021 13:05:45 -0700 (PDT) Received: from localhost.localdomain.com (075-142-250-213.res.spectrum.com. [75.142.250.213]) by smtp.gmail.com with ESMTPSA id 5sm727184oot.29.2021.06.22.13.05.43 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 22 Jun 2021 13:05:45 -0700 (PDT) From: trix@redhat.com To: hao.wu@intel.com, mdf@kernel.org, corbet@lwn.net, michal.simek@xilinx.com, gregkh@linuxfoundation.org, nava.manne@xilinx.com, dinguyen@kernel.org, krzysztof.kozlowski@canonical.com, yilun.xu@intel.com, davidgow@google.com, fpacheco@redhat.com, russell.h.weight@intel.com, richard.gong@intel.com, luca@lucaceresoli.net Cc: linux-fpga@vger.kernel.org, linux-doc@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Tom Rix Subject: [PATCH v5 1/4] fpga: dfl: reorganize to subdir layout Date: Tue, 22 Jun 2021 13:05:08 -0700 Message-Id: <20210622200511.3739914-3-trix@redhat.com> X-Mailer: git-send-email 2.26.3 In-Reply-To: <20210622200511.3739914-1-trix@redhat.com> References: <20210622200511.3739914-1-trix@redhat.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Precedence: bulk List-ID: X-Mailing-List: linux-fpga@vger.kernel.org From: Tom Rix Follow drivers/net/ethernet/ which has control configs NET_VENDOR_BLA that map to drivers/net/ethernet/bla Since fpgas do not have many vendors, drop the 'VENDOR' and use FPGA_BLA. There are several new subdirs altera/ dfl/ lattice/ xilinx/ Each subdir has a Kconfig that has a new/reused if FPGA_BLA ... existing configs ... endif FPGA_BLA Which is sourced into the main fpga/Kconfig Each subdir has a Makefile whose transversal is controlled in the fpga/Makefile by obj-$(CONFIG_FPGA_BLA) += bla/ This is the dfl/ subdir part. Create a dfl/ subdir Move dfl-* files to it. Add a Kconfig and Makefile Because FPGA_DFL is now used in dfl/Kconfig in a if/endif block, all the other configs in dfl/Kconfig implicitly depend on FPGA_DFL. Signed-off-by: Tom Rix --- Documentation/fpga/dfl.rst | 4 +- MAINTAINERS | 2 +- drivers/fpga/Kconfig | 80 +------------------- drivers/fpga/Makefile | 18 +---- drivers/fpga/dfl/Kconfig | 83 +++++++++++++++++++++ drivers/fpga/dfl/Makefile | 16 ++++ drivers/fpga/{ => dfl}/dfl-afu-dma-region.c | 0 drivers/fpga/{ => dfl}/dfl-afu-error.c | 0 drivers/fpga/{ => dfl}/dfl-afu-main.c | 0 drivers/fpga/{ => dfl}/dfl-afu-region.c | 0 drivers/fpga/{ => dfl}/dfl-afu.h | 0 drivers/fpga/{ => dfl}/dfl-fme-br.c | 0 drivers/fpga/{ => dfl}/dfl-fme-error.c | 0 drivers/fpga/{ => dfl}/dfl-fme-main.c | 0 drivers/fpga/{ => dfl}/dfl-fme-mgr.c | 0 drivers/fpga/{ => dfl}/dfl-fme-perf.c | 0 drivers/fpga/{ => dfl}/dfl-fme-pr.c | 0 drivers/fpga/{ => dfl}/dfl-fme-pr.h | 0 drivers/fpga/{ => dfl}/dfl-fme-region.c | 0 drivers/fpga/{ => dfl}/dfl-fme.h | 0 drivers/fpga/{ => dfl}/dfl-n3000-nios.c | 0 drivers/fpga/{ => dfl}/dfl-pci.c | 0 drivers/fpga/{ => dfl}/dfl.c | 0 drivers/fpga/{ => dfl}/dfl.h | 0 24 files changed, 104 insertions(+), 99 deletions(-) create mode 100644 drivers/fpga/dfl/Kconfig create mode 100644 drivers/fpga/dfl/Makefile rename drivers/fpga/{ => dfl}/dfl-afu-dma-region.c (100%) rename drivers/fpga/{ => dfl}/dfl-afu-error.c (100%) rename drivers/fpga/{ => dfl}/dfl-afu-main.c (100%) rename drivers/fpga/{ => dfl}/dfl-afu-region.c (100%) rename drivers/fpga/{ => dfl}/dfl-afu.h (100%) rename drivers/fpga/{ => dfl}/dfl-fme-br.c (100%) rename drivers/fpga/{ => dfl}/dfl-fme-error.c (100%) rename drivers/fpga/{ => dfl}/dfl-fme-main.c (100%) rename drivers/fpga/{ => dfl}/dfl-fme-mgr.c (100%) rename drivers/fpga/{ => dfl}/dfl-fme-perf.c (100%) rename drivers/fpga/{ => dfl}/dfl-fme-pr.c (100%) rename drivers/fpga/{ => dfl}/dfl-fme-pr.h (100%) rename drivers/fpga/{ => dfl}/dfl-fme-region.c (100%) rename drivers/fpga/{ => dfl}/dfl-fme.h (100%) rename drivers/fpga/{ => dfl}/dfl-n3000-nios.c (100%) rename drivers/fpga/{ => dfl}/dfl-pci.c (100%) rename drivers/fpga/{ => dfl}/dfl.c (100%) rename drivers/fpga/{ => dfl}/dfl.h (100%) diff --git a/Documentation/fpga/dfl.rst b/Documentation/fpga/dfl.rst index ef9eec71f6f3a..532fdc2e7d623 100644 --- a/Documentation/fpga/dfl.rst +++ b/Documentation/fpga/dfl.rst @@ -210,7 +210,7 @@ device and etc. Its driver module is always loaded first once the device is created by the system. This driver plays an infrastructural role in the driver architecture. It locates the DFLs in the device memory, handles them and related resources to common interfaces from DFL framework for enumeration. -(Please refer to drivers/fpga/dfl.c for detailed enumeration APIs). +(Please refer to drivers/fpga/dfl/dfl.c for detailed enumeration APIs). The FPGA Management Engine (FME) driver is a platform driver which is loaded automatically after FME platform device creation from the DFL device module. It @@ -499,7 +499,7 @@ In some cases, we may need to add some new private features to existing FIUs framework, as each private feature will be parsed automatically and related mmio resources can be found under FIU platform device created by DFL framework. Developer only needs to provide a sub feature driver with matched feature id. -FME Partial Reconfiguration Sub Feature driver (see drivers/fpga/dfl-fme-pr.c) +FME Partial Reconfiguration Sub Feature driver (see drivers/fpga/dfl/dfl-fme-pr.c) could be a reference. Location of DFLs on a PCI Device diff --git a/MAINTAINERS b/MAINTAINERS index 9ae47618c857d..853997f755083 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -7244,7 +7244,7 @@ L: linux-fpga@vger.kernel.org S: Maintained F: Documentation/ABI/testing/sysfs-bus-dfl* F: Documentation/fpga/dfl.rst -F: drivers/fpga/dfl* +F: drivers/fpga/dfl/ F: drivers/uio/uio_dfl.c F: include/linux/dfl.h F: include/uapi/linux/fpga-dfl.h diff --git a/drivers/fpga/Kconfig b/drivers/fpga/Kconfig index 8cd454ee20c0c..7a290b2234576 100644 --- a/drivers/fpga/Kconfig +++ b/drivers/fpga/Kconfig @@ -145,85 +145,7 @@ config OF_FPGA_REGION Support for loading FPGA images by applying a Device Tree overlay. -config FPGA_DFL - tristate "FPGA Device Feature List (DFL) support" - select FPGA_BRIDGE - select FPGA_REGION - depends on HAS_IOMEM - help - Device Feature List (DFL) defines a feature list structure that - creates a linked list of feature headers within the MMIO space - to provide an extensible way of adding features for FPGA. - Driver can walk through the feature headers to enumerate feature - devices (e.g. FPGA Management Engine, Port and Accelerator - Function Unit) and their private features for target FPGA devices. - - Select this option to enable common support for Field-Programmable - Gate Array (FPGA) solutions which implement Device Feature List. - It provides enumeration APIs and feature device infrastructure. - -config FPGA_DFL_FME - tristate "FPGA DFL FME Driver" - depends on FPGA_DFL && HWMON && PERF_EVENTS - help - The FPGA Management Engine (FME) is a feature device implemented - under Device Feature List (DFL) framework. Select this option to - enable the platform device driver for FME which implements all - FPGA platform level management features. There shall be one FME - per DFL based FPGA device. - -config FPGA_DFL_FME_MGR - tristate "FPGA DFL FME Manager Driver" - depends on FPGA_DFL_FME && HAS_IOMEM - help - Say Y to enable FPGA Manager driver for FPGA Management Engine. - -config FPGA_DFL_FME_BRIDGE - tristate "FPGA DFL FME Bridge Driver" - depends on FPGA_DFL_FME && HAS_IOMEM - help - Say Y to enable FPGA Bridge driver for FPGA Management Engine. - -config FPGA_DFL_FME_REGION - tristate "FPGA DFL FME Region Driver" - depends on FPGA_DFL_FME && HAS_IOMEM - help - Say Y to enable FPGA Region driver for FPGA Management Engine. - -config FPGA_DFL_AFU - tristate "FPGA DFL AFU Driver" - depends on FPGA_DFL - help - This is the driver for FPGA Accelerated Function Unit (AFU) which - implements AFU and Port management features. A User AFU connects - to the FPGA infrastructure via a Port. There may be more than one - Port/AFU per DFL based FPGA device. - -config FPGA_DFL_NIOS_INTEL_PAC_N3000 - tristate "FPGA DFL NIOS Driver for Intel PAC N3000" - depends on FPGA_DFL - select REGMAP - help - This is the driver for the N3000 Nios private feature on Intel - PAC (Programmable Acceleration Card) N3000. It communicates - with the embedded Nios processor to configure the retimers on - the card. It also instantiates the SPI master (spi-altera) for - the card's BMC (Board Management Controller). - -config FPGA_DFL_PCI - tristate "FPGA DFL PCIe Device Driver" - depends on PCI && FPGA_DFL - help - Select this option to enable PCIe driver for PCIe-based - Field-Programmable Gate Array (FPGA) solutions which implement - the Device Feature List (DFL). This driver provides interfaces - for userspace applications to configure, enumerate, open and access - FPGA accelerators on the FPGA DFL devices, enables system level - management functions such as FPGA partial reconfiguration, power - management and virtualization with DFL framework and DFL feature - device drivers. - - To compile this as a module, choose M here. +source "drivers/fpga/dfl/Kconfig" config FPGA_MGR_ZYNQMP_FPGA tristate "Xilinx ZynqMP FPGA" diff --git a/drivers/fpga/Makefile b/drivers/fpga/Makefile index 18dc9885883a2..bda74e54ce390 100644 --- a/drivers/fpga/Makefile +++ b/drivers/fpga/Makefile @@ -31,20 +31,4 @@ obj-$(CONFIG_XILINX_PR_DECOUPLER) += xilinx-pr-decoupler.o obj-$(CONFIG_FPGA_REGION) += fpga-region.o obj-$(CONFIG_OF_FPGA_REGION) += of-fpga-region.o -# FPGA Device Feature List Support -obj-$(CONFIG_FPGA_DFL) += dfl.o -obj-$(CONFIG_FPGA_DFL_FME) += dfl-fme.o -obj-$(CONFIG_FPGA_DFL_FME_MGR) += dfl-fme-mgr.o -obj-$(CONFIG_FPGA_DFL_FME_BRIDGE) += dfl-fme-br.o -obj-$(CONFIG_FPGA_DFL_FME_REGION) += dfl-fme-region.o -obj-$(CONFIG_FPGA_DFL_AFU) += dfl-afu.o - -dfl-fme-objs := dfl-fme-main.o dfl-fme-pr.o dfl-fme-error.o -dfl-fme-objs += dfl-fme-perf.o -dfl-afu-objs := dfl-afu-main.o dfl-afu-region.o dfl-afu-dma-region.o -dfl-afu-objs += dfl-afu-error.o - -obj-$(CONFIG_FPGA_DFL_NIOS_INTEL_PAC_N3000) += dfl-n3000-nios.o - -# Drivers for FPGAs which implement DFL -obj-$(CONFIG_FPGA_DFL_PCI) += dfl-pci.o +obj-$(CONFIG_FPGA_DFL) += dfl/ diff --git a/drivers/fpga/dfl/Kconfig b/drivers/fpga/dfl/Kconfig new file mode 100644 index 0000000000000..4c95e9072db46 --- /dev/null +++ b/drivers/fpga/dfl/Kconfig @@ -0,0 +1,83 @@ +# SPDX-License-Identifier: GPL-2.0-only + +config FPGA_DFL + tristate "FPGA Device Feature List (DFL) support" + select FPGA_BRIDGE + select FPGA_REGION + depends on HAS_IOMEM + help + Device Feature List (DFL) defines a feature list structure that + creates a linked list of feature headers within the MMIO space + to provide an extensible way of adding features for FPGA. + Driver can walk through the feature headers to enumerate feature + devices (e.g. FPGA Management Engine, Port and Accelerator + Function Unit) and their private features for target FPGA devices. + + Select this option to enable common support for Field-Programmable + Gate Array (FPGA) solutions which implement Device Feature List. + It provides enumeration APIs and feature device infrastructure. + +if FPGA_DFL + +config FPGA_DFL_FME + tristate "FPGA DFL FME Driver" + depends on HWMON && PERF_EVENTS + help + The FPGA Management Engine (FME) is a feature device implemented + under Device Feature List (DFL) framework. Select this option to + enable the platform device driver for FME which implements all + FPGA platform level management features. There shall be one FME + per DFL based FPGA device. + +config FPGA_DFL_FME_MGR + tristate "FPGA DFL FME Manager Driver" + depends on FPGA_DFL_FME && HAS_IOMEM + help + Say Y to enable FPGA Manager driver for FPGA Management Engine. + +config FPGA_DFL_FME_BRIDGE + tristate "FPGA DFL FME Bridge Driver" + depends on FPGA_DFL_FME && HAS_IOMEM + help + Say Y to enable FPGA Bridge driver for FPGA Management Engine. + +config FPGA_DFL_FME_REGION + tristate "FPGA DFL FME Region Driver" + depends on FPGA_DFL_FME && HAS_IOMEM + help + Say Y to enable FPGA Region driver for FPGA Management Engine. + +config FPGA_DFL_AFU + tristate "FPGA DFL AFU Driver" + help + This is the driver for FPGA Accelerated Function Unit (AFU) which + implements AFU and Port management features. A User AFU connects + to the FPGA infrastructure via a Port. There may be more than one + Port/AFU per DFL based FPGA device. + +config FPGA_DFL_NIOS_INTEL_PAC_N3000 + tristate "FPGA DFL NIOS Driver for Intel PAC N3000" + select REGMAP + help + This is the driver for the N3000 Nios private feature on Intel + PAC (Programmable Acceleration Card) N3000. It communicates + with the embedded Nios processor to configure the retimers on + the card. It also instantiates the SPI master (spi-altera) for + the card's BMC (Board Management Controller). + +config FPGA_DFL_PCI + tristate "FPGA DFL PCIe Device Driver" + depends on PCI + help + Select this option to enable PCIe driver for PCIe-based + Field-Programmable Gate Array (FPGA) solutions which implement + the Device Feature List (DFL). This driver provides interfaces + for userspace applications to configure, enumerate, open and access + FPGA accelerators on the FPGA DFL devices, enables system level + management functions such as FPGA partial reconfiguration, power + management and virtualization with DFL framework and DFL feature + device drivers. + + To compile this as a module, choose M here. + +endif #FPGA_DFL diff --git a/drivers/fpga/dfl/Makefile b/drivers/fpga/dfl/Makefile new file mode 100644 index 0000000000000..1c22507c60aa0 --- /dev/null +++ b/drivers/fpga/dfl/Makefile @@ -0,0 +1,16 @@ +# SPDX-License-Identifier: GPL-2.0-only +# +# FPGA Device Feature List (DFL) Support +obj-$(CONFIG_FPGA_DFL) += dfl.o +obj-$(CONFIG_FPGA_DFL_AFU) += dfl-afu.o +obj-$(CONFIG_FPGA_DFL_FME) += dfl-fme.o +obj-$(CONFIG_FPGA_DFL_FME_BRIDGE) += dfl-fme-br.o +obj-$(CONFIG_FPGA_DFL_FME_MGR) += dfl-fme-mgr.o +obj-$(CONFIG_FPGA_DFL_FME_REGION) += dfl-fme-region.o +obj-$(CONFIG_FPGA_DFL_NIOS_INTEL_PAC_N3000) += dfl-n3000-nios.o +obj-$(CONFIG_FPGA_DFL_PCI) += dfl-pci.o + +dfl-fme-objs := dfl-fme-main.o dfl-fme-pr.o dfl-fme-error.o \ + dfl-fme-perf.o +dfl-afu-objs := dfl-afu-main.o dfl-afu-region.o dfl-afu-dma-region.o \ + dfl-afu-error.o diff --git a/drivers/fpga/dfl-afu-dma-region.c b/drivers/fpga/dfl/dfl-afu-dma-region.c similarity index 100% rename from drivers/fpga/dfl-afu-dma-region.c rename to drivers/fpga/dfl/dfl-afu-dma-region.c diff --git a/drivers/fpga/dfl-afu-error.c b/drivers/fpga/dfl/dfl-afu-error.c similarity index 100% rename from drivers/fpga/dfl-afu-error.c rename to drivers/fpga/dfl/dfl-afu-error.c diff --git a/drivers/fpga/dfl-afu-main.c b/drivers/fpga/dfl/dfl-afu-main.c similarity index 100% rename from drivers/fpga/dfl-afu-main.c rename to drivers/fpga/dfl/dfl-afu-main.c diff --git a/drivers/fpga/dfl-afu-region.c b/drivers/fpga/dfl/dfl-afu-region.c similarity index 100% rename from drivers/fpga/dfl-afu-region.c rename to drivers/fpga/dfl/dfl-afu-region.c diff --git a/drivers/fpga/dfl-afu.h b/drivers/fpga/dfl/dfl-afu.h similarity index 100% rename from drivers/fpga/dfl-afu.h rename to drivers/fpga/dfl/dfl-afu.h diff --git a/drivers/fpga/dfl-fme-br.c b/drivers/fpga/dfl/dfl-fme-br.c similarity index 100% rename from drivers/fpga/dfl-fme-br.c rename to drivers/fpga/dfl/dfl-fme-br.c diff --git a/drivers/fpga/dfl-fme-error.c b/drivers/fpga/dfl/dfl-fme-error.c similarity index 100% rename from drivers/fpga/dfl-fme-error.c rename to drivers/fpga/dfl/dfl-fme-error.c diff --git a/drivers/fpga/dfl-fme-main.c b/drivers/fpga/dfl/dfl-fme-main.c similarity index 100% rename from drivers/fpga/dfl-fme-main.c rename to drivers/fpga/dfl/dfl-fme-main.c diff --git a/drivers/fpga/dfl-fme-mgr.c b/drivers/fpga/dfl/dfl-fme-mgr.c similarity index 100% rename from drivers/fpga/dfl-fme-mgr.c rename to drivers/fpga/dfl/dfl-fme-mgr.c diff --git a/drivers/fpga/dfl-fme-perf.c b/drivers/fpga/dfl/dfl-fme-perf.c similarity index 100% rename from drivers/fpga/dfl-fme-perf.c rename to drivers/fpga/dfl/dfl-fme-perf.c diff --git a/drivers/fpga/dfl-fme-pr.c b/drivers/fpga/dfl/dfl-fme-pr.c similarity index 100% rename from drivers/fpga/dfl-fme-pr.c rename to drivers/fpga/dfl/dfl-fme-pr.c diff --git a/drivers/fpga/dfl-fme-pr.h b/drivers/fpga/dfl/dfl-fme-pr.h similarity index 100% rename from drivers/fpga/dfl-fme-pr.h rename to drivers/fpga/dfl/dfl-fme-pr.h diff --git a/drivers/fpga/dfl-fme-region.c b/drivers/fpga/dfl/dfl-fme-region.c similarity index 100% rename from drivers/fpga/dfl-fme-region.c rename to drivers/fpga/dfl/dfl-fme-region.c diff --git a/drivers/fpga/dfl-fme.h b/drivers/fpga/dfl/dfl-fme.h similarity index 100% rename from drivers/fpga/dfl-fme.h rename to drivers/fpga/dfl/dfl-fme.h diff --git a/drivers/fpga/dfl-n3000-nios.c b/drivers/fpga/dfl/dfl-n3000-nios.c similarity index 100% rename from drivers/fpga/dfl-n3000-nios.c rename to drivers/fpga/dfl/dfl-n3000-nios.c diff --git a/drivers/fpga/dfl-pci.c b/drivers/fpga/dfl/dfl-pci.c similarity index 100% rename from drivers/fpga/dfl-pci.c rename to drivers/fpga/dfl/dfl-pci.c diff --git a/drivers/fpga/dfl.c b/drivers/fpga/dfl/dfl.c similarity index 100% rename from drivers/fpga/dfl.c rename to drivers/fpga/dfl/dfl.c diff --git a/drivers/fpga/dfl.h b/drivers/fpga/dfl/dfl.h similarity index 100% rename from drivers/fpga/dfl.h rename to drivers/fpga/dfl/dfl.h -- 2.26.3