From: Ivan Bornyakov <i.bornyakov@metrotek.ru>
To: mdf@kernel.org, hao.wu@intel.com, yilun.xu@intel.com,
trix@redhat.com, dg@emlix.com, j.zink@pengutronix.de,
robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org
Cc: Ivan Bornyakov <i.bornyakov@metrotek.ru>,
linux-fpga@vger.kernel.org, devicetree@vger.kernel.org,
linux-kernel@vger.kernel.org, kernel@pengutronix.de,
system@metrotek.ru
Subject: [PATCH v9 2/2] dt-bindings: fpga: document Lattice sysCONFIG FPGA manager
Date: Tue, 30 Aug 2022 12:54:05 +0300 [thread overview]
Message-ID: <20220830095405.31609-3-i.bornyakov@metrotek.ru> (raw)
In-Reply-To: <20220830095405.31609-1-i.bornyakov@metrotek.ru>
Add Device Tree Binding doc for configuring Lattice ECP5 and MachXO2
FPGAs over Slave SPI sysCONFIG interface.
Signed-off-by: Ivan Bornyakov <i.bornyakov@metrotek.ru>
---
.../bindings/fpga/lattice,sysconfig.yaml | 102 ++++++++++++++++++
1 file changed, 102 insertions(+)
create mode 100644 Documentation/devicetree/bindings/fpga/lattice,sysconfig.yaml
diff --git a/Documentation/devicetree/bindings/fpga/lattice,sysconfig.yaml b/Documentation/devicetree/bindings/fpga/lattice,sysconfig.yaml
new file mode 100644
index 000000000000..17f1e0c50bc4
--- /dev/null
+++ b/Documentation/devicetree/bindings/fpga/lattice,sysconfig.yaml
@@ -0,0 +1,102 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/fpga/lattice,sysconfig.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Lattice Slave SPI sysCONFIG FPGA manager
+
+maintainers:
+ - Ivan Bornyakov <i.bornyakov@metrotek.ru>
+
+description: |
+ Lattice sysCONFIG port, which is used for FPGA configuration, among others,
+ have Slave Serial Peripheral Interface. Only full reconfiguration is
+ supported.
+
+ Programming of ECP5 is done by writing uncompressed bitstream image in .bit
+ format into FPGA's SRAM configuration memory.
+
+ Programming of MachXO2 is done by writing configuration data into device's
+ internal non-volatile Flash memory, then Self-Download of data from Flash
+ into SRAM is issued.
+
+properties:
+ compatible:
+ enum:
+ - lattice,ecp5-fpga-mgr
+ - lattice,machxo2-fpga-mgr
+
+ reg:
+ maxItems: 1
+
+ program-gpios:
+ description:
+ A GPIO line connected to PROGRAMN (active low) pin of the device.
+ Initiates configuration sequence.
+ maxItems: 1
+
+ init-gpios:
+ description:
+ A GPIO line connected to INITN (active low) pin of the device.
+ Indicates that the FPGA is ready to be configured.
+ maxItems: 1
+
+ done-gpios:
+ description:
+ A GPIO line connected to DONE (active high) pin of the device.
+ Indicates that the configuration sequence is complete.
+ maxItems: 1
+
+required:
+ - compatible
+ - reg
+
+allOf:
+ - $ref: /schemas/spi/spi-peripheral-props.yaml
+
+ - if:
+ properties:
+ compatible:
+ contains:
+ const: lattice,machxo2-fpga-mgr
+ then:
+ properties:
+ spi-max-frequency:
+ maximum: 66000000
+
+ - if:
+ properties:
+ compatible:
+ contains:
+ const: lattice,ecp5-fpga-mgr
+ then:
+ properties:
+ spi-max-frequency:
+ maximum: 60000000
+
+unevaluatedProperties: false
+
+examples:
+ - |
+ #include <dt-bindings/gpio/gpio.h>
+
+ spi {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ fpga-mgr@0 {
+ compatible = "lattice,ecp5-fpga-mgr";
+ reg = <0>;
+ spi-max-frequency = <20000000>;
+ program-gpios = <&gpio3 4 GPIO_ACTIVE_LOW>;
+ init-gpios = <&gpio3 3 GPIO_ACTIVE_LOW>;
+ done-gpios = <&gpio3 2 GPIO_ACTIVE_HIGH>;
+ };
+
+ fpga-mgr@1 {
+ compatible = "lattice,machxo2-fpga-mgr";
+ reg = <1>;
+ spi-max-frequency = <20000000>;
+ };
+ };
--
2.37.2
next prev parent reply other threads:[~2022-08-30 9:57 UTC|newest]
Thread overview: 6+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-08-30 9:54 [PATCH v9 0/2] Lattice sysCONFIG SPI FPGA manager Ivan Bornyakov
2022-08-30 9:54 ` [PATCH v9 1/2] fpga: lattice-sysconfig-spi: add Lattice sysCONFIG " Ivan Bornyakov
2022-09-03 16:53 ` Xu Yilun
2022-09-04 9:04 ` Ivan Bornyakov
2022-08-30 9:54 ` Ivan Bornyakov [this message]
2022-08-30 10:32 ` [PATCH v9 2/2] dt-bindings: fpga: document " Ivan Bornyakov
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