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From: Lukas Wunner <lukas@wunner.de>
To: Russ Weight <russell.h.weight@intel.com>
Cc: Greg KH <gregkh@linuxfoundation.org>,
	Tianfei Zhang <tianfei.zhang@intel.com>,
	bhelgaas@google.com, linux-pci@vger.kernel.org,
	linux-fpga@vger.kernel.org, kabel@kernel.org, mani@kernel.org,
	pali@kernel.org, mdf@kernel.org, hao.wu@intel.com,
	yilun.xu@intel.com, trix@redhat.com, jgg@ziepe.ca,
	ira.weiny@intel.com, andriy.shevchenko@linux.intel.com,
	dan.j.williams@intel.com, keescook@chromium.org,
	rafael@kernel.org, corbet@lwn.net, linux-doc@vger.kernel.org,
	ilpo.jarvinen@linux.intel.com, lee@kernel.org,
	matthew.gerlach@linux.intel.com
Subject: Re: [PATCH v1 00/12] add FPGA hotplug manager driver
Date: Fri, 20 Jan 2023 19:42:53 +0100	[thread overview]
Message-ID: <20230120184253.GA25018@wunner.de> (raw)
In-Reply-To: <a896be81-e482-9d52-ece5-a2ef28822072@intel.com>

On Fri, Jan 20, 2023 at 08:28:51AM -0800, Russ Weight wrote:
> On 1/19/23 05:33, Greg KH wrote:
> > On Wed, Jan 18, 2023 at 08:35:50PM -0500, Tianfei Zhang wrote:
> > > This patchset introduces the FPGA hotplug manager (fpgahp) driver which
> > > has been verified on the Intel N3000 card.
> > >
> > > When a PCIe-based FPGA card is reprogrammed, it temporarily disappears
> > > from the PCIe bus. This needs to be managed to avoid PCIe errors and to
> > > reprobe the device after reprogramming.
> > >
> > > To change the FPGA image, the kernel burns a new image into the flash on
> > > the card, and then triggers the card BMC to load the new image into FPGA.
> > > A new FPGA hotplug manager driver is introduced that leverages the PCIe
> > > hotplug framework to trigger and manage the update of the FPGA image,
> > > including the disappearance and reappearance of the card on the PCIe bus.
> > > The fpgahp driver uses APIs from the pciehp driver. Two new operation
> > > callbacks are defined in hotplug_slot_ops:
> > >
> > >   - available_images: Optional: available FPGA images
> > >   - image_load: Optional: trigger the FPGA to load a new image
> > 
> > Why is all of this tied into the pci hotplug code? Shouldn't it be
> > specific to this one driver instead?  pci hotplug is for removing/adding
> > PCI devices to the system, not messing with FPGA images.
> >
> > This feels like an abuse of the pci hotplug bus to me as this is NOT
> > really a PCI hotplug bus at all, right?
> 
> While it is true that triggering an FPGA image-load does not involve
> hotplug specific registers to be managed, the RTL that comprises
> the PCIe interface will disappear and then reappear after the FPGA
> is reprogrammed. When it reappears, it_could/_/have a different PCI
> ID. The process of managing this event has a lot of similarity to a
> PCIe hotplug event; there is a lot of existing PCIe hotplug related
> code that could be leveraged.

It sounds like the N3000 is a PCI endpoint device which, when reprogrammed,
briefly disappears from the bus and then may reappear under a different
device ID.

What you want to do then is make sure that the slot into which the N3000
is plugged is hotplug-capable.  In that case, pciehp will handle
disappearance and reappearance of the card just fine.  Once the N3000
disables the link, pciehp will bring down the slot.  Once it re-enables
the link, it will bring the slot up again.  It's as if the card was
removed and replaced with a different one.  pciehp will bind to the
Root Port or Downstream Port associated with the hotplug slot.

The pci_hotplug_port infrastructure is for hotplug controllers which
handle devices disappearing and reappearing *below* them.  It is not
for endpoint devices.

Thanks,

Lukas

  reply	other threads:[~2023-01-20 18:44 UTC|newest]

Thread overview: 29+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-01-19  1:35 [PATCH v1 00/12] add FPGA hotplug manager driver Tianfei Zhang
2023-01-19  1:35 ` [PATCH v1 01/12] PCI: hotplug: add new callbacks on hotplug_slot_ops Tianfei Zhang
2023-01-19 13:31   ` Greg KH
2023-01-19  1:35 ` [PATCH v1 02/12] PCI: hotplug: expose APIs from pciehp driver Tianfei Zhang
2023-01-19  1:35 ` [PATCH v1 03/12] PCI: hotplug: add and expose link disable API Tianfei Zhang
2023-01-19  1:35 ` [PATCH v1 04/12] PCI: hotplug: add FPGA PCI hotplug manager driver Tianfei Zhang
2023-01-19  1:35 ` [PATCH v1 05/12] fpga: dfl: register dfl-pci device into fpgahph driver Tianfei Zhang
2023-01-19  1:35 ` [PATCH v1 06/12] driver core: expose device_is_ancestor() API Tianfei Zhang
2023-01-19  1:35 ` [PATCH v1 07/12] PCI: hotplug: add register/unregister function for BMC device Tianfei Zhang
2023-01-19  1:35 ` [PATCH v1 08/12] fpga: m10bmc-sec: register BMC device into fpgahp driver Tianfei Zhang
2023-01-19  1:35 ` [PATCH v1 09/12] fpga: dfl: remove non-reserved devices Tianfei Zhang
2023-01-19  1:36 ` [PATCH v1 10/12] PCI: hotplug: implement the hotplug_slot_ops callback for fpgahp Tianfei Zhang
2023-01-19 13:28   ` Greg KH
2023-01-20 22:38     ` Russ Weight
2023-01-21  7:35       ` Greg KH
2023-01-19  1:36 ` [PATCH v1 11/12] fpga: m10bmc-sec: add m10bmc_sec_retimer_load callback Tianfei Zhang
2023-01-19 14:22   ` Lee Jones
2023-01-19  1:36 ` [PATCH v1 12/12] Documentation: fpga: add description of fpgahp driver Tianfei Zhang
2023-01-19  9:38   ` Bagas Sanjaya
2023-01-19  8:06 ` [PATCH v1 00/12] add FPGA hotplug manager driver Pali Rohár
2023-01-19  8:17   ` Zhang, Tianfei
2023-01-19 11:27     ` andriy.shevchenko
2023-01-19 12:09       ` Zhang, Tianfei
2023-01-19 13:33 ` Greg KH
2023-01-19 13:43   ` Rafael J. Wysocki
2023-01-19 15:33     ` Greg KH
2023-01-20 16:28   ` Russ Weight
2023-01-20 18:42     ` Lukas Wunner [this message]
2023-01-21  7:34       ` Greg KH

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