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[75.142.250.213]) by smtp.gmail.com with ESMTPSA id u9sm12338360qtf.76.2021.05.10.11.52.16 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Mon, 10 May 2021 11:52:17 -0700 (PDT) Subject: Re: [PATCH v12 0/7] FPGA Security Manager Class Driver To: Moritz Fischer Cc: Russ Weight , linux-fpga@vger.kernel.org, linux-kernel@vger.kernel.org, lgoncalv@redhat.com, yilun.xu@intel.com, hao.wu@intel.com, matthew.gerlach@intel.com, richard.gong@intel.com References: <20210503213546.316439-1-russell.h.weight@intel.com> <6f3ce0db-883e-2c5b-e671-9ccc363ee532@redhat.com> From: Tom Rix Message-ID: <91d29fc4-ac04-270a-f73a-e1dd3ba2965f@redhat.com> Date: Mon, 10 May 2021 11:52:15 -0700 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:78.0) Gecko/20100101 Thunderbird/78.8.1 MIME-Version: 1.0 In-Reply-To: Content-Type: text/plain; charset=utf-8; format=flowed Content-Transfer-Encoding: 7bit Content-Language: en-US Precedence: bulk List-ID: X-Mailing-List: linux-fpga@vger.kernel.org On 5/10/21 10:37 AM, Moritz Fischer wrote: > On Mon, May 10, 2021 at 07:12:57AM -0700, Tom Rix wrote: >> On 5/3/21 2:35 PM, Russ Weight wrote: >>> The FPGA Security Manager class driver provides a common >>> API for user-space tools to manage updates for secure FPGA >>> devices. Device drivers that instantiate the FPGA Security >>> Manager class driver will interact with a HW secure update >>> engine in order to transfer new FPGA and BMC images to FLASH so >>> that they will be automatically loaded when the FPGA card reboots. >> Russ, >> >> These have my Reviewed-by, but since it has been a while, I am looking these >> over again. >> >> If you do not hear anything from me in the next couple of days, please >> assume everything is fine. >> >> Tom >> > I'll do one more one-over, if it looks good will apply end of the week, FWIW, my pass was fine. Thanks, Tom > > - Moritz >