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 messages from 2021-06-09 00:49:37 to 2021-06-23 11:57:19 UTC [more...]

[PATCH 0/4] fpga/mfd/hwmon: Initial support for Silicom N5010 PAC
 2021-06-23 11:56 UTC  (18+ messages)
` [PATCH 1/4] fpga: dfl: pci: add device IDs for Silicom N501x PAC cards
` [PATCH 2/4] fpga: dfl: Move DFH header register macros to linux/dfl.h
` [PATCH 3/4] spi: spi-altera-dfl: support n5010 feature revision
` [PATCH 4/4] hwmon: intel-m10-bmc: add sensor support for Silicom N5010 card

[Question] machxo2-spi driver input file
 2021-06-23  9:44 UTC 

[PATCH v7 0/3] fpga: Use standard class dev_release function
 2021-06-23  1:11 UTC  (4+ messages)
` [PATCH v7 1/3] fpga: mgr: Use standard dev_release for class driver
` [PATCH v7 2/3] fpga: bridge: "
` [PATCH v7 3/3] fpga: region: "

[PATCH v6 0/3] fpga: Use standard class dev_release function
 2021-06-22 23:08 UTC  (14+ messages)
` [PATCH v6 1/3] fpga: mgr: Use standard dev_release for class driver
` [PATCH v6 2/3] fpga: bridge: "
` [PATCH v6 3/3] fpga: region: "

[PATCH v5 0/4] fpga: reorganize to subdirs
 2021-06-22 20:05 UTC  (5+ messages)
` [PATCH v5 1/4] fpga: dfl: reorganize to subdir layout
` [PATCH v5 2/4] fpga: xilinx: "
` [PATCH v5 3/4] fpga: altera: "
` [PATCH v5 4/4] fpga: lattice: "

[PATCH v5 0/3] fpga: Use standard class dev_release function
 2021-06-21  9:48 UTC  (19+ messages)
` [PATCH v5 1/3] fpga: mgr: Use standard dev_release for class driver
` [PATCH v5 2/3] fpga: bridge: "
` [PATCH v5 3/3] fpga: region: "

[PATCH] fpga: machxo2-spi: Address warning about unused variable
 2021-06-18 22:46 UTC 

[PATCH v4 0/4] fpga: reorganize to subdirs
 2021-06-18 22:04 UTC  (15+ messages)
` [PATCH v4 1/4] fpga: dfl: reorganize to subdir layout
` [PATCH v4 2/4] fpga: xilinx: "
` [PATCH v4 3/4] fpga: altera: "
` [PATCH v4 4/4] fpga: lattice: "

[PATCH 00/11] fpga: change FPGA indirect article to an
 2021-06-17  8:00 UTC  (5+ messages)
` [PATCH 03/11] Documentation: ocxl.rst: "
` [PATCH 04/11] crypto: marvell: cesa: "

[PATCH 0/8] FPGA Manager devres cleanup
 2021-06-15 16:00 UTC  (20+ messages)
` [PATCH 1/8] fpga: altera-pr-ip: Remove function alt_pr_unregister
` [PATCH 2/8] fpga: stratix10-soc: Add missing fpga_mgr_free() call
` [PATCH 3/8] fpga: mgr: Rename dev to parent for parent device
` [PATCH 4/8] fpga: bridge: "
` [PATCH 5/8] fpga: region: "
` [PATCH 6/8] fpga: mgr: Use standard dev_release for class driver
` [PATCH 7/8] fpga: bridge: "
` [PATCH 8/8] fpga: region: "

[PATCH v3 0/4] fpga: reorganize to subdirs
 2021-06-14 15:15 UTC  (7+ messages)
` [PATCH v3 1/4] fpga: dfl: reorganize to subdir layout
` [PATCH v3 2/4] fpga: xilinx: "
` [PATCH v3 3/4] fpga: altera: "
` [PATCH v3 4/4] fpga: lattice: "

[PATCH] dt-bindings: serial: convert Cadence UART bindings to YAML
 2021-06-14 15:03 UTC  (3+ messages)

[PATCH] dt-bindings: fpga: zynq: convert bindings to YAML
 2021-06-13 21:28 UTC 

[PATCH V7 XRT Alveo 00/20] XRT Alveo driver overview
 2021-06-11 12:46 UTC  (5+ messages)
  ` RFC : "

[PATCH v3 0/8] fpga: Populate dev_release functions
 2021-06-10 19:44 UTC  (11+ messages)
` [PATCH v3 1/8] fpga: altera-pr-ip: Remove function alt_pr_unregister
` [PATCH v3 2/8] fpga: stratix10-soc: Add missing fpga_mgr_free() call
` [PATCH v3 3/8] fpga: mgr: Rename dev to parent for parent device
` [PATCH v3 4/8] fpga: bridge: "
` [PATCH v3 5/8] fpga: region: "
` [PATCH v3 6/8] fpga: mgr: Use standard dev_release for class driver
` [PATCH v3 7/8] fpga: bridge: "
` [PATCH v3 8/8] fpga: region: "

[PATCH v2 0/8] fpga: Populate dev_release functions
 2021-06-10 18:53 UTC  (19+ messages)
` [PATCH v2 1/8] fpga: altera-pr-ip: Remove function alt_pr_unregister
` [PATCH v2 2/8] fpga: stratix10-soc: Add missing fpga_mgr_free() call
` [PATCH v2 3/8] fpga: mgr: Rename dev to parent for parent device
` [PATCH v2 4/8] fpga: bridge: "
` [PATCH v2 5/8] fpga: region: "
` [PATCH v2 6/8] fpga: mgr: Use standard dev_release for class driver
` [PATCH v2 7/8] fpga: bridge: "
` [PATCH v2 8/8] fpga: region: "

[PATCH v7 0/4]Add Bitstream configuration support for Versal
 2021-06-10 16:03 UTC  (3+ messages)
` [PATCH v7 3/4] dt-bindings: firmware: Add bindings for xilinx firmware

[PATCH v2 0/4] fpga: reorganize to subdirs
 2021-06-09 19:16 UTC  (17+ messages)
` [PATCH v2 1/4] fpga: dfl: reorganize to subdir layout
` [PATCH v2 2/4] fpga: xilinx: "
` [PATCH v2 3/4] fpga: altera: "
` [PATCH v2 4/4] fpga: lattice: "

[PATCH v1 0/5] fpga: Populate dev_release functions
 2021-06-09 16:45 UTC  (14+ messages)
` [PATCH v1 1/5] fpga: mgr: Use standard dev_release for class driver
` [PATCH v1 2/5] fpga: altera-pr-ip: Remove fpga_mgr_unregister() call
` [PATCH v1 3/5] fpga: stratix10-soc: Add missing fpga_mgr_free() call
` [PATCH v1 4/5] fpga: bridge: Use standard dev_release for class driver
` [PATCH v1 5/5] fpga: region: "

[PATCH 6/7] fpga: xilinx: remove xilinx- prefix on files
 2021-06-09 14:57 UTC  (4+ messages)

Proposal
 2021-06-09 12:10 UTC 

[PATCH 0/7] fpga: reorganize to subdirs
 2021-06-09 13:21 UTC  (8+ messages)
` [PATCH 1/7] fpga: dfl: reorganize to subdir layout
` [PATCH 2/7] fpga: xilinx: "
` [PATCH 3/7] fpga: altera: "
` [PATCH 4/7] fpga: lattice: "
` [PATCH 5/7] fpga: dfl: remove dfl- prefix on files
` [PATCH 6/7] fpga: xilinx: remove xilinx- "
` [PATCH 7/7] fpga: altera: remove altera- "

[PATCH 0/7] fpga: reorganize to subdirs
 2021-06-09 13:17 UTC  (4+ messages)
` [PATCH 1/7] fpga: dfl: reorganize to subdir layout
` [PATCH 2/7] fpga: xilinx: "

[PATCH 0/7] fpga: reorganize to subdirs
 2021-06-09 13:11 UTC  (5+ messages)

Projects
 2021-06-09 12:09 UTC 

[PATCH 7/7] fpga: altera: remove altera- prefix on files
 2021-06-09 10:00 UTC  (2+ messages)

[RFC v2 0/4]Fpga: adds support to load the user-key encrypted FPGA Image loading
 2021-06-09  9:56 UTC  (8+ messages)
` [RFC v2 1/4] drivers: firmware: Add user encrypted key load API support
` [RFC v2 2/4] fpga: Add new property to support user-key encrypted bitstream loading
` [RFC v2 3/4] drivers: fpga: Add user-key encrypted FPGA Image loading support
` [RFC v2 4/4] fpga: zynqmp: "


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