From: matthew.gerlach@linux.intel.com
To: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Cc: hao.wu@intel.com, yilun.xu@intel.com, russell.h.weight@intel.com,
basheer.ahmed.muddebihal@intel.com, trix@redhat.com,
mdf@kernel.org, linux-fpga@vger.kernel.org,
linux-doc@vger.kernel.org, linux-kernel@vger.kernel.org,
tianfei.zhang@intel.com, corbet@lwn.net,
gregkh@linuxfoundation.org, linux-serial@vger.kernel.org,
jirislaby@kernel.org, geert+renesas@glider.be,
niklas.soderlund+renesas@ragnatech.se, macro@orcam.me.uk,
johan@kernel.org, lukas@wunner.de, ilpo.jarvinen@linux.intel.com,
marpagan@redhat.com, bagasdotme@gmail.com
Subject: Re: [PATCH v7 3/4] fpga: dfl: add basic support for DFHv1
Date: Wed, 21 Dec 2022 11:14:59 -0800 (PST) [thread overview]
Message-ID: <alpine.DEB.2.22.394.2212211105490.570436@rhweight-WRK1> (raw)
In-Reply-To: <Y6HqyjFkiUDeNmH1@smile.fi.intel.com>
On Tue, 20 Dec 2022, Andy Shevchenko wrote:
> On Tue, Dec 20, 2022 at 08:36:51AM -0800, matthew.gerlach@linux.intel.com wrote:
>> From: Matthew Gerlach <matthew.gerlach@linux.intel.com>
>>
>> Version 1 of the Device Feature Header (DFH) definition adds
>> functionality to the DFL bus.
>>
>> A DFHv1 header may have one or more parameter blocks that
>> further describes the HW to SW. Add support to the DFL bus
>> to parse the MSI-X parameter.
>>
>> The location of a feature's register set is explicitly
>> described in DFHv1 and can be relative to the base of the DFHv1
>> or an absolute address. Parse the location and pass the information
>> to DFL driver.
>
> ...
>
>> +/**
>> + * dfh_find_param() - find data for the given parameter id
>> + * @dfl_dev: dfl device
>> + * @param: id of dfl parameter
>> + *
>> + * Return: pointer to parameter header on success, NULL otherwise.
>
> header is a bit confusing here, does it mean we give and ID and we got
> something more than just a data as summary above suggests?
Yes, the summary is not correct. It should say "find the parameter block
for the given parameter id".
>
> In such case summary and this text should clarify what exactly we get
> and layout of the data. Since this is a pointer, who is responsible of
> checking out-of-boundary accesses? For instance, if the parameters are
> variadic by length the length should be returned as well. Otherwise it
> should be specified as a constant somewhere, right?
The parameter header has the next/size field; so the caller of
dfh_find_param should perform boundary checking as part of interpreting
the parameter data. I think a function to perform this checking
and data interpretation would help here.
>
>> + */
>> +u64 *dfh_find_param(struct dfl_device *dfl_dev, int param_id)
>> +{
>> + return find_param(dfl_dev->params, dfl_dev->param_size, param_id);
>> +}
>> +EXPORT_SYMBOL_GPL(dfh_find_param);
>
> ...
>
>> + finfo = kzalloc(sizeof(*finfo) + dfh_psize, GFP_KERNEL);
>
> It sounds like a candidate for struct_size() from overflow.h.
> I.o.w. check that header and come up with the best what can
> suit your case.
finfo = kzalloc(struct_size(finfo, params, dfh_psize/sizeof(u64)),
GFP_KERNEL);
Does seem better.
Thanks for the suggestion,
Matthew Gerlach
>
>> if (!finfo)
>> return -ENOMEM;
>
> --
> With Best Regards,
> Andy Shevchenko
>
>
>
next prev parent reply other threads:[~2022-12-21 19:16 UTC|newest]
Thread overview: 22+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-12-20 16:36 [PATCH v7 0/4] Enhance definition of DFH and use enhancements for UART driver matthew.gerlach
2022-12-20 16:36 ` [PATCH v7 1/4] Documentation: fpga: dfl: Add documentation for DFHv1 matthew.gerlach
2022-12-20 16:53 ` Andy Shevchenko
2022-12-21 16:52 ` matthew.gerlach
2022-12-20 16:36 ` [PATCH v7 2/4] fpga: dfl: Add DFHv1 Register Definitions matthew.gerlach
2022-12-20 16:54 ` Andy Shevchenko
2022-12-20 16:36 ` [PATCH v7 3/4] fpga: dfl: add basic support for DFHv1 matthew.gerlach
2022-12-20 17:03 ` Andy Shevchenko
2022-12-21 19:14 ` matthew.gerlach [this message]
2022-12-26 3:15 ` Xu Yilun
2022-12-31 20:46 ` matthew.gerlach
2023-01-03 4:22 ` Xu Yilun
2023-01-03 19:50 ` matthew.gerlach
2023-01-04 2:34 ` Xu Yilun
2022-12-21 11:58 ` Ilpo Järvinen
2022-12-21 22:29 ` matthew.gerlach
2022-12-20 16:36 ` [PATCH v7 4/4] tty: serial: 8250: add DFL bus driver for Altera 16550 matthew.gerlach
2022-12-20 17:09 ` Andy Shevchenko
2022-12-21 17:26 ` Marco Pagani
2022-12-21 19:52 ` Marco Pagani
2022-12-21 22:37 ` matthew.gerlach
2022-12-21 22:16 ` matthew.gerlach
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=alpine.DEB.2.22.394.2212211105490.570436@rhweight-WRK1 \
--to=matthew.gerlach@linux.intel.com \
--cc=andriy.shevchenko@linux.intel.com \
--cc=bagasdotme@gmail.com \
--cc=basheer.ahmed.muddebihal@intel.com \
--cc=corbet@lwn.net \
--cc=geert+renesas@glider.be \
--cc=gregkh@linuxfoundation.org \
--cc=hao.wu@intel.com \
--cc=ilpo.jarvinen@linux.intel.com \
--cc=jirislaby@kernel.org \
--cc=johan@kernel.org \
--cc=linux-doc@vger.kernel.org \
--cc=linux-fpga@vger.kernel.org \
--cc=linux-kernel@vger.kernel.org \
--cc=linux-serial@vger.kernel.org \
--cc=lukas@wunner.de \
--cc=macro@orcam.me.uk \
--cc=marpagan@redhat.com \
--cc=mdf@kernel.org \
--cc=niklas.soderlund+renesas@ragnatech.se \
--cc=russell.h.weight@intel.com \
--cc=tianfei.zhang@intel.com \
--cc=trix@redhat.com \
--cc=yilun.xu@intel.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).