From: Tom Rix <trix@redhat.com>
To: Xu Yilun <yilun.xu@intel.com>,
mdf@kernel.org, linux-fpga@vger.kernel.org,
linux-kernel@vger.kernel.org
Cc: lgoncalv@redhat.com, Matthew Gerlach <matthew.gerlach@linux.intel.com>
Subject: Re: [RESEND PATCH 2/2] fpga: dfl: fix bug in port reset handshake
Date: Thu, 9 Jul 2020 06:20:42 -0700 [thread overview]
Message-ID: <c6984a5b-ce56-2094-a30e-a019d8721420@redhat.com> (raw)
In-Reply-To: <1594282337-32125-3-git-send-email-yilun.xu@intel.com>
On 7/9/20 1:12 AM, Xu Yilun wrote:
> From: Matthew Gerlach <matthew.gerlach@linux.intel.com>
>
> When putting the port in reset, driver must wait for the soft reset
> acknowledgment bit instead of the soft reset bit.
>
> Fixes: 47c1b19c160f (fpga: dfl: afu: add port ops support)
> Signed-off-by: Matthew Gerlach <matthew.gerlach@linux.intel.com>
> Signed-off-by: Xu Yilun <yilun.xu@intel.com>
> Acked-by: Wu Hao <hao.wu@intel.com>
> ---
> drivers/fpga/dfl-afu-main.c | 3 ++-
> 1 file changed, 2 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/fpga/dfl-afu-main.c b/drivers/fpga/dfl-afu-main.c
> index 7c84fee..753cda4 100644
> --- a/drivers/fpga/dfl-afu-main.c
> +++ b/drivers/fpga/dfl-afu-main.c
> @@ -83,7 +83,8 @@ int __afu_port_disable(struct platform_device *pdev)
> * on this port and minimum soft reset pulse width has elapsed.
> * Driver polls port_soft_reset_ack to determine if reset done by HW.
> */
> - if (readq_poll_timeout(base + PORT_HDR_CTRL, v, v & PORT_CTRL_SFTRST,
> + if (readq_poll_timeout(base + PORT_HDR_CTRL, v,
> + v & PORT_CTRL_SFTRST_ACK,
> RST_POLL_INVL, RST_POLL_TIMEOUT)) {
> dev_err(&pdev->dev, "timeout, fail to reset device\n");
> return -ETIMEDOUT;
Looks ok to me.
Reviewed-by: Tom Rix <trix@redhat.com>
prev parent reply other threads:[~2020-07-09 13:20 UTC|newest]
Thread overview: 7+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-07-09 8:12 [RESEND PATCH 0/2] Bug fixes for FPGA DFL Xu Yilun
2020-07-09 8:12 ` [RESEND PATCH 1/2] fpga: dfl: pci: reduce the scope of variable 'ret' Xu Yilun
2020-07-09 13:18 ` Tom Rix
2020-07-10 5:16 ` Xu Yilun
2020-07-11 16:21 ` Tom Rix
2020-07-09 8:12 ` [RESEND PATCH 2/2] fpga: dfl: fix bug in port reset handshake Xu Yilun
2020-07-09 13:20 ` Tom Rix [this message]
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