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From: Stephen Boyd <swboyd@chromium.org>
To: Eric Biggers <ebiggers@kernel.org>,
	linux-arm-msm@vger.kernel.org, linux-scsi@vger.kernel.org
Cc: linux-block@vger.kernel.org, linux-fscrypt@vger.kernel.org,
	Alim Akhtar <alim.akhtar@samsung.com>,
	Andy Gross <agross@kernel.org>, Avri Altman <avri.altman@wdc.com>,
	Barani Muthukumaran <bmuthuku@qti.qualcomm.com>,
	Bjorn Andersson <bjorn.andersson@linaro.org>,
	Can Guo <cang@codeaurora.org>,
	Elliot Berman <eberman@codeaurora.org>,
	Jaegeuk Kim <jaegeuk@kernel.org>
Subject: Re: [RFC PATCH v2 1/4] firmware: qcom_scm: Add support for programming inline crypto keys
Date: Wed, 04 Mar 2020 09:04:49 -0800	[thread overview]
Message-ID: <158334148941.7173.15031605009318265979@swboyd.mtv.corp.google.com> (raw)
In-Reply-To: <20200304064942.371978-2-ebiggers@kernel.org>

Quoting Eric Biggers (2020-03-03 22:49:39)
> diff --git a/drivers/firmware/qcom_scm.c b/drivers/firmware/qcom_scm.c
> index 059bb0fbae9e..7fb9f606250f 100644
> --- a/drivers/firmware/qcom_scm.c
> +++ b/drivers/firmware/qcom_scm.c
> @@ -926,6 +927,101 @@ int qcom_scm_ocmem_unlock(enum qcom_scm_ocmem_client id, u32 offset, u32 size)
[...]
> +
> +/**
> + * qcom_scm_ice_set_key() - Set an inline encryption key
> + * @index: the keyslot into which to set the key
> + * @key: the key to program
> + * @key_size: the size of the key in bytes
> + * @cipher: the encryption algorithm the key is for
> + * @data_unit_size: the encryption data unit size, i.e. the size of each
> + *                 individual plaintext and ciphertext.  Given in 512-byte
> + *                 units, e.g. 1 = 512 bytes, 8 = 4096 bytes, etc.
> + *
> + * Program a key into a keyslot of Qualcomm ICE (Inline Crypto Engine), where it
> + * can then be used to encrypt/decrypt UFS I/O requests inline.
> + *
> + * The UFSHCI standard defines a standard way to do this, but it doesn't work on
> + * these SoCs; only this SCM call does.
> + *
> + * Return: 0 on success; -errno on failure.
> + */
> +int qcom_scm_ice_set_key(u32 index, const u8 *key, int key_size,
> +                        enum qcom_scm_ice_cipher cipher, int data_unit_size)

Why not make key_size and data_unit_size unsigned?

> +{
> +       struct qcom_scm_desc desc = {
> +               .svc = QCOM_SCM_SVC_ES,
> +               .cmd = QCOM_SCM_ES_CONFIG_SET_ICE_KEY,
> +               .arginfo = QCOM_SCM_ARGS(5, QCOM_SCM_VAL, QCOM_SCM_RW,
> +                                        QCOM_SCM_VAL, QCOM_SCM_VAL,
> +                                        QCOM_SCM_VAL),
> +               .args[0] = index,
> +               .args[2] = key_size,
> +               .args[3] = cipher,
> +               .args[4] = data_unit_size,
> +               .owner = ARM_SMCCC_OWNER_SIP,
> +       };
> +       u8 *keybuf;
> +       dma_addr_t key_phys;
> +       int ret;
> +
> +       keybuf = kmemdup(key, key_size, GFP_KERNEL);

Is this to make the key physically contiguous? Probably worth a comment
to help others understand why this is here.

> +       if (!keybuf)
> +               return -ENOMEM;
> +
> +       key_phys = dma_map_single(__scm->dev, keybuf, key_size, DMA_TO_DEVICE);
> +       if (dma_mapping_error(__scm->dev, key_phys)) {
> +               ret = -ENOMEM;
> +               goto out;
> +       }
> +       desc.args[1] = key_phys;
> +
> +       ret = qcom_scm_call(__scm->dev, &desc, NULL);
> +
> +       dma_unmap_single(__scm->dev, key_phys, key_size, DMA_TO_DEVICE);
> +out:
> +       kzfree(keybuf);

And this is because we want to clear key contents out of the slab? What
about if the dma_map_single() bounces to a bounce buffer? I think that
isn't going to happen because __scm->dev is just some firmware device
that doesn't require bounce buffers but it's worth another comment to
clarify this.

> +       return ret;
> +}
> +EXPORT_SYMBOL(qcom_scm_ice_set_key);
> +
>  /**
>   * qcom_scm_hdcp_available() - Check if secure environment supports HDCP.
>   *

  reply	other threads:[~2020-03-04 17:04 UTC|newest]

Thread overview: 10+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-03-04  6:49 [RFC PATCH v2 0/4] Inline crypto support on DragonBoard 845c Eric Biggers
2020-03-04  6:49 ` [RFC PATCH v2 1/4] firmware: qcom_scm: Add support for programming inline crypto keys Eric Biggers
2020-03-04 17:04   ` Stephen Boyd [this message]
2020-03-04 21:10     ` Eric Biggers
2020-03-04  6:49 ` [RFC PATCH v2 2/4] arm64: dts: sdm845: add Inline Crypto Engine registers and clock Eric Biggers
2020-03-04 17:08   ` Stephen Boyd
2020-03-04  6:49 ` [RFC PATCH v2 3/4] scsi: ufs: add program_key() variant op Eric Biggers
2020-03-04 20:18   ` bmuthuku
2020-03-04 20:52     ` Eric Biggers
2020-03-04  6:49 ` [RFC PATCH v2 4/4] scsi: ufs-qcom: add Inline Crypto Engine support Eric Biggers

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