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Subject: Re: block: DMA alignment of IO buffer allocated from slab
From: Bart Van Assche <bvanassche@acm.org>
To: Matthew Wilcox <willy@infradead.org>
Cc: Andrey Ryabinin <aryabinin@virtuozzo.com>, Ming Lei
 <ming.lei@redhat.com>,  Vitaly Kuznetsov <vkuznets@redhat.com>, Christoph
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Date: Mon, 24 Sep 2018 12:56:18 -0700
In-Reply-To: <20180924185753.GA32269@bombadil.infradead.org>
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On Mon, 2018-09-24 at 11:57 -0700, Matthew Wilcox wrote:
+AD4 On Mon, Sep 24, 2018 at 09:19:44AM -0700, Bart Van Assche wrote:
+AD4 +AD4 That means that two buffers allocated with kmalloc() may share a cache line on
+AD4 +AD4 x86-64. Since it is allowed to use a buffer allocated by kmalloc() for DMA, can
+AD4 +AD4 this lead to data corruption, e.g. if the CPU writes into one buffer allocated
+AD4 +AD4 with kmalloc() and a device performs a DMA write to another kmalloc() buffer and
+AD4 +AD4 both write operations affect the same cache line?
+AD4 
+AD4 You're not supposed to use kmalloc memory for DMA.  This is why we have
+AD4 dma+AF8-alloc+AF8-coherent() and friends.

Are you claiming that all drivers that use DMA should use coherent DMA only? If
coherent DMA is the only DMA style that should be used, why do the following
function pointers exist in struct dma+AF8-map+AF8-ops?

	void (+ACo-sync+AF8-single+AF8-for+AF8-cpu)(struct device +ACo-dev,
				    dma+AF8-addr+AF8-t dma+AF8-handle, size+AF8-t size,
				    enum dma+AF8-data+AF8-direction dir)+ADs
	void (+ACo-sync+AF8-single+AF8-for+AF8-device)(struct device +ACo-dev,
				       dma+AF8-addr+AF8-t dma+AF8-handle, size+AF8-t size,
				       enum dma+AF8-data+AF8-direction dir)+ADs
	void (+ACo-sync+AF8-sg+AF8-for+AF8-cpu)(struct device +ACo-dev,
				struct scatterlist +ACo-sg, int nents,
				enum dma+AF8-data+AF8-direction dir)+ADs
	void (+ACo-sync+AF8-sg+AF8-for+AF8-device)(struct device +ACo-dev,
				   struct scatterlist +ACo-sg, int nents,
				   enum dma+AF8-data+AF8-direction dir)+ADs

Thanks,

Bart.