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From: Mark Brown <broonie@kernel.org>
To: Catalin Marinas <catalin.marinas@arm.com>, Will Deacon <will@kernel.org>
Cc: "Alexander Viro" <viro@zeniv.linux.org.uk>,
	"Paul Elliott" <paul.elliott@arm.com>,
	"Peter Zijlstra" <peterz@infradead.org>,
	"Yu-cheng Yu" <yu-cheng.yu@intel.com>,
	"Amit Kachhap" <amit.kachhap@arm.com>,
	"Vincenzo Frascino" <vincenzo.frascino@arm.com>,
	"Marc Zyngier" <maz@kernel.org>,
	"Eugene Syromiatnikov" <esyr@redhat.com>,
	"Szabolcs Nagy" <szabolcs.nagy@arm.com>,
	"H . J . Lu " <hjl.tools@gmail.com>,
	"Andrew Jones" <drjones@redhat.com>,
	"Kees Cook" <keescook@chromium.org>,
	"Arnd Bergmann" <arnd@arndb.de>, "Jann Horn" <jannh@google.com>,
	"Richard Henderson" <richard.henderson@linaro.org>,
	"Kristina Martšenko" <kristina.martsenko@arm.com>,
	"Thomas Gleixner" <tglx@linutronix.de>,
	"Florian Weimer" <fweimer@redhat.com>,
	"Sudakshina Das" <sudi.das@arm.com>,
	linux-arm-kernel@lists.infradead.org,
	linux-kernel@vger.kernel.org, linux-arch@vger.kernel.org,
	linux-fsdevel@vger.kernel.org,
	"Dave Martin" <Dave.Martin@arm.com>,
	"Mark Rutland" <mark.rutland@arm.com>,
	"Mark Brown" <broonie@kernel.org>
Subject: [PATCH v7 07/11] arm64: unify native/compat instruction skipping
Date: Wed, 26 Feb 2020 15:57:10 +0000
Message-ID: <20200226155714.43937-8-broonie@kernel.org> (raw)
In-Reply-To: <20200226155714.43937-1-broonie@kernel.org>

From: Dave Martin <Dave.Martin@arm.com>

Skipping of an instruction on AArch32 works a bit differently from
AArch64, mainly due to the different CPSR/PSTATE semantics.

Currently arm64_skip_faulting_instruction() is only suitable for
AArch64, and arm64_compat_skip_faulting_instruction() handles the IT
state machine but is local to traps.c.

Since manual instruction skipping implies a trap, it's a relatively
slow path.

So, make arm64_skip_faulting_instruction() handle both compat and
native, and get rid of the arm64_compat_skip_faulting_instruction()
special case.

Signed-off-by: Dave Martin <Dave.Martin@arm.com>
Reviewed-by: Mark Rutland <mark.rutland@arm.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
---
 arch/arm64/kernel/traps.c | 18 ++++++++----------
 1 file changed, 8 insertions(+), 10 deletions(-)

diff --git a/arch/arm64/kernel/traps.c b/arch/arm64/kernel/traps.c
index b8c714dda851..bc9f4292bfc3 100644
--- a/arch/arm64/kernel/traps.c
+++ b/arch/arm64/kernel/traps.c
@@ -272,6 +272,8 @@ void arm64_notify_die(const char *str, struct pt_regs *regs,
 	}
 }
 
+static void advance_itstate(struct pt_regs *regs);
+
 void arm64_skip_faulting_instruction(struct pt_regs *regs, unsigned long size)
 {
 	regs->pc += size;
@@ -282,6 +284,9 @@ void arm64_skip_faulting_instruction(struct pt_regs *regs, unsigned long size)
 	 */
 	if (user_mode(regs))
 		user_fastforward_single_step(current);
+
+	if (regs->pstate & PSR_MODE32_BIT)
+		advance_itstate(regs);
 }
 
 static LIST_HEAD(undef_hook);
@@ -644,19 +649,12 @@ static void advance_itstate(struct pt_regs *regs)
 	compat_set_it_state(regs, it);
 }
 
-static void arm64_compat_skip_faulting_instruction(struct pt_regs *regs,
-						   unsigned int sz)
-{
-	advance_itstate(regs);
-	arm64_skip_faulting_instruction(regs, sz);
-}
-
 static void compat_cntfrq_read_handler(unsigned int esr, struct pt_regs *regs)
 {
 	int reg = (esr & ESR_ELx_CP15_32_ISS_RT_MASK) >> ESR_ELx_CP15_32_ISS_RT_SHIFT;
 
 	pt_regs_write_reg(regs, reg, arch_timer_get_rate());
-	arm64_compat_skip_faulting_instruction(regs, 4);
+	arm64_skip_faulting_instruction(regs, 4);
 }
 
 static const struct sys64_hook cp15_32_hooks[] = {
@@ -676,7 +674,7 @@ static void compat_cntvct_read_handler(unsigned int esr, struct pt_regs *regs)
 
 	pt_regs_write_reg(regs, rt, lower_32_bits(val));
 	pt_regs_write_reg(regs, rt2, upper_32_bits(val));
-	arm64_compat_skip_faulting_instruction(regs, 4);
+	arm64_skip_faulting_instruction(regs, 4);
 }
 
 static const struct sys64_hook cp15_64_hooks[] = {
@@ -697,7 +695,7 @@ void do_cp15instr(unsigned int esr, struct pt_regs *regs)
 		 * There is no T16 variant of a CP access, so we
 		 * always advance PC by 4 bytes.
 		 */
-		arm64_compat_skip_faulting_instruction(regs, 4);
+		arm64_skip_faulting_instruction(regs, 4);
 		return;
 	}
 
-- 
2.20.1


  parent reply index

Thread overview: 20+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-02-26 15:57 [PATCH v7 00/11] arm64: Branch Target Identification support Mark Brown
2020-02-26 15:57 ` [PATCH v7 01/11] ELF: UAPI and Kconfig additions for ELF program properties Mark Brown
2020-02-26 15:57 ` [PATCH v7 02/11] ELF: Add ELF program property parsing support Mark Brown
2020-02-26 15:57 ` [PATCH v7 03/11] arm64: Basic Branch Target Identification support Mark Brown
2020-02-26 15:57 ` [PATCH v7 04/11] elf: Allow arch to tweak initial mmap prot flags Mark Brown
2020-02-26 15:57 ` [PATCH v7 05/11] arm64: elf: Enable BTI at exec based on ELF program properties Mark Brown
2020-02-26 21:43   ` Kees Cook
2020-02-27  4:45   ` Amit Kachhap
2020-02-26 15:57 ` [PATCH v7 06/11] arm64: BTI: Decode BYTPE bits when printing PSTATE Mark Brown
2020-02-26 21:42   ` Kees Cook
2020-02-26 15:57 ` Mark Brown [this message]
2020-02-26 21:41   ` [PATCH v7 07/11] arm64: unify native/compat instruction skipping Kees Cook
2020-02-26 15:57 ` [PATCH v7 08/11] arm64: traps: Shuffle code to eliminate forward declarations Mark Brown
2020-02-26 21:39   ` Kees Cook
2020-02-26 15:57 ` [PATCH v7 09/11] arm64: BTI: Reset BTYPE when skipping emulated instructions Mark Brown
2020-02-26 15:57 ` [PATCH v7 10/11] KVM: " Mark Brown
2020-02-26 15:57 ` [PATCH v7 11/11] arm64: mm: Display guarded pages in ptdump Mark Brown
2020-02-26 21:38   ` Kees Cook
2020-02-26 21:44 ` [PATCH v7 00/11] arm64: Branch Target Identification support Kees Cook
2020-02-27 13:13   ` Mark Brown

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