From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-10.1 required=3.0 tests=DKIMWL_WL_HIGH,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,INCLUDES_PATCH,MAILING_LIST_MULTI,SIGNED_OFF_BY, SPF_HELO_NONE,SPF_PASS,USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id A9569C2BB1D for ; Mon, 16 Mar 2020 16:51:35 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 69B5220679 for ; Mon, 16 Mar 2020 16:51:35 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=default; t=1584377495; bh=8DbiuayWwtnUd37xeLtRMHAQQaelbeI7IRs4yUBuTHc=; h=From:To:Cc:Subject:Date:In-Reply-To:References:List-ID:From; b=r8epnu8gpjCZXWWNlsCDK0D5I1LCQiz9S4OIpswW7jVhUwA52E+2Kn1Zc5elvp4WN EsKyLNEkd+sMZN5hL9tEKNwPly9kTmheIiQTmHstiSHwpXmE0GU5C7bHuKAr5SghXd 3nEuP6jpb8yZbM7s8tTLFZSkphj2cnKYbMDlBecc= Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1732304AbgCPQva (ORCPT ); Mon, 16 Mar 2020 12:51:30 -0400 Received: from foss.arm.com ([217.140.110.172]:52372 "EHLO foss.arm.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1732296AbgCPQv1 (ORCPT ); Mon, 16 Mar 2020 12:51:27 -0400 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 2820313D5; Mon, 16 Mar 2020 09:51:27 -0700 (PDT) Received: from localhost (unknown [10.37.6.21]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 9FE373F67D; Mon, 16 Mar 2020 09:51:26 -0700 (PDT) From: Mark Brown To: Catalin Marinas , Will Deacon Cc: Alexander Viro , Paul Elliott , Peter Zijlstra , Yu-cheng Yu , Amit Kachhap , Vincenzo Frascino , Marc Zyngier , Eugene Syromiatnikov , Szabolcs Nagy , "H . J . Lu " , Andrew Jones , Kees Cook , Arnd Bergmann , Jann Horn , Richard Henderson , =?UTF-8?q?Kristina=20Mart=C5=A1enko?= , Thomas Gleixner , Florian Weimer , Sudakshina Das , linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-arch@vger.kernel.org, linux-fsdevel@vger.kernel.org, Dave Martin , Mark Brown Subject: [PATCH v10 13/13] arm64: BTI: Add Kconfig entry for userspace BTI Date: Mon, 16 Mar 2020 16:50:55 +0000 Message-Id: <20200316165055.31179-14-broonie@kernel.org> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20200316165055.31179-1-broonie@kernel.org> References: <20200316165055.31179-1-broonie@kernel.org> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Sender: linux-fsdevel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-fsdevel@vger.kernel.org From: Dave Martin Now that the code for userspace BTI support is in the kernel add the Kconfig entry so that it can be built and used. [Split out of "arm64: Basic Branch Target Identification support" -- broonie] Signed-off-by: Dave Martin Reviewed-by: Kees Cook Signed-off-by: Mark Brown --- arch/arm64/Kconfig | 22 ++++++++++++++++++++++ 1 file changed, 22 insertions(+) diff --git a/arch/arm64/Kconfig b/arch/arm64/Kconfig index 8a15bc68dadd..d65d226a77ec 100644 --- a/arch/arm64/Kconfig +++ b/arch/arm64/Kconfig @@ -1522,6 +1522,28 @@ endmenu menu "ARMv8.5 architectural features" +config ARM64_BTI + bool "Branch Target Identification support" + default y + help + Branch Target Identification (part of the ARMv8.5 Extensions) + provides a mechanism to limit the set of locations to which computed + branch instructions such as BR or BLR can jump. + + To make use of BTI on CPUs that support it, say Y. + + BTI is intended to provide complementary protection to other control + flow integrity protection mechanisms, such as the Pointer + authentication mechanism provided as part of the ARMv8.3 Extensions. + For this reason, it does not make sense to enable this option without + also enabling support for pointer authentication. Thus, when + enabling this option you should also select ARM64_PTR_AUTH=y. + + Userspace binaries must also be specifically compiled to make use of + this mechanism. If you say N here or the hardware does not support + BTI, such binaries can still run, but you get no additional + enforcement of branch destinations. + config ARM64_E0PD bool "Enable support for E0PD" default y -- 2.20.1