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* sort out the flush_icache_range mess v2
@ 2020-05-15 14:36 Christoph Hellwig
  2020-05-15 14:36 ` [PATCH 01/29] arm: fix the flush_icache_range arguments in set_fiq_handler Christoph Hellwig
                   ` (28 more replies)
  0 siblings, 29 replies; 38+ messages in thread
From: Christoph Hellwig @ 2020-05-15 14:36 UTC (permalink / raw)
  To: Andrew Morton, Arnd Bergmann, Roman Zippel
  Cc: Jessica Yu, Michal Simek, x86, linux-alpha, linux-kernel,
	linux-arm-kernel, linux-c6x-dev, linux-hexagon, linux-ia64,
	linux-m68k, linux-mips, openrisc, linuxppc-dev, linux-riscv,
	linux-sh, sparclinux, linux-arch, linux-mm, linux-um,
	linux-xtensa, linux-fsdevel

Hi all,

flush_icache_range is mostly used for kernel address, except for the following
cases:

 - the nommu brk and mmap implementations,
 - the read_code helper that is only used for binfmt_flat, binfmt_elf_fdpic,
   and binfmt_aout including the broken ia32 compat version
 - binfmt_flat itself,

none of which really are used by a typical MMU enabled kernel, as a.out can
only be build for alpha and m68k to start with.

But strangely enough commit ae92ef8a4424 ("PATCH] flush icache in correct
context") added a "set_fs(KERNEL_DS)" around the flush_icache_range call
in the module loader, because apparently m68k assumed user pointers.

This series first cleans up the cacheflush implementations, largely by
switching as much as possible to the asm-generic version after a few
preparations, then moves the misnamed current flush_icache_user_range to
a new name, to finally introduce a real flush_icache_user_range to be used
for the above use cases to flush the instruction cache for a userspace
address range.  The last patch then drops the set_fs in the module code
and moves it into the m68k implementation.

A git tree is available here:

    git://git.infradead.org/users/hch/misc.git flush_icache_range.2

Gitweb:

    http://git.infradead.org/users/hch/misc.git/shortlog/refs/heads/flush_icache_range.2

Changes since v1:
 - fix pmem.c compilation on some s390 configs
 - drop two patches picked up by the arch maintainers

^ permalink raw reply	[flat|nested] 38+ messages in thread

* [PATCH 01/29] arm: fix the flush_icache_range arguments in set_fiq_handler
  2020-05-15 14:36 sort out the flush_icache_range mess v2 Christoph Hellwig
@ 2020-05-15 14:36 ` Christoph Hellwig
  2020-05-15 14:36 ` [PATCH 02/29] nds32: unexport flush_icache_page Christoph Hellwig
                   ` (27 subsequent siblings)
  28 siblings, 0 replies; 38+ messages in thread
From: Christoph Hellwig @ 2020-05-15 14:36 UTC (permalink / raw)
  To: Andrew Morton, Arnd Bergmann, Roman Zippel
  Cc: Jessica Yu, Michal Simek, x86, linux-alpha, linux-kernel,
	linux-arm-kernel, linux-c6x-dev, linux-hexagon, linux-ia64,
	linux-m68k, linux-mips, openrisc, linuxppc-dev, linux-riscv,
	linux-sh, sparclinux, linux-arch, linux-mm, linux-um,
	linux-xtensa, linux-fsdevel

The arguments passed look bogus, try to fix them to something that seems
to make sense.

Signed-off-by: Christoph Hellwig <hch@lst.de>
---
 arch/arm/kernel/fiq.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/arch/arm/kernel/fiq.c b/arch/arm/kernel/fiq.c
index cd1234c103fcd..98ca3e3fa8471 100644
--- a/arch/arm/kernel/fiq.c
+++ b/arch/arm/kernel/fiq.c
@@ -98,8 +98,8 @@ void set_fiq_handler(void *start, unsigned int length)
 
 	memcpy(base + offset, start, length);
 	if (!cache_is_vipt_nonaliasing())
-		flush_icache_range((unsigned long)base + offset, offset +
-				   length);
+		flush_icache_range((unsigned long)base + offset,
+				   (unsigned long)base + offset + length);
 	flush_icache_range(0xffff0000 + offset, 0xffff0000 + offset + length);
 }
 
-- 
2.26.2


^ permalink raw reply	[flat|nested] 38+ messages in thread

* [PATCH 02/29] nds32: unexport flush_icache_page
  2020-05-15 14:36 sort out the flush_icache_range mess v2 Christoph Hellwig
  2020-05-15 14:36 ` [PATCH 01/29] arm: fix the flush_icache_range arguments in set_fiq_handler Christoph Hellwig
@ 2020-05-15 14:36 ` Christoph Hellwig
  2020-05-15 14:36 ` [PATCH 03/29] powerpc: unexport flush_icache_user_range Christoph Hellwig
                   ` (26 subsequent siblings)
  28 siblings, 0 replies; 38+ messages in thread
From: Christoph Hellwig @ 2020-05-15 14:36 UTC (permalink / raw)
  To: Andrew Morton, Arnd Bergmann, Roman Zippel
  Cc: Jessica Yu, Michal Simek, x86, linux-alpha, linux-kernel,
	linux-arm-kernel, linux-c6x-dev, linux-hexagon, linux-ia64,
	linux-m68k, linux-mips, openrisc, linuxppc-dev, linux-riscv,
	linux-sh, sparclinux, linux-arch, linux-mm, linux-um,
	linux-xtensa, linux-fsdevel

flush_icache_page is only used by mm/memory.c.

Signed-off-by: Christoph Hellwig <hch@lst.de>
---
 arch/nds32/mm/cacheflush.c | 1 -
 1 file changed, 1 deletion(-)

diff --git a/arch/nds32/mm/cacheflush.c b/arch/nds32/mm/cacheflush.c
index 254703653b6f5..8f168b33065fa 100644
--- a/arch/nds32/mm/cacheflush.c
+++ b/arch/nds32/mm/cacheflush.c
@@ -35,7 +35,6 @@ void flush_icache_page(struct vm_area_struct *vma, struct page *page)
 	kunmap_atomic((void *)kaddr);
 	local_irq_restore(flags);
 }
-EXPORT_SYMBOL(flush_icache_page);
 
 void flush_icache_user_range(struct vm_area_struct *vma, struct page *page,
 	                     unsigned long addr, int len)
-- 
2.26.2


^ permalink raw reply	[flat|nested] 38+ messages in thread

* [PATCH 03/29] powerpc: unexport flush_icache_user_range
  2020-05-15 14:36 sort out the flush_icache_range mess v2 Christoph Hellwig
  2020-05-15 14:36 ` [PATCH 01/29] arm: fix the flush_icache_range arguments in set_fiq_handler Christoph Hellwig
  2020-05-15 14:36 ` [PATCH 02/29] nds32: unexport flush_icache_page Christoph Hellwig
@ 2020-05-15 14:36 ` Christoph Hellwig
  2020-05-15 14:36 ` [PATCH 04/29] unicore32: remove flush_cache_user_range Christoph Hellwig
                   ` (25 subsequent siblings)
  28 siblings, 0 replies; 38+ messages in thread
From: Christoph Hellwig @ 2020-05-15 14:36 UTC (permalink / raw)
  To: Andrew Morton, Arnd Bergmann, Roman Zippel
  Cc: Jessica Yu, Michal Simek, x86, linux-alpha, linux-kernel,
	linux-arm-kernel, linux-c6x-dev, linux-hexagon, linux-ia64,
	linux-m68k, linux-mips, openrisc, linuxppc-dev, linux-riscv,
	linux-sh, sparclinux, linux-arch, linux-mm, linux-um,
	linux-xtensa, linux-fsdevel

flush_icache_user_range is only used by copy_to_user_page, which is
only used by core VM code.

Signed-off-by: Christoph Hellwig <hch@lst.de>
---
 arch/powerpc/mm/mem.c | 1 -
 1 file changed, 1 deletion(-)

diff --git a/arch/powerpc/mm/mem.c b/arch/powerpc/mm/mem.c
index 041ed7cfd341a..f0d1bf0a8e14f 100644
--- a/arch/powerpc/mm/mem.c
+++ b/arch/powerpc/mm/mem.c
@@ -587,7 +587,6 @@ void flush_icache_user_range(struct vm_area_struct *vma, struct page *page,
 	flush_icache_range(maddr, maddr + len);
 	kunmap(page);
 }
-EXPORT_SYMBOL(flush_icache_user_range);
 
 /*
  * System memory should not be in /proc/iomem but various tools expect it
-- 
2.26.2


^ permalink raw reply	[flat|nested] 38+ messages in thread

* [PATCH 04/29] unicore32: remove flush_cache_user_range
  2020-05-15 14:36 sort out the flush_icache_range mess v2 Christoph Hellwig
                   ` (2 preceding siblings ...)
  2020-05-15 14:36 ` [PATCH 03/29] powerpc: unexport flush_icache_user_range Christoph Hellwig
@ 2020-05-15 14:36 ` Christoph Hellwig
  2020-05-15 14:36 ` [PATCH 05/29] asm-generic: fix the inclusion guards for cacheflush.h Christoph Hellwig
                   ` (24 subsequent siblings)
  28 siblings, 0 replies; 38+ messages in thread
From: Christoph Hellwig @ 2020-05-15 14:36 UTC (permalink / raw)
  To: Andrew Morton, Arnd Bergmann, Roman Zippel
  Cc: Jessica Yu, Michal Simek, x86, linux-alpha, linux-kernel,
	linux-arm-kernel, linux-c6x-dev, linux-hexagon, linux-ia64,
	linux-m68k, linux-mips, openrisc, linuxppc-dev, linux-riscv,
	linux-sh, sparclinux, linux-arch, linux-mm, linux-um,
	linux-xtensa, linux-fsdevel

flush_cache_user_range is an ARMism not used by any generic or unicore32
specific code.

Signed-off-by: Christoph Hellwig <hch@lst.de>
---
 arch/unicore32/include/asm/cacheflush.h | 8 --------
 1 file changed, 8 deletions(-)

diff --git a/arch/unicore32/include/asm/cacheflush.h b/arch/unicore32/include/asm/cacheflush.h
index dc8c0b41538f8..9393ca4047e93 100644
--- a/arch/unicore32/include/asm/cacheflush.h
+++ b/arch/unicore32/include/asm/cacheflush.h
@@ -132,14 +132,6 @@ extern void flush_cache_page(struct vm_area_struct *vma,
 
 #define flush_cache_dup_mm(mm) flush_cache_mm(mm)
 
-/*
- * flush_cache_user_range is used when we want to ensure that the
- * Harvard caches are synchronised for the user space address range.
- * This is used for the UniCore private sys_cacheflush system call.
- */
-#define flush_cache_user_range(vma, start, end) \
-	__cpuc_coherent_user_range((start) & PAGE_MASK, PAGE_ALIGN(end))
-
 /*
  * Perform necessary cache operations to ensure that data previously
  * stored within this range of addresses can be executed by the CPU.
-- 
2.26.2


^ permalink raw reply	[flat|nested] 38+ messages in thread

* [PATCH 05/29] asm-generic: fix the inclusion guards for cacheflush.h
  2020-05-15 14:36 sort out the flush_icache_range mess v2 Christoph Hellwig
                   ` (3 preceding siblings ...)
  2020-05-15 14:36 ` [PATCH 04/29] unicore32: remove flush_cache_user_range Christoph Hellwig
@ 2020-05-15 14:36 ` Christoph Hellwig
  2020-05-15 14:36 ` [PATCH 06/29] asm-generic: don't include <linux/mm.h> in cacheflush.h Christoph Hellwig
                   ` (23 subsequent siblings)
  28 siblings, 0 replies; 38+ messages in thread
From: Christoph Hellwig @ 2020-05-15 14:36 UTC (permalink / raw)
  To: Andrew Morton, Arnd Bergmann, Roman Zippel
  Cc: Jessica Yu, Michal Simek, x86, linux-alpha, linux-kernel,
	linux-arm-kernel, linux-c6x-dev, linux-hexagon, linux-ia64,
	linux-m68k, linux-mips, openrisc, linuxppc-dev, linux-riscv,
	linux-sh, sparclinux, linux-arch, linux-mm, linux-um,
	linux-xtensa, linux-fsdevel

cacheflush.h uses a somewhat to generic include guard name that clashes
with various arch files.  Use a more specific one.

Signed-off-by: Christoph Hellwig <hch@lst.de>
---
 include/asm-generic/cacheflush.h | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/include/asm-generic/cacheflush.h b/include/asm-generic/cacheflush.h
index cac7404b2bdd2..906277492ec59 100644
--- a/include/asm-generic/cacheflush.h
+++ b/include/asm-generic/cacheflush.h
@@ -1,6 +1,6 @@
 /* SPDX-License-Identifier: GPL-2.0 */
-#ifndef __ASM_CACHEFLUSH_H
-#define __ASM_CACHEFLUSH_H
+#ifndef _ASM_GENERIC_CACHEFLUSH_H
+#define _ASM_GENERIC_CACHEFLUSH_H
 
 /* Keep includes the same across arches.  */
 #include <linux/mm.h>
@@ -109,4 +109,4 @@ static inline void flush_cache_vunmap(unsigned long start, unsigned long end)
 	memcpy(dst, src, len)
 #endif
 
-#endif /* __ASM_CACHEFLUSH_H */
+#endif /* _ASM_GENERIC_CACHEFLUSH_H */
-- 
2.26.2


^ permalink raw reply	[flat|nested] 38+ messages in thread

* [PATCH 06/29] asm-generic: don't include <linux/mm.h> in cacheflush.h
  2020-05-15 14:36 sort out the flush_icache_range mess v2 Christoph Hellwig
                   ` (4 preceding siblings ...)
  2020-05-15 14:36 ` [PATCH 05/29] asm-generic: fix the inclusion guards for cacheflush.h Christoph Hellwig
@ 2020-05-15 14:36 ` Christoph Hellwig
  2020-05-27  4:34   ` [PATCH] media: omap3isp: Shuffle cacheflush.h and include mm.h Nathan Chancellor
  2020-05-15 14:36 ` [PATCH 07/29] asm-generic: improve the flush_dcache_page stub Christoph Hellwig
                   ` (22 subsequent siblings)
  28 siblings, 1 reply; 38+ messages in thread
From: Christoph Hellwig @ 2020-05-15 14:36 UTC (permalink / raw)
  To: Andrew Morton, Arnd Bergmann, Roman Zippel
  Cc: Jessica Yu, Michal Simek, x86, linux-alpha, linux-kernel,
	linux-arm-kernel, linux-c6x-dev, linux-hexagon, linux-ia64,
	linux-m68k, linux-mips, openrisc, linuxppc-dev, linux-riscv,
	linux-sh, sparclinux, linux-arch, linux-mm, linux-um,
	linux-xtensa, linux-fsdevel

This seems to lead to some crazy include loops when using
asm-generic/cacheflush.h on more architectures, so leave it
to the arch header for now.

Signed-off-by: Christoph Hellwig <hch@lst.de>
---
 arch/um/include/asm/tlb.h         | 2 ++
 arch/x86/include/asm/cacheflush.h | 2 ++
 drivers/nvdimm/pmem.c             | 3 ++-
 include/asm-generic/cacheflush.h  | 3 ---
 4 files changed, 6 insertions(+), 4 deletions(-)

diff --git a/arch/um/include/asm/tlb.h b/arch/um/include/asm/tlb.h
index 70ee603839006..ff9c62828962c 100644
--- a/arch/um/include/asm/tlb.h
+++ b/arch/um/include/asm/tlb.h
@@ -2,6 +2,8 @@
 #ifndef __UM_TLB_H
 #define __UM_TLB_H
 
+#include <linux/mm.h>
+
 #include <asm/tlbflush.h>
 #include <asm-generic/cacheflush.h>
 #include <asm-generic/tlb.h>
diff --git a/arch/x86/include/asm/cacheflush.h b/arch/x86/include/asm/cacheflush.h
index 63feaf2a5f93d..b192d917a6d0b 100644
--- a/arch/x86/include/asm/cacheflush.h
+++ b/arch/x86/include/asm/cacheflush.h
@@ -2,6 +2,8 @@
 #ifndef _ASM_X86_CACHEFLUSH_H
 #define _ASM_X86_CACHEFLUSH_H
 
+#include <linux/mm.h>
+
 /* Caches aren't brain-dead on the intel. */
 #include <asm-generic/cacheflush.h>
 #include <asm/special_insns.h>
diff --git a/drivers/nvdimm/pmem.c b/drivers/nvdimm/pmem.c
index 2df6994acf836..55282a6217407 100644
--- a/drivers/nvdimm/pmem.c
+++ b/drivers/nvdimm/pmem.c
@@ -7,7 +7,6 @@
  * Copyright (c) 2015, Boaz Harrosh <boaz@plexistor.com>.
  */
 
-#include <asm/cacheflush.h>
 #include <linux/blkdev.h>
 #include <linux/hdreg.h>
 #include <linux/init.h>
@@ -25,6 +24,8 @@
 #include <linux/dax.h>
 #include <linux/nd.h>
 #include <linux/backing-dev.h>
+#include <linux/mm.h>
+#include <asm/cacheflush.h>
 #include "pmem.h"
 #include "pfn.h"
 #include "nd.h"
diff --git a/include/asm-generic/cacheflush.h b/include/asm-generic/cacheflush.h
index 906277492ec59..bf9bb83e9fc8d 100644
--- a/include/asm-generic/cacheflush.h
+++ b/include/asm-generic/cacheflush.h
@@ -2,9 +2,6 @@
 #ifndef _ASM_GENERIC_CACHEFLUSH_H
 #define _ASM_GENERIC_CACHEFLUSH_H
 
-/* Keep includes the same across arches.  */
-#include <linux/mm.h>
-
 #define ARCH_IMPLEMENTS_FLUSH_DCACHE_PAGE 0
 
 /*
-- 
2.26.2


^ permalink raw reply	[flat|nested] 38+ messages in thread

* [PATCH 07/29] asm-generic: improve the flush_dcache_page stub
  2020-05-15 14:36 sort out the flush_icache_range mess v2 Christoph Hellwig
                   ` (5 preceding siblings ...)
  2020-05-15 14:36 ` [PATCH 06/29] asm-generic: don't include <linux/mm.h> in cacheflush.h Christoph Hellwig
@ 2020-05-15 14:36 ` Christoph Hellwig
  2020-05-15 14:36 ` [PATCH 08/29] alpha: use asm-generic/cacheflush.h Christoph Hellwig
                   ` (21 subsequent siblings)
  28 siblings, 0 replies; 38+ messages in thread
From: Christoph Hellwig @ 2020-05-15 14:36 UTC (permalink / raw)
  To: Andrew Morton, Arnd Bergmann, Roman Zippel
  Cc: Jessica Yu, Michal Simek, x86, linux-alpha, linux-kernel,
	linux-arm-kernel, linux-c6x-dev, linux-hexagon, linux-ia64,
	linux-m68k, linux-mips, openrisc, linuxppc-dev, linux-riscv,
	linux-sh, sparclinux, linux-arch, linux-mm, linux-um,
	linux-xtensa, linux-fsdevel

There is a magic ARCH_IMPLEMENTS_FLUSH_DCACHE_PAGE cpp symbol that
guards non-stub availability of flush_dcache_pagge.  Use that to
check if flush_dcache_pagg is implemented.

Signed-off-by: Christoph Hellwig <hch@lst.de>
---
 include/asm-generic/cacheflush.h | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/include/asm-generic/cacheflush.h b/include/asm-generic/cacheflush.h
index bf9bb83e9fc8d..bbbb4d4ef6516 100644
--- a/include/asm-generic/cacheflush.h
+++ b/include/asm-generic/cacheflush.h
@@ -2,8 +2,6 @@
 #ifndef _ASM_GENERIC_CACHEFLUSH_H
 #define _ASM_GENERIC_CACHEFLUSH_H
 
-#define ARCH_IMPLEMENTS_FLUSH_DCACHE_PAGE 0
-
 /*
  * The cache doesn't need to be flushed when TLB entries change when
  * the cache is mapped to physical memory, not virtual memory
@@ -42,12 +40,14 @@ static inline void flush_cache_page(struct vm_area_struct *vma,
 }
 #endif
 
-#ifndef flush_dcache_page
+#ifndef ARCH_IMPLEMENTS_FLUSH_DCACHE_PAGE
 static inline void flush_dcache_page(struct page *page)
 {
 }
+#define ARCH_IMPLEMENTS_FLUSH_DCACHE_PAGE 0
 #endif
 
+
 #ifndef flush_dcache_mmap_lock
 static inline void flush_dcache_mmap_lock(struct address_space *mapping)
 {
-- 
2.26.2


^ permalink raw reply	[flat|nested] 38+ messages in thread

* [PATCH 08/29] alpha: use asm-generic/cacheflush.h
  2020-05-15 14:36 sort out the flush_icache_range mess v2 Christoph Hellwig
                   ` (6 preceding siblings ...)
  2020-05-15 14:36 ` [PATCH 07/29] asm-generic: improve the flush_dcache_page stub Christoph Hellwig
@ 2020-05-15 14:36 ` Christoph Hellwig
  2020-05-15 14:36 ` [PATCH 09/29] arm64: " Christoph Hellwig
                   ` (20 subsequent siblings)
  28 siblings, 0 replies; 38+ messages in thread
From: Christoph Hellwig @ 2020-05-15 14:36 UTC (permalink / raw)
  To: Andrew Morton, Arnd Bergmann, Roman Zippel
  Cc: Jessica Yu, Michal Simek, x86, linux-alpha, linux-kernel,
	linux-arm-kernel, linux-c6x-dev, linux-hexagon, linux-ia64,
	linux-m68k, linux-mips, openrisc, linuxppc-dev, linux-riscv,
	linux-sh, sparclinux, linux-arch, linux-mm, linux-um,
	linux-xtensa, linux-fsdevel

Alpha needs almost no cache flushing routines of its own.  Rely on
asm-generic/cacheflush.h for the defaults.

Signed-off-by: Christoph Hellwig <hch@lst.de>
---
 arch/alpha/include/asm/cacheflush.h | 28 ++++++----------------------
 1 file changed, 6 insertions(+), 22 deletions(-)

diff --git a/arch/alpha/include/asm/cacheflush.h b/arch/alpha/include/asm/cacheflush.h
index 89128489cb598..636d7ca0d05f6 100644
--- a/arch/alpha/include/asm/cacheflush.h
+++ b/arch/alpha/include/asm/cacheflush.h
@@ -4,19 +4,6 @@
 
 #include <linux/mm.h>
 
-/* Caches aren't brain-dead on the Alpha. */
-#define flush_cache_all()			do { } while (0)
-#define flush_cache_mm(mm)			do { } while (0)
-#define flush_cache_dup_mm(mm)			do { } while (0)
-#define flush_cache_range(vma, start, end)	do { } while (0)
-#define flush_cache_page(vma, vmaddr, pfn)	do { } while (0)
-#define ARCH_IMPLEMENTS_FLUSH_DCACHE_PAGE 0
-#define flush_dcache_page(page)			do { } while (0)
-#define flush_dcache_mmap_lock(mapping)		do { } while (0)
-#define flush_dcache_mmap_unlock(mapping)	do { } while (0)
-#define flush_cache_vmap(start, end)		do { } while (0)
-#define flush_cache_vunmap(start, end)		do { } while (0)
-
 /* Note that the following two definitions are _highly_ dependent
    on the contexts in which they are used in the kernel.  I personally
    think it is criminal how loosely defined these macros are.  */
@@ -59,20 +46,17 @@ flush_icache_user_range(struct vm_area_struct *vma, struct page *page,
 			mm->context[smp_processor_id()] = 0;
 	}
 }
-#else
+#define flush_icache_user_range flush_icache_user_range
+#else /* CONFIG_SMP */
 extern void flush_icache_user_range(struct vm_area_struct *vma,
 		struct page *page, unsigned long addr, int len);
-#endif
+#define flush_icache_user_range flush_icache_user_range
+#endif /* CONFIG_SMP */
 
 /* This is used only in __do_fault and do_swap_page.  */
 #define flush_icache_page(vma, page) \
-  flush_icache_user_range((vma), (page), 0, 0)
+	flush_icache_user_range((vma), (page), 0, 0)
 
-#define copy_to_user_page(vma, page, vaddr, dst, src, len) \
-do { memcpy(dst, src, len); \
-     flush_icache_user_range(vma, page, vaddr, len); \
-} while (0)
-#define copy_from_user_page(vma, page, vaddr, dst, src, len) \
-	memcpy(dst, src, len)
+#include <asm-generic/cacheflush.h>
 
 #endif /* _ALPHA_CACHEFLUSH_H */
-- 
2.26.2


^ permalink raw reply	[flat|nested] 38+ messages in thread

* [PATCH 09/29] arm64: use asm-generic/cacheflush.h
  2020-05-15 14:36 sort out the flush_icache_range mess v2 Christoph Hellwig
                   ` (7 preceding siblings ...)
  2020-05-15 14:36 ` [PATCH 08/29] alpha: use asm-generic/cacheflush.h Christoph Hellwig
@ 2020-05-15 14:36 ` Christoph Hellwig
  2020-05-22 15:54   ` Catalin Marinas
  2020-05-15 14:36 ` [PATCH 10/29] c6x: " Christoph Hellwig
                   ` (19 subsequent siblings)
  28 siblings, 1 reply; 38+ messages in thread
From: Christoph Hellwig @ 2020-05-15 14:36 UTC (permalink / raw)
  To: Andrew Morton, Arnd Bergmann, Roman Zippel
  Cc: Jessica Yu, Michal Simek, x86, linux-alpha, linux-kernel,
	linux-arm-kernel, linux-c6x-dev, linux-hexagon, linux-ia64,
	linux-m68k, linux-mips, openrisc, linuxppc-dev, linux-riscv,
	linux-sh, sparclinux, linux-arch, linux-mm, linux-um,
	linux-xtensa, linux-fsdevel

ARM64 needs almost no cache flushing routines of its own.  Rely on
asm-generic/cacheflush.h for the defaults.

Signed-off-by: Christoph Hellwig <hch@lst.de>
---
 arch/arm64/include/asm/cacheflush.h | 46 ++++-------------------------
 1 file changed, 5 insertions(+), 41 deletions(-)

diff --git a/arch/arm64/include/asm/cacheflush.h b/arch/arm64/include/asm/cacheflush.h
index e6cca3d4acf70..03a5a187163ab 100644
--- a/arch/arm64/include/asm/cacheflush.h
+++ b/arch/arm64/include/asm/cacheflush.h
@@ -94,20 +94,7 @@ static inline void flush_icache_range(unsigned long start, unsigned long end)
 #endif
 	kick_all_cpus_sync();
 }
-
-static inline void flush_cache_mm(struct mm_struct *mm)
-{
-}
-
-static inline void flush_cache_page(struct vm_area_struct *vma,
-				    unsigned long user_addr, unsigned long pfn)
-{
-}
-
-static inline void flush_cache_range(struct vm_area_struct *vma,
-				     unsigned long start, unsigned long end)
-{
-}
+#define flush_icache_range flush_icache_range
 
 /*
  * Cache maintenance functions used by the DMA API. No to be used directly.
@@ -123,12 +110,7 @@ extern void __dma_flush_area(const void *, size_t);
  */
 extern void copy_to_user_page(struct vm_area_struct *, struct page *,
 	unsigned long, void *, const void *, unsigned long);
-#define copy_from_user_page(vma, page, vaddr, dst, src, len) \
-	do {							\
-		memcpy(dst, src, len);				\
-	} while (0)
-
-#define flush_cache_dup_mm(mm) flush_cache_mm(mm)
+#define copy_to_user_page copy_to_user_page
 
 /*
  * flush_dcache_page is used when the kernel has written to the page
@@ -154,29 +136,11 @@ static __always_inline void __flush_icache_all(void)
 	dsb(ish);
 }
 
-#define flush_dcache_mmap_lock(mapping)		do { } while (0)
-#define flush_dcache_mmap_unlock(mapping)	do { } while (0)
-
-/*
- * We don't appear to need to do anything here.  In fact, if we did, we'd
- * duplicate cache flushing elsewhere performed by flush_dcache_page().
- */
-#define flush_icache_page(vma,page)	do { } while (0)
-
-/*
- * Not required on AArch64 (PIPT or VIPT non-aliasing D-cache).
- */
-static inline void flush_cache_vmap(unsigned long start, unsigned long end)
-{
-}
-
-static inline void flush_cache_vunmap(unsigned long start, unsigned long end)
-{
-}
-
 int set_memory_valid(unsigned long addr, int numpages, int enable);
 
 int set_direct_map_invalid_noflush(struct page *page);
 int set_direct_map_default_noflush(struct page *page);
 
-#endif
+#include <asm-generic/cacheflush.h>
+
+#endif /* __ASM_CACHEFLUSH_H */
-- 
2.26.2


^ permalink raw reply	[flat|nested] 38+ messages in thread

* [PATCH 10/29] c6x: use asm-generic/cacheflush.h
  2020-05-15 14:36 sort out the flush_icache_range mess v2 Christoph Hellwig
                   ` (8 preceding siblings ...)
  2020-05-15 14:36 ` [PATCH 09/29] arm64: " Christoph Hellwig
@ 2020-05-15 14:36 ` Christoph Hellwig
  2020-05-18 18:20   ` Mark Salter
  2020-05-15 14:36 ` [PATCH 11/29] hexagon: " Christoph Hellwig
                   ` (18 subsequent siblings)
  28 siblings, 1 reply; 38+ messages in thread
From: Christoph Hellwig @ 2020-05-15 14:36 UTC (permalink / raw)
  To: Andrew Morton, Arnd Bergmann, Roman Zippel
  Cc: Jessica Yu, Michal Simek, x86, linux-alpha, linux-kernel,
	linux-arm-kernel, linux-c6x-dev, linux-hexagon, linux-ia64,
	linux-m68k, linux-mips, openrisc, linuxppc-dev, linux-riscv,
	linux-sh, sparclinux, linux-arch, linux-mm, linux-um,
	linux-xtensa, linux-fsdevel

C6x needs almost no cache flushing routines of its own.  Rely on
asm-generic/cacheflush.h for the defaults.

Signed-off-by: Christoph Hellwig <hch@lst.de>
---
 arch/c6x/include/asm/cacheflush.h | 19 +------------------
 1 file changed, 1 insertion(+), 18 deletions(-)

diff --git a/arch/c6x/include/asm/cacheflush.h b/arch/c6x/include/asm/cacheflush.h
index 4540b40475e6c..10922d528de6d 100644
--- a/arch/c6x/include/asm/cacheflush.h
+++ b/arch/c6x/include/asm/cacheflush.h
@@ -16,21 +16,6 @@
 #include <asm/page.h>
 #include <asm/string.h>
 
-/*
- * virtually-indexed cache management (our cache is physically indexed)
- */
-#define flush_cache_all()			do {} while (0)
-#define flush_cache_mm(mm)			do {} while (0)
-#define flush_cache_dup_mm(mm)			do {} while (0)
-#define flush_cache_range(mm, start, end)	do {} while (0)
-#define flush_cache_page(vma, vmaddr, pfn)	do {} while (0)
-#define flush_cache_vmap(start, end)		do {} while (0)
-#define flush_cache_vunmap(start, end)		do {} while (0)
-#define ARCH_IMPLEMENTS_FLUSH_DCACHE_PAGE 0
-#define flush_dcache_page(page)			do {} while (0)
-#define flush_dcache_mmap_lock(mapping)		do {} while (0)
-#define flush_dcache_mmap_unlock(mapping)	do {} while (0)
-
 /*
  * physically-indexed cache management
  */
@@ -49,14 +34,12 @@ do {								  \
 			(unsigned long) page_address(page) + PAGE_SIZE)); \
 } while (0)
 
-
 #define copy_to_user_page(vma, page, vaddr, dst, src, len) \
 do {						     \
 	memcpy(dst, src, len);			     \
 	flush_icache_range((unsigned) (dst), (unsigned) (dst) + (len)); \
 } while (0)
 
-#define copy_from_user_page(vma, page, vaddr, dst, src, len) \
-	memcpy(dst, src, len)
+#include <asm-generic/cacheflush.h>
 
 #endif /* _ASM_C6X_CACHEFLUSH_H */
-- 
2.26.2


^ permalink raw reply	[flat|nested] 38+ messages in thread

* [PATCH 11/29] hexagon: use asm-generic/cacheflush.h
  2020-05-15 14:36 sort out the flush_icache_range mess v2 Christoph Hellwig
                   ` (9 preceding siblings ...)
  2020-05-15 14:36 ` [PATCH 10/29] c6x: " Christoph Hellwig
@ 2020-05-15 14:36 ` Christoph Hellwig
  2020-05-15 14:36 ` [PATCH 12/29] ia64: " Christoph Hellwig
                   ` (17 subsequent siblings)
  28 siblings, 0 replies; 38+ messages in thread
From: Christoph Hellwig @ 2020-05-15 14:36 UTC (permalink / raw)
  To: Andrew Morton, Arnd Bergmann, Roman Zippel
  Cc: Jessica Yu, Michal Simek, x86, linux-alpha, linux-kernel,
	linux-arm-kernel, linux-c6x-dev, linux-hexagon, linux-ia64,
	linux-m68k, linux-mips, openrisc, linuxppc-dev, linux-riscv,
	linux-sh, sparclinux, linux-arch, linux-mm, linux-um,
	linux-xtensa, linux-fsdevel

Hexagon needs almost no cache flushing routines of its own.  Rely on
asm-generic/cacheflush.h for the defaults.

Signed-off-by: Christoph Hellwig <hch@lst.de>
---
 arch/hexagon/include/asm/cacheflush.h | 19 +++++--------------
 1 file changed, 5 insertions(+), 14 deletions(-)

diff --git a/arch/hexagon/include/asm/cacheflush.h b/arch/hexagon/include/asm/cacheflush.h
index fb447de45d54c..6eff0730e6efd 100644
--- a/arch/hexagon/include/asm/cacheflush.h
+++ b/arch/hexagon/include/asm/cacheflush.h
@@ -25,29 +25,17 @@
 #define LINESIZE	32
 #define LINEBITS	5
 
-#define flush_cache_all()			do { } while (0)
-#define flush_cache_mm(mm)			do { } while (0)
-#define flush_cache_dup_mm(mm)			do { } while (0)
-#define flush_cache_range(vma, start, end)	do { } while (0)
-#define flush_cache_page(vma, vmaddr, pfn)	do { } while (0)
-#define ARCH_IMPLEMENTS_FLUSH_DCACHE_PAGE 0
-#define flush_dcache_page(page)			do { } while (0)
-#define flush_dcache_mmap_lock(mapping)		do { } while (0)
-#define flush_dcache_mmap_unlock(mapping)	do { } while (0)
-#define flush_icache_page(vma, pg)		do { } while (0)
-#define flush_icache_user_range(vma, pg, adr, len)	do { } while (0)
-#define flush_cache_vmap(start, end)		do { } while (0)
-#define flush_cache_vunmap(start, end)		do { } while (0)
-
 /*
  * Flush Dcache range through current map.
  */
 extern void flush_dcache_range(unsigned long start, unsigned long end);
+#define flush_dcache_range flush_dcache_range
 
 /*
  * Flush Icache range through current map.
  */
 extern void flush_icache_range(unsigned long start, unsigned long end);
+#define flush_icache_range flush_icache_range
 
 /*
  * Memory-management related flushes are there to ensure in non-physically
@@ -78,6 +66,7 @@ static inline void update_mmu_cache(struct vm_area_struct *vma,
 
 void copy_to_user_page(struct vm_area_struct *vma, struct page *page,
 		       unsigned long vaddr, void *dst, void *src, int len);
+#define copy_to_user_page copy_to_user_page
 
 #define copy_from_user_page(vma, page, vaddr, dst, src, len) \
 	memcpy(dst, src, len)
@@ -85,4 +74,6 @@ void copy_to_user_page(struct vm_area_struct *vma, struct page *page,
 extern void hexagon_inv_dcache_range(unsigned long start, unsigned long end);
 extern void hexagon_clean_dcache_range(unsigned long start, unsigned long end);
 
+#include <asm-generic/cacheflush.h>
+
 #endif
-- 
2.26.2


^ permalink raw reply	[flat|nested] 38+ messages in thread

* [PATCH 12/29] ia64: use asm-generic/cacheflush.h
  2020-05-15 14:36 sort out the flush_icache_range mess v2 Christoph Hellwig
                   ` (10 preceding siblings ...)
  2020-05-15 14:36 ` [PATCH 11/29] hexagon: " Christoph Hellwig
@ 2020-05-15 14:36 ` Christoph Hellwig
  2020-05-15 14:36 ` [PATCH 13/29] microblaze: " Christoph Hellwig
                   ` (16 subsequent siblings)
  28 siblings, 0 replies; 38+ messages in thread
From: Christoph Hellwig @ 2020-05-15 14:36 UTC (permalink / raw)
  To: Andrew Morton, Arnd Bergmann, Roman Zippel
  Cc: Jessica Yu, Michal Simek, x86, linux-alpha, linux-kernel,
	linux-arm-kernel, linux-c6x-dev, linux-hexagon, linux-ia64,
	linux-m68k, linux-mips, openrisc, linuxppc-dev, linux-riscv,
	linux-sh, sparclinux, linux-arch, linux-mm, linux-um,
	linux-xtensa, linux-fsdevel

IA64 needs almost no cache flushing routines of its own.  Rely on
asm-generic/cacheflush.h for the defaults.

Signed-off-by: Christoph Hellwig <hch@lst.de>
---
 arch/ia64/include/asm/cacheflush.h | 28 +++-------------------------
 1 file changed, 3 insertions(+), 25 deletions(-)

diff --git a/arch/ia64/include/asm/cacheflush.h b/arch/ia64/include/asm/cacheflush.h
index 6d3478f8abc89..a8f1c86ac242a 100644
--- a/arch/ia64/include/asm/cacheflush.h
+++ b/arch/ia64/include/asm/cacheflush.h
@@ -12,44 +12,22 @@
 
 #include <asm/page.h>
 
-/*
- * Cache flushing routines.  This is the kind of stuff that can be very expensive, so try
- * to avoid them whenever possible.
- */
-
-#define flush_cache_all()			do { } while (0)
-#define flush_cache_mm(mm)			do { } while (0)
-#define flush_cache_dup_mm(mm)			do { } while (0)
-#define flush_cache_range(vma, start, end)	do { } while (0)
-#define flush_cache_page(vma, vmaddr, pfn)	do { } while (0)
-#define flush_icache_page(vma,page)		do { } while (0)
-#define flush_cache_vmap(start, end)		do { } while (0)
-#define flush_cache_vunmap(start, end)		do { } while (0)
-
 #define ARCH_IMPLEMENTS_FLUSH_DCACHE_PAGE 1
 #define flush_dcache_page(page)			\
 do {						\
 	clear_bit(PG_arch_1, &(page)->flags);	\
 } while (0)
 
-#define flush_dcache_mmap_lock(mapping)		do { } while (0)
-#define flush_dcache_mmap_unlock(mapping)	do { } while (0)
-
-extern void flush_icache_range (unsigned long start, unsigned long end);
+extern void flush_icache_range(unsigned long start, unsigned long end);
+#define flush_icache_range flush_icache_range
 extern void clflush_cache_range(void *addr, int size);
 
-
 #define flush_icache_user_range(vma, page, user_addr, len)					\
 do {												\
 	unsigned long _addr = (unsigned long) page_address(page) + ((user_addr) & ~PAGE_MASK);	\
 	flush_icache_range(_addr, _addr + (len));						\
 } while (0)
 
-#define copy_to_user_page(vma, page, vaddr, dst, src, len) \
-do { memcpy(dst, src, len); \
-     flush_icache_user_range(vma, page, vaddr, len); \
-} while (0)
-#define copy_from_user_page(vma, page, vaddr, dst, src, len) \
-	memcpy(dst, src, len)
+#include <asm-generic/cacheflush.h>
 
 #endif /* _ASM_IA64_CACHEFLUSH_H */
-- 
2.26.2


^ permalink raw reply	[flat|nested] 38+ messages in thread

* [PATCH 13/29] microblaze: use asm-generic/cacheflush.h
  2020-05-15 14:36 sort out the flush_icache_range mess v2 Christoph Hellwig
                   ` (11 preceding siblings ...)
  2020-05-15 14:36 ` [PATCH 12/29] ia64: " Christoph Hellwig
@ 2020-05-15 14:36 ` Christoph Hellwig
  2020-05-15 14:36 ` [PATCH 14/29] m68knommu: " Christoph Hellwig
                   ` (15 subsequent siblings)
  28 siblings, 0 replies; 38+ messages in thread
From: Christoph Hellwig @ 2020-05-15 14:36 UTC (permalink / raw)
  To: Andrew Morton, Arnd Bergmann, Roman Zippel
  Cc: Jessica Yu, Michal Simek, x86, linux-alpha, linux-kernel,
	linux-arm-kernel, linux-c6x-dev, linux-hexagon, linux-ia64,
	linux-m68k, linux-mips, openrisc, linuxppc-dev, linux-riscv,
	linux-sh, sparclinux, linux-arch, linux-mm, linux-um,
	linux-xtensa, linux-fsdevel

Microblaze needs almost no cache flushing routines of its own.  Rely on
asm-generic/cacheflush.h for the defaults.

Signed-off-by: Christoph Hellwig <hch@lst.de>
---
 arch/microblaze/include/asm/cacheflush.h | 29 ++----------------------
 1 file changed, 2 insertions(+), 27 deletions(-)

diff --git a/arch/microblaze/include/asm/cacheflush.h b/arch/microblaze/include/asm/cacheflush.h
index 11f56c85056bb..39f8fb6768d8b 100644
--- a/arch/microblaze/include/asm/cacheflush.h
+++ b/arch/microblaze/include/asm/cacheflush.h
@@ -57,9 +57,6 @@ void microblaze_cache_init(void);
 #define invalidate_icache()				mbc->iin();
 #define invalidate_icache_range(start, end)		mbc->iinr(start, end);
 
-#define flush_icache_user_range(vma, pg, adr, len)	flush_icache();
-#define flush_icache_page(vma, pg)			do { } while (0)
-
 #define enable_dcache()					mbc->de();
 #define disable_dcache()				mbc->dd();
 /* FIXME for LL-temac driver */
@@ -77,27 +74,9 @@ do { \
 	flush_dcache_range((unsigned) (addr), (unsigned) (addr) + PAGE_SIZE); \
 } while (0);
 
-#define flush_dcache_mmap_lock(mapping)		do { } while (0)
-#define flush_dcache_mmap_unlock(mapping)	do { } while (0)
-
-#define flush_cache_dup_mm(mm)				do { } while (0)
-#define flush_cache_vmap(start, end)			do { } while (0)
-#define flush_cache_vunmap(start, end)			do { } while (0)
-#define flush_cache_mm(mm)			do { } while (0)
-
 #define flush_cache_page(vma, vmaddr, pfn) \
 	flush_dcache_range(pfn << PAGE_SHIFT, (pfn << PAGE_SHIFT) + PAGE_SIZE);
 
-/* MS: kgdb code use this macro, wrong len with FLASH */
-#if 0
-#define flush_cache_range(vma, start, len)	{	\
-	flush_icache_range((unsigned) (start), (unsigned) (start) + (len)); \
-	flush_dcache_range((unsigned) (start), (unsigned) (start) + (len)); \
-}
-#endif
-
-#define flush_cache_range(vma, start, len) do { } while (0)
-
 static inline void copy_to_user_page(struct vm_area_struct *vma,
 				     struct page *page, unsigned long vaddr,
 				     void *dst, void *src, int len)
@@ -109,12 +88,8 @@ static inline void copy_to_user_page(struct vm_area_struct *vma,
 		flush_dcache_range(addr, addr + PAGE_SIZE);
 	}
 }
+#define copy_to_user_page copy_to_user_page
 
-static inline void copy_from_user_page(struct vm_area_struct *vma,
-				       struct page *page, unsigned long vaddr,
-				       void *dst, void *src, int len)
-{
-	memcpy(dst, src, len);
-}
+#include <asm-generic/cacheflush.h>
 
 #endif /* _ASM_MICROBLAZE_CACHEFLUSH_H */
-- 
2.26.2


^ permalink raw reply	[flat|nested] 38+ messages in thread

* [PATCH 14/29] m68knommu: use asm-generic/cacheflush.h
  2020-05-15 14:36 sort out the flush_icache_range mess v2 Christoph Hellwig
                   ` (12 preceding siblings ...)
  2020-05-15 14:36 ` [PATCH 13/29] microblaze: " Christoph Hellwig
@ 2020-05-15 14:36 ` Christoph Hellwig
  2020-05-15 14:36 ` [PATCH 15/29] openrisc: " Christoph Hellwig
                   ` (14 subsequent siblings)
  28 siblings, 0 replies; 38+ messages in thread
From: Christoph Hellwig @ 2020-05-15 14:36 UTC (permalink / raw)
  To: Andrew Morton, Arnd Bergmann, Roman Zippel
  Cc: Jessica Yu, Michal Simek, x86, linux-alpha, linux-kernel,
	linux-arm-kernel, linux-c6x-dev, linux-hexagon, linux-ia64,
	linux-m68k, linux-mips, openrisc, linuxppc-dev, linux-riscv,
	linux-sh, sparclinux, linux-arch, linux-mm, linux-um,
	linux-xtensa, linux-fsdevel, Greg Ungerer

m68knommu needs almost no cache flushing routines of its own.  Rely on
asm-generic/cacheflush.h for the defaults.

Signed-off-by: Christoph Hellwig <hch@lst.de>
Acked-by: Greg Ungerer <gerg@linux-m68k.org>
---
 arch/m68k/include/asm/cacheflush_no.h | 19 ++-----------------
 1 file changed, 2 insertions(+), 17 deletions(-)

diff --git a/arch/m68k/include/asm/cacheflush_no.h b/arch/m68k/include/asm/cacheflush_no.h
index 11e9a9dcbfb24..2731f07e7be8c 100644
--- a/arch/m68k/include/asm/cacheflush_no.h
+++ b/arch/m68k/include/asm/cacheflush_no.h
@@ -9,25 +9,8 @@
 #include <asm/mcfsim.h>
 
 #define flush_cache_all()			__flush_cache_all()
-#define flush_cache_mm(mm)			do { } while (0)
-#define flush_cache_dup_mm(mm)			do { } while (0)
-#define flush_cache_range(vma, start, end)	do { } while (0)
-#define flush_cache_page(vma, vmaddr)		do { } while (0)
 #define flush_dcache_range(start, len)		__flush_dcache_all()
-#define ARCH_IMPLEMENTS_FLUSH_DCACHE_PAGE 0
-#define flush_dcache_page(page)			do { } while (0)
-#define flush_dcache_mmap_lock(mapping)		do { } while (0)
-#define flush_dcache_mmap_unlock(mapping)	do { } while (0)
 #define flush_icache_range(start, len)		__flush_icache_all()
-#define flush_icache_page(vma,pg)		do { } while (0)
-#define flush_icache_user_range(vma,pg,adr,len)	do { } while (0)
-#define flush_cache_vmap(start, end)		do { } while (0)
-#define flush_cache_vunmap(start, end)		do { } while (0)
-
-#define copy_to_user_page(vma, page, vaddr, dst, src, len) \
-	memcpy(dst, src, len)
-#define copy_from_user_page(vma, page, vaddr, dst, src, len) \
-	memcpy(dst, src, len)
 
 void mcf_cache_push(void);
 
@@ -98,4 +81,6 @@ static inline void cache_clear(unsigned long paddr, int len)
 	__clear_cache_all();
 }
 
+#include <asm-generic/cacheflush.h>
+
 #endif /* _M68KNOMMU_CACHEFLUSH_H */
-- 
2.26.2


^ permalink raw reply	[flat|nested] 38+ messages in thread

* [PATCH 15/29] openrisc: use asm-generic/cacheflush.h
  2020-05-15 14:36 sort out the flush_icache_range mess v2 Christoph Hellwig
                   ` (13 preceding siblings ...)
  2020-05-15 14:36 ` [PATCH 14/29] m68knommu: " Christoph Hellwig
@ 2020-05-15 14:36 ` Christoph Hellwig
  2020-05-15 14:36 ` [PATCH 16/29] powerpc: " Christoph Hellwig
                   ` (13 subsequent siblings)
  28 siblings, 0 replies; 38+ messages in thread
From: Christoph Hellwig @ 2020-05-15 14:36 UTC (permalink / raw)
  To: Andrew Morton, Arnd Bergmann, Roman Zippel
  Cc: Jessica Yu, Michal Simek, x86, linux-alpha, linux-kernel,
	linux-arm-kernel, linux-c6x-dev, linux-hexagon, linux-ia64,
	linux-m68k, linux-mips, openrisc, linuxppc-dev, linux-riscv,
	linux-sh, sparclinux, linux-arch, linux-mm, linux-um,
	linux-xtensa, linux-fsdevel

OpenRISC needs almost no cache flushing routines of its own.  Rely on
asm-generic/cacheflush.h for the defaults.

Signed-off-by: Christoph Hellwig <hch@lst.de>
---
 arch/openrisc/include/asm/cacheflush.h | 31 +++++---------------------
 1 file changed, 6 insertions(+), 25 deletions(-)

diff --git a/arch/openrisc/include/asm/cacheflush.h b/arch/openrisc/include/asm/cacheflush.h
index 79d5d7753fe4b..74d1fce4e8839 100644
--- a/arch/openrisc/include/asm/cacheflush.h
+++ b/arch/openrisc/include/asm/cacheflush.h
@@ -62,31 +62,12 @@ static inline void flush_dcache_page(struct page *page)
 	clear_bit(PG_dc_clean, &page->flags);
 }
 
-/*
- * Other interfaces are not required since we do not have virtually
- * indexed or tagged caches. So we can use the default here.
- */
-#define flush_cache_all()				do { } while (0)
-#define flush_cache_mm(mm)				do { } while (0)
-#define flush_cache_dup_mm(mm)				do { } while (0)
-#define flush_cache_range(vma, start, end)		do { } while (0)
-#define flush_cache_page(vma, vmaddr, pfn)		do { } while (0)
-#define flush_dcache_mmap_lock(mapping)			do { } while (0)
-#define flush_dcache_mmap_unlock(mapping)		do { } while (0)
-#define flush_icache_range(start, end)			do { } while (0)
-#define flush_icache_page(vma, pg)			do { } while (0)
-#define flush_icache_user_range(vma, pg, adr, len)	do { } while (0)
-#define flush_cache_vmap(start, end)			do { } while (0)
-#define flush_cache_vunmap(start, end)			do { } while (0)
-
-#define copy_to_user_page(vma, page, vaddr, dst, src, len)           \
-	do {                                                         \
-		memcpy(dst, src, len);                               \
-		if (vma->vm_flags & VM_EXEC)                         \
-			sync_icache_dcache(page);                    \
-	} while (0)
+#define flush_icache_user_range(vma, page, addr, len)	\
+do {							\
+	if (vma->vm_flags & VM_EXEC)			\
+		sync_icache_dcache(page);		\
+} while (0)
 
-#define copy_from_user_page(vma, page, vaddr, dst, src, len)         \
-	memcpy(dst, src, len)
+#include <asm-generic/cacheflush.h>
 
 #endif /* __ASM_CACHEFLUSH_H */
-- 
2.26.2


^ permalink raw reply	[flat|nested] 38+ messages in thread

* [PATCH 16/29] powerpc: use asm-generic/cacheflush.h
  2020-05-15 14:36 sort out the flush_icache_range mess v2 Christoph Hellwig
                   ` (14 preceding siblings ...)
  2020-05-15 14:36 ` [PATCH 15/29] openrisc: " Christoph Hellwig
@ 2020-05-15 14:36 ` Christoph Hellwig
  2020-05-15 14:36 ` [PATCH 17/29] riscv: " Christoph Hellwig
                   ` (12 subsequent siblings)
  28 siblings, 0 replies; 38+ messages in thread
From: Christoph Hellwig @ 2020-05-15 14:36 UTC (permalink / raw)
  To: Andrew Morton, Arnd Bergmann, Roman Zippel
  Cc: Jessica Yu, Michal Simek, x86, linux-alpha, linux-kernel,
	linux-arm-kernel, linux-c6x-dev, linux-hexagon, linux-ia64,
	linux-m68k, linux-mips, openrisc, linuxppc-dev, linux-riscv,
	linux-sh, sparclinux, linux-arch, linux-mm, linux-um,
	linux-xtensa, linux-fsdevel

Power needs almost no cache flushing routines of its own.  Rely on
asm-generic/cacheflush.h for the defaults.

Also remove the pointless __KERNEL__ ifdef while we're at it.

Signed-off-by: Christoph Hellwig <hch@lst.de>
---
 arch/powerpc/include/asm/cacheflush.h | 42 +++++++--------------------
 1 file changed, 10 insertions(+), 32 deletions(-)

diff --git a/arch/powerpc/include/asm/cacheflush.h b/arch/powerpc/include/asm/cacheflush.h
index e92191b390f31..e682c8e10e903 100644
--- a/arch/powerpc/include/asm/cacheflush.h
+++ b/arch/powerpc/include/asm/cacheflush.h
@@ -4,23 +4,9 @@
 #ifndef _ASM_POWERPC_CACHEFLUSH_H
 #define _ASM_POWERPC_CACHEFLUSH_H
 
-#ifdef __KERNEL__
-
 #include <linux/mm.h>
 #include <asm/cputable.h>
 
-/*
- * No cache flushing is required when address mappings are changed,
- * because the caches on PowerPCs are physically addressed.
- */
-#define flush_cache_all()			do { } while (0)
-#define flush_cache_mm(mm)			do { } while (0)
-#define flush_cache_dup_mm(mm)			do { } while (0)
-#define flush_cache_range(vma, start, end)	do { } while (0)
-#define flush_cache_page(vma, vmaddr, pfn)	do { } while (0)
-#define flush_icache_page(vma, page)		do { } while (0)
-#define flush_cache_vunmap(start, end)		do { } while (0)
-
 #ifdef CONFIG_PPC_BOOK3S_64
 /*
  * Book3s has no ptesync after setting a pte, so without this ptesync it's
@@ -33,20 +19,20 @@ static inline void flush_cache_vmap(unsigned long start, unsigned long end)
 {
 	asm volatile("ptesync" ::: "memory");
 }
-#else
-static inline void flush_cache_vmap(unsigned long start, unsigned long end) { }
-#endif
+#define flush_cache_vmap flush_cache_vmap
+#endif /* CONFIG_PPC_BOOK3S_64 */
 
 #define ARCH_IMPLEMENTS_FLUSH_DCACHE_PAGE 1
 extern void flush_dcache_page(struct page *page);
-#define flush_dcache_mmap_lock(mapping)		do { } while (0)
-#define flush_dcache_mmap_unlock(mapping)	do { } while (0)
 
 void flush_icache_range(unsigned long start, unsigned long stop);
-extern void flush_icache_user_range(struct vm_area_struct *vma,
-				    struct page *page, unsigned long addr,
-				    int len);
-extern void flush_dcache_icache_page(struct page *page);
+#define flush_icache_range flush_icache_range
+
+void flush_icache_user_range(struct vm_area_struct *vma, struct page *page,
+		unsigned long addr, int len);
+#define flush_icache_user_range flush_icache_user_range
+
+void flush_dcache_icache_page(struct page *page);
 void __flush_dcache_icache(void *page);
 
 /**
@@ -111,14 +97,6 @@ static inline void invalidate_dcache_range(unsigned long start,
 	mb();	/* sync */
 }
 
-#define copy_to_user_page(vma, page, vaddr, dst, src, len) \
-	do { \
-		memcpy(dst, src, len); \
-		flush_icache_user_range(vma, page, vaddr, len); \
-	} while (0)
-#define copy_from_user_page(vma, page, vaddr, dst, src, len) \
-	memcpy(dst, src, len)
-
-#endif /* __KERNEL__ */
+#include <asm-generic/cacheflush.h>
 
 #endif /* _ASM_POWERPC_CACHEFLUSH_H */
-- 
2.26.2


^ permalink raw reply	[flat|nested] 38+ messages in thread

* [PATCH 17/29] riscv: use asm-generic/cacheflush.h
  2020-05-15 14:36 sort out the flush_icache_range mess v2 Christoph Hellwig
                   ` (15 preceding siblings ...)
  2020-05-15 14:36 ` [PATCH 16/29] powerpc: " Christoph Hellwig
@ 2020-05-15 14:36 ` Christoph Hellwig
  2020-05-15 14:36 ` [PATCH 18/29] arm,sparc,unicore32: remove flush_icache_user_range Christoph Hellwig
                   ` (11 subsequent siblings)
  28 siblings, 0 replies; 38+ messages in thread
From: Christoph Hellwig @ 2020-05-15 14:36 UTC (permalink / raw)
  To: Andrew Morton, Arnd Bergmann, Roman Zippel
  Cc: Jessica Yu, Michal Simek, x86, linux-alpha, linux-kernel,
	linux-arm-kernel, linux-c6x-dev, linux-hexagon, linux-ia64,
	linux-m68k, linux-mips, openrisc, linuxppc-dev, linux-riscv,
	linux-sh, sparclinux, linux-arch, linux-mm, linux-um,
	linux-xtensa, linux-fsdevel, Palmer Dabbelt

RISC-V needs almost no cache flushing routines of its own.  Rely on
asm-generic/cacheflush.h for the defaults.

Also remove the pointless __KERNEL__ ifdef while we're at it.

Signed-off-by: Christoph Hellwig <hch@lst.de>
Reviewed-by: Palmer Dabbelt <palmerdabbelt@google.com>
Acked-by: Palmer Dabbelt <palmerdabbelt@google.com>
---
 arch/riscv/include/asm/cacheflush.h | 62 ++---------------------------
 1 file changed, 3 insertions(+), 59 deletions(-)

diff --git a/arch/riscv/include/asm/cacheflush.h b/arch/riscv/include/asm/cacheflush.h
index c8677c75f82cb..a167b4fbdf007 100644
--- a/arch/riscv/include/asm/cacheflush.h
+++ b/arch/riscv/include/asm/cacheflush.h
@@ -8,65 +8,6 @@
 
 #include <linux/mm.h>
 
-#define ARCH_IMPLEMENTS_FLUSH_DCACHE_PAGE 0
-
-/*
- * The cache doesn't need to be flushed when TLB entries change when
- * the cache is mapped to physical memory, not virtual memory
- */
-static inline void flush_cache_all(void)
-{
-}
-
-static inline void flush_cache_mm(struct mm_struct *mm)
-{
-}
-
-static inline void flush_cache_dup_mm(struct mm_struct *mm)
-{
-}
-
-static inline void flush_cache_range(struct vm_area_struct *vma,
-				     unsigned long start,
-				     unsigned long end)
-{
-}
-
-static inline void flush_cache_page(struct vm_area_struct *vma,
-				    unsigned long vmaddr,
-				    unsigned long pfn)
-{
-}
-
-static inline void flush_dcache_mmap_lock(struct address_space *mapping)
-{
-}
-
-static inline void flush_dcache_mmap_unlock(struct address_space *mapping)
-{
-}
-
-static inline void flush_icache_page(struct vm_area_struct *vma,
-				     struct page *page)
-{
-}
-
-static inline void flush_cache_vmap(unsigned long start, unsigned long end)
-{
-}
-
-static inline void flush_cache_vunmap(unsigned long start, unsigned long end)
-{
-}
-
-#define copy_to_user_page(vma, page, vaddr, dst, src, len) \
-	do { \
-		memcpy(dst, src, len); \
-		flush_icache_user_range(vma, page, vaddr, len); \
-	} while (0)
-#define copy_from_user_page(vma, page, vaddr, dst, src, len) \
-	memcpy(dst, src, len)
-
 static inline void local_flush_icache_all(void)
 {
 	asm volatile ("fence.i" ::: "memory");
@@ -79,6 +20,7 @@ static inline void flush_dcache_page(struct page *page)
 	if (test_bit(PG_dcache_clean, &page->flags))
 		clear_bit(PG_dcache_clean, &page->flags);
 }
+#define ARCH_IMPLEMENTS_FLUSH_DCACHE_PAGE 1
 
 /*
  * RISC-V doesn't have an instruction to flush parts of the instruction cache,
@@ -105,4 +47,6 @@ void flush_icache_mm(struct mm_struct *mm, bool local);
 #define SYS_RISCV_FLUSH_ICACHE_LOCAL 1UL
 #define SYS_RISCV_FLUSH_ICACHE_ALL   (SYS_RISCV_FLUSH_ICACHE_LOCAL)
 
+#include <asm-generic/cacheflush.h>
+
 #endif /* _ASM_RISCV_CACHEFLUSH_H */
-- 
2.26.2


^ permalink raw reply	[flat|nested] 38+ messages in thread

* [PATCH 18/29] arm,sparc,unicore32: remove flush_icache_user_range
  2020-05-15 14:36 sort out the flush_icache_range mess v2 Christoph Hellwig
                   ` (16 preceding siblings ...)
  2020-05-15 14:36 ` [PATCH 17/29] riscv: " Christoph Hellwig
@ 2020-05-15 14:36 ` Christoph Hellwig
  2020-05-15 14:36 ` [PATCH 19/29] mm: rename flush_icache_user_range to flush_icache_user_page Christoph Hellwig
                   ` (10 subsequent siblings)
  28 siblings, 0 replies; 38+ messages in thread
From: Christoph Hellwig @ 2020-05-15 14:36 UTC (permalink / raw)
  To: Andrew Morton, Arnd Bergmann, Roman Zippel
  Cc: Jessica Yu, Michal Simek, x86, linux-alpha, linux-kernel,
	linux-arm-kernel, linux-c6x-dev, linux-hexagon, linux-ia64,
	linux-m68k, linux-mips, openrisc, linuxppc-dev, linux-riscv,
	linux-sh, sparclinux, linux-arch, linux-mm, linux-um,
	linux-xtensa, linux-fsdevel

flush_icache_user_range is only used by <asm-generic/cacheflush.h>, so
remove it from the architectures that implement it, but don't use
<asm-generic/cacheflush.h>.

Signed-off-by: Christoph Hellwig <hch@lst.de>
---
 arch/arm/include/asm/cacheflush.h       | 3 ---
 arch/sparc/include/asm/cacheflush_32.h  | 2 --
 arch/sparc/include/asm/cacheflush_64.h  | 1 -
 arch/unicore32/include/asm/cacheflush.h | 3 ---
 4 files changed, 9 deletions(-)

diff --git a/arch/arm/include/asm/cacheflush.h b/arch/arm/include/asm/cacheflush.h
index 7114b9aa46b87..c78e14fcfb5df 100644
--- a/arch/arm/include/asm/cacheflush.h
+++ b/arch/arm/include/asm/cacheflush.h
@@ -318,9 +318,6 @@ extern void flush_kernel_dcache_page(struct page *);
 #define flush_dcache_mmap_lock(mapping)		xa_lock_irq(&mapping->i_pages)
 #define flush_dcache_mmap_unlock(mapping)	xa_unlock_irq(&mapping->i_pages)
 
-#define flush_icache_user_range(vma,page,addr,len) \
-	flush_dcache_page(page)
-
 /*
  * We don't appear to need to do anything here.  In fact, if we did, we'd
  * duplicate cache flushing elsewhere performed by flush_dcache_page().
diff --git a/arch/sparc/include/asm/cacheflush_32.h b/arch/sparc/include/asm/cacheflush_32.h
index fb66094a2c30c..41c6d734a4741 100644
--- a/arch/sparc/include/asm/cacheflush_32.h
+++ b/arch/sparc/include/asm/cacheflush_32.h
@@ -17,8 +17,6 @@
 #define flush_icache_range(start, end)		do { } while (0)
 #define flush_icache_page(vma, pg)		do { } while (0)
 
-#define flush_icache_user_range(vma,pg,adr,len)	do { } while (0)
-
 #define copy_to_user_page(vma, page, vaddr, dst, src, len) \
 	do {							\
 		flush_cache_page(vma, vaddr, page_to_pfn(page));\
diff --git a/arch/sparc/include/asm/cacheflush_64.h b/arch/sparc/include/asm/cacheflush_64.h
index e7517434d1fa6..b9341836597ec 100644
--- a/arch/sparc/include/asm/cacheflush_64.h
+++ b/arch/sparc/include/asm/cacheflush_64.h
@@ -49,7 +49,6 @@ void __flush_dcache_range(unsigned long start, unsigned long end);
 void flush_dcache_page(struct page *page);
 
 #define flush_icache_page(vma, pg)	do { } while(0)
-#define flush_icache_user_range(vma,pg,adr,len)	do { } while (0)
 
 void flush_ptrace_access(struct vm_area_struct *, struct page *,
 			 unsigned long uaddr, void *kaddr,
diff --git a/arch/unicore32/include/asm/cacheflush.h b/arch/unicore32/include/asm/cacheflush.h
index 9393ca4047e93..ff0be92ebc320 100644
--- a/arch/unicore32/include/asm/cacheflush.h
+++ b/arch/unicore32/include/asm/cacheflush.h
@@ -162,9 +162,6 @@ extern void flush_dcache_page(struct page *);
 #define flush_dcache_mmap_lock(mapping)		do { } while (0)
 #define flush_dcache_mmap_unlock(mapping)	do { } while (0)
 
-#define flush_icache_user_range(vma, page, addr, len)	\
-	flush_dcache_page(page)
-
 /*
  * We don't appear to need to do anything here.  In fact, if we did, we'd
  * duplicate cache flushing elsewhere performed by flush_dcache_page().
-- 
2.26.2


^ permalink raw reply	[flat|nested] 38+ messages in thread

* [PATCH 19/29] mm: rename flush_icache_user_range to flush_icache_user_page
  2020-05-15 14:36 sort out the flush_icache_range mess v2 Christoph Hellwig
                   ` (17 preceding siblings ...)
  2020-05-15 14:36 ` [PATCH 18/29] arm,sparc,unicore32: remove flush_icache_user_range Christoph Hellwig
@ 2020-05-15 14:36 ` Christoph Hellwig
  2020-05-15 14:36 ` [PATCH 20/29] asm-generic: add a flush_icache_user_range stub Christoph Hellwig
                   ` (9 subsequent siblings)
  28 siblings, 0 replies; 38+ messages in thread
From: Christoph Hellwig @ 2020-05-15 14:36 UTC (permalink / raw)
  To: Andrew Morton, Arnd Bergmann, Roman Zippel
  Cc: Jessica Yu, Michal Simek, x86, linux-alpha, linux-kernel,
	linux-arm-kernel, linux-c6x-dev, linux-hexagon, linux-ia64,
	linux-m68k, linux-mips, openrisc, linuxppc-dev, linux-riscv,
	linux-sh, sparclinux, linux-arch, linux-mm, linux-um,
	linux-xtensa, linux-fsdevel, Geert Uytterhoeven

The function currently known as flush_icache_user_range only operates
on a single page.  Rename it to flush_icache_user_page as we'll need
the name flush_icache_user_range for something else soon.

Signed-off-by: Christoph Hellwig <hch@lst.de>
Acked-by: Geert Uytterhoeven <geert@linux-m68k.org>
---
 arch/alpha/include/asm/cacheflush.h    | 10 +++++-----
 arch/alpha/kernel/smp.c                |  2 +-
 arch/ia64/include/asm/cacheflush.h     |  2 +-
 arch/m68k/include/asm/cacheflush_mm.h  |  4 ++--
 arch/m68k/mm/cache.c                   |  2 +-
 arch/nds32/include/asm/cacheflush.h    |  4 ++--
 arch/nds32/mm/cacheflush.c             |  2 +-
 arch/openrisc/include/asm/cacheflush.h |  2 +-
 arch/powerpc/include/asm/cacheflush.h  |  4 ++--
 arch/powerpc/mm/mem.c                  |  2 +-
 arch/riscv/include/asm/cacheflush.h    |  3 ++-
 include/asm-generic/cacheflush.h       |  6 +++---
 kernel/events/uprobes.c                |  2 +-
 13 files changed, 23 insertions(+), 22 deletions(-)

diff --git a/arch/alpha/include/asm/cacheflush.h b/arch/alpha/include/asm/cacheflush.h
index 636d7ca0d05f6..9945ff483eaf7 100644
--- a/arch/alpha/include/asm/cacheflush.h
+++ b/arch/alpha/include/asm/cacheflush.h
@@ -35,7 +35,7 @@ extern void smp_imb(void);
 
 extern void __load_new_mm_context(struct mm_struct *);
 static inline void
-flush_icache_user_range(struct vm_area_struct *vma, struct page *page,
+flush_icache_user_page(struct vm_area_struct *vma, struct page *page,
 			unsigned long addr, int len)
 {
 	if (vma->vm_flags & VM_EXEC) {
@@ -46,16 +46,16 @@ flush_icache_user_range(struct vm_area_struct *vma, struct page *page,
 			mm->context[smp_processor_id()] = 0;
 	}
 }
-#define flush_icache_user_range flush_icache_user_range
+#define flush_icache_user_page flush_icache_user_page
 #else /* CONFIG_SMP */
-extern void flush_icache_user_range(struct vm_area_struct *vma,
+extern void flush_icache_user_page(struct vm_area_struct *vma,
 		struct page *page, unsigned long addr, int len);
-#define flush_icache_user_range flush_icache_user_range
+#define flush_icache_user_page flush_icache_user_page
 #endif /* CONFIG_SMP */
 
 /* This is used only in __do_fault and do_swap_page.  */
 #define flush_icache_page(vma, page) \
-	flush_icache_user_range((vma), (page), 0, 0)
+	flush_icache_user_page((vma), (page), 0, 0)
 
 #include <asm-generic/cacheflush.h>
 
diff --git a/arch/alpha/kernel/smp.c b/arch/alpha/kernel/smp.c
index 5f90df30be20a..52995bf413fea 100644
--- a/arch/alpha/kernel/smp.c
+++ b/arch/alpha/kernel/smp.c
@@ -740,7 +740,7 @@ ipi_flush_icache_page(void *x)
 }
 
 void
-flush_icache_user_range(struct vm_area_struct *vma, struct page *page,
+flush_icache_user_page(struct vm_area_struct *vma, struct page *page,
 			unsigned long addr, int len)
 {
 	struct mm_struct *mm = vma->vm_mm;
diff --git a/arch/ia64/include/asm/cacheflush.h b/arch/ia64/include/asm/cacheflush.h
index a8f1c86ac242a..708c0fa5d975e 100644
--- a/arch/ia64/include/asm/cacheflush.h
+++ b/arch/ia64/include/asm/cacheflush.h
@@ -22,7 +22,7 @@ extern void flush_icache_range(unsigned long start, unsigned long end);
 #define flush_icache_range flush_icache_range
 extern void clflush_cache_range(void *addr, int size);
 
-#define flush_icache_user_range(vma, page, user_addr, len)					\
+#define flush_icache_user_page(vma, page, user_addr, len)					\
 do {												\
 	unsigned long _addr = (unsigned long) page_address(page) + ((user_addr) & ~PAGE_MASK);	\
 	flush_icache_range(_addr, _addr + (len));						\
diff --git a/arch/m68k/include/asm/cacheflush_mm.h b/arch/m68k/include/asm/cacheflush_mm.h
index 1e2544ecaf88c..95376bf84faa5 100644
--- a/arch/m68k/include/asm/cacheflush_mm.h
+++ b/arch/m68k/include/asm/cacheflush_mm.h
@@ -254,7 +254,7 @@ static inline void __flush_page_to_ram(void *vaddr)
 #define flush_dcache_mmap_unlock(mapping)	do { } while (0)
 #define flush_icache_page(vma, page)	__flush_page_to_ram(page_address(page))
 
-extern void flush_icache_user_range(struct vm_area_struct *vma, struct page *page,
+extern void flush_icache_user_page(struct vm_area_struct *vma, struct page *page,
 				    unsigned long addr, int len);
 extern void flush_icache_range(unsigned long address, unsigned long endaddr);
 
@@ -264,7 +264,7 @@ static inline void copy_to_user_page(struct vm_area_struct *vma,
 {
 	flush_cache_page(vma, vaddr, page_to_pfn(page));
 	memcpy(dst, src, len);
-	flush_icache_user_range(vma, page, vaddr, len);
+	flush_icache_user_page(vma, page, vaddr, len);
 }
 static inline void copy_from_user_page(struct vm_area_struct *vma,
 				       struct page *page, unsigned long vaddr,
diff --git a/arch/m68k/mm/cache.c b/arch/m68k/mm/cache.c
index 079e64898e6a5..99057cd5ff7f1 100644
--- a/arch/m68k/mm/cache.c
+++ b/arch/m68k/mm/cache.c
@@ -106,7 +106,7 @@ void flush_icache_range(unsigned long address, unsigned long endaddr)
 }
 EXPORT_SYMBOL(flush_icache_range);
 
-void flush_icache_user_range(struct vm_area_struct *vma, struct page *page,
+void flush_icache_user_page(struct vm_area_struct *vma, struct page *page,
 			     unsigned long addr, int len)
 {
 	if (CPU_IS_COLDFIRE) {
diff --git a/arch/nds32/include/asm/cacheflush.h b/arch/nds32/include/asm/cacheflush.h
index caddded56e77f..7d6824f7c0e8d 100644
--- a/arch/nds32/include/asm/cacheflush.h
+++ b/arch/nds32/include/asm/cacheflush.h
@@ -44,9 +44,9 @@ void invalidate_kernel_vmap_range(void *addr, int size);
 #define flush_dcache_mmap_unlock(mapping) xa_unlock_irq(&(mapping)->i_pages)
 
 #else
-void flush_icache_user_range(struct vm_area_struct *vma, struct page *page,
+void flush_icache_user_page(struct vm_area_struct *vma, struct page *page,
 	                     unsigned long addr, int len);
-#define flush_icache_user_range flush_icache_user_range
+#define flush_icache_user_page flush_icache_user_page
 
 #include <asm-generic/cacheflush.h>
 #endif
diff --git a/arch/nds32/mm/cacheflush.c b/arch/nds32/mm/cacheflush.c
index 8f168b33065fa..6eb98a7ad27d2 100644
--- a/arch/nds32/mm/cacheflush.c
+++ b/arch/nds32/mm/cacheflush.c
@@ -36,7 +36,7 @@ void flush_icache_page(struct vm_area_struct *vma, struct page *page)
 	local_irq_restore(flags);
 }
 
-void flush_icache_user_range(struct vm_area_struct *vma, struct page *page,
+void flush_icache_user_page(struct vm_area_struct *vma, struct page *page,
 	                     unsigned long addr, int len)
 {
 	unsigned long kaddr;
diff --git a/arch/openrisc/include/asm/cacheflush.h b/arch/openrisc/include/asm/cacheflush.h
index 74d1fce4e8839..eeac40d4a8547 100644
--- a/arch/openrisc/include/asm/cacheflush.h
+++ b/arch/openrisc/include/asm/cacheflush.h
@@ -62,7 +62,7 @@ static inline void flush_dcache_page(struct page *page)
 	clear_bit(PG_dc_clean, &page->flags);
 }
 
-#define flush_icache_user_range(vma, page, addr, len)	\
+#define flush_icache_user_page(vma, page, addr, len)	\
 do {							\
 	if (vma->vm_flags & VM_EXEC)			\
 		sync_icache_dcache(page);		\
diff --git a/arch/powerpc/include/asm/cacheflush.h b/arch/powerpc/include/asm/cacheflush.h
index e682c8e10e903..de600b915a3c5 100644
--- a/arch/powerpc/include/asm/cacheflush.h
+++ b/arch/powerpc/include/asm/cacheflush.h
@@ -28,9 +28,9 @@ extern void flush_dcache_page(struct page *page);
 void flush_icache_range(unsigned long start, unsigned long stop);
 #define flush_icache_range flush_icache_range
 
-void flush_icache_user_range(struct vm_area_struct *vma, struct page *page,
+void flush_icache_user_page(struct vm_area_struct *vma, struct page *page,
 		unsigned long addr, int len);
-#define flush_icache_user_range flush_icache_user_range
+#define flush_icache_user_page flush_icache_user_page
 
 void flush_dcache_icache_page(struct page *page);
 void __flush_dcache_icache(void *page);
diff --git a/arch/powerpc/mm/mem.c b/arch/powerpc/mm/mem.c
index f0d1bf0a8e14f..d1ad0b9b19281 100644
--- a/arch/powerpc/mm/mem.c
+++ b/arch/powerpc/mm/mem.c
@@ -578,7 +578,7 @@ void copy_user_page(void *vto, void *vfrom, unsigned long vaddr,
 	flush_dcache_page(pg);
 }
 
-void flush_icache_user_range(struct vm_area_struct *vma, struct page *page,
+void flush_icache_user_page(struct vm_area_struct *vma, struct page *page,
 			     unsigned long addr, int len)
 {
 	unsigned long maddr;
diff --git a/arch/riscv/include/asm/cacheflush.h b/arch/riscv/include/asm/cacheflush.h
index a167b4fbdf007..23ff703509926 100644
--- a/arch/riscv/include/asm/cacheflush.h
+++ b/arch/riscv/include/asm/cacheflush.h
@@ -27,7 +27,8 @@ static inline void flush_dcache_page(struct page *page)
  * so instead we just flush the whole thing.
  */
 #define flush_icache_range(start, end) flush_icache_all()
-#define flush_icache_user_range(vma, pg, addr, len) flush_icache_mm(vma->vm_mm, 0)
+#define flush_icache_user_page(vma, pg, addr, len) \
+	flush_icache_mm(vma->vm_mm, 0)
 
 #ifndef CONFIG_SMP
 
diff --git a/include/asm-generic/cacheflush.h b/include/asm-generic/cacheflush.h
index bbbb4d4ef6516..2c9686fefb715 100644
--- a/include/asm-generic/cacheflush.h
+++ b/include/asm-generic/cacheflush.h
@@ -73,8 +73,8 @@ static inline void flush_icache_page(struct vm_area_struct *vma,
 }
 #endif
 
-#ifndef flush_icache_user_range
-static inline void flush_icache_user_range(struct vm_area_struct *vma,
+#ifndef flush_icache_user_page
+static inline void flush_icache_user_page(struct vm_area_struct *vma,
 					   struct page *page,
 					   unsigned long addr, int len)
 {
@@ -97,7 +97,7 @@ static inline void flush_cache_vunmap(unsigned long start, unsigned long end)
 #define copy_to_user_page(vma, page, vaddr, dst, src, len)	\
 	do { \
 		memcpy(dst, src, len); \
-		flush_icache_user_range(vma, page, vaddr, len); \
+		flush_icache_user_page(vma, page, vaddr, len); \
 	} while (0)
 #endif
 
diff --git a/kernel/events/uprobes.c b/kernel/events/uprobes.c
index ece7e13f6e4ac..2e5effbda86b0 100644
--- a/kernel/events/uprobes.c
+++ b/kernel/events/uprobes.c
@@ -1674,7 +1674,7 @@ void __weak arch_uprobe_copy_ixol(struct page *page, unsigned long vaddr,
 	copy_to_page(page, vaddr, src, len);
 
 	/*
-	 * We probably need flush_icache_user_range() but it needs vma.
+	 * We probably need flush_icache_user_page() but it needs vma.
 	 * This should work on most of architectures by default. If
 	 * architecture needs to do something different it can define
 	 * its own version of the function.
-- 
2.26.2


^ permalink raw reply	[flat|nested] 38+ messages in thread

* [PATCH 20/29] asm-generic: add a flush_icache_user_range stub
  2020-05-15 14:36 sort out the flush_icache_range mess v2 Christoph Hellwig
                   ` (18 preceding siblings ...)
  2020-05-15 14:36 ` [PATCH 19/29] mm: rename flush_icache_user_range to flush_icache_user_page Christoph Hellwig
@ 2020-05-15 14:36 ` Christoph Hellwig
  2020-05-15 14:36 ` [PATCH 21/29] sh: implement flush_icache_user_range Christoph Hellwig
                   ` (8 subsequent siblings)
  28 siblings, 0 replies; 38+ messages in thread
From: Christoph Hellwig @ 2020-05-15 14:36 UTC (permalink / raw)
  To: Andrew Morton, Arnd Bergmann, Roman Zippel
  Cc: Jessica Yu, Michal Simek, x86, linux-alpha, linux-kernel,
	linux-arm-kernel, linux-c6x-dev, linux-hexagon, linux-ia64,
	linux-m68k, linux-mips, openrisc, linuxppc-dev, linux-riscv,
	linux-sh, sparclinux, linux-arch, linux-mm, linux-um,
	linux-xtensa, linux-fsdevel

Define flush_icache_user_range to flush_icache_range unless the
architecture provides its own implementation.

Signed-off-by: Christoph Hellwig <hch@lst.de>
---
 include/asm-generic/cacheflush.h | 4 ++++
 1 file changed, 4 insertions(+)

diff --git a/include/asm-generic/cacheflush.h b/include/asm-generic/cacheflush.h
index 2c9686fefb715..907fa5d164944 100644
--- a/include/asm-generic/cacheflush.h
+++ b/include/asm-generic/cacheflush.h
@@ -66,6 +66,10 @@ static inline void flush_icache_range(unsigned long start, unsigned long end)
 }
 #endif
 
+#ifndef flush_icache_user_range
+#define flush_icache_user_range flush_icache_range
+#endif
+
 #ifndef flush_icache_page
 static inline void flush_icache_page(struct vm_area_struct *vma,
 				     struct page *page)
-- 
2.26.2


^ permalink raw reply	[flat|nested] 38+ messages in thread

* [PATCH 21/29] sh: implement flush_icache_user_range
  2020-05-15 14:36 sort out the flush_icache_range mess v2 Christoph Hellwig
                   ` (19 preceding siblings ...)
  2020-05-15 14:36 ` [PATCH 20/29] asm-generic: add a flush_icache_user_range stub Christoph Hellwig
@ 2020-05-15 14:36 ` Christoph Hellwig
  2020-05-15 14:36 ` [PATCH 22/29] xtensa: " Christoph Hellwig
                   ` (7 subsequent siblings)
  28 siblings, 0 replies; 38+ messages in thread
From: Christoph Hellwig @ 2020-05-15 14:36 UTC (permalink / raw)
  To: Andrew Morton, Arnd Bergmann, Roman Zippel
  Cc: Jessica Yu, Michal Simek, x86, linux-alpha, linux-kernel,
	linux-arm-kernel, linux-c6x-dev, linux-hexagon, linux-ia64,
	linux-m68k, linux-mips, openrisc, linuxppc-dev, linux-riscv,
	linux-sh, sparclinux, linux-arch, linux-mm, linux-um,
	linux-xtensa, linux-fsdevel

The SuperH implementation of flush_icache_range seems to be able to
cope with user addresses.  Just define flush_icache_user_range to
flush_icache_range.

Signed-off-by: Christoph Hellwig <hch@lst.de>
---
 arch/sh/include/asm/cacheflush.h | 1 +
 1 file changed, 1 insertion(+)

diff --git a/arch/sh/include/asm/cacheflush.h b/arch/sh/include/asm/cacheflush.h
index b932e42ef0284..fe7400079b97b 100644
--- a/arch/sh/include/asm/cacheflush.h
+++ b/arch/sh/include/asm/cacheflush.h
@@ -46,6 +46,7 @@ extern void flush_cache_range(struct vm_area_struct *vma,
 #define ARCH_IMPLEMENTS_FLUSH_DCACHE_PAGE 1
 extern void flush_dcache_page(struct page *page);
 extern void flush_icache_range(unsigned long start, unsigned long end);
+#define flush_icache_user_range flush_icache_range
 extern void flush_icache_page(struct vm_area_struct *vma,
 				 struct page *page);
 extern void flush_cache_sigtramp(unsigned long address);
-- 
2.26.2


^ permalink raw reply	[flat|nested] 38+ messages in thread

* [PATCH 22/29] xtensa: implement flush_icache_user_range
  2020-05-15 14:36 sort out the flush_icache_range mess v2 Christoph Hellwig
                   ` (20 preceding siblings ...)
  2020-05-15 14:36 ` [PATCH 21/29] sh: implement flush_icache_user_range Christoph Hellwig
@ 2020-05-15 14:36 ` Christoph Hellwig
  2020-05-15 14:36 ` [PATCH 23/29] arm: rename flush_cache_user_range to flush_icache_user_range Christoph Hellwig
                   ` (6 subsequent siblings)
  28 siblings, 0 replies; 38+ messages in thread
From: Christoph Hellwig @ 2020-05-15 14:36 UTC (permalink / raw)
  To: Andrew Morton, Arnd Bergmann, Roman Zippel
  Cc: Jessica Yu, Michal Simek, x86, linux-alpha, linux-kernel,
	linux-arm-kernel, linux-c6x-dev, linux-hexagon, linux-ia64,
	linux-m68k, linux-mips, openrisc, linuxppc-dev, linux-riscv,
	linux-sh, sparclinux, linux-arch, linux-mm, linux-um,
	linux-xtensa, linux-fsdevel

The Xtensa implementation of flush_icache_range seems to be able to
cope with user addresses.  Just define flush_icache_user_range to
flush_icache_range.

Signed-off-by: Christoph Hellwig <hch@lst.de>
---
 arch/xtensa/include/asm/cacheflush.h | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/arch/xtensa/include/asm/cacheflush.h b/arch/xtensa/include/asm/cacheflush.h
index a0d50be5a8cb1..460e666ad0761 100644
--- a/arch/xtensa/include/asm/cacheflush.h
+++ b/arch/xtensa/include/asm/cacheflush.h
@@ -107,6 +107,8 @@ void flush_cache_page(struct vm_area_struct*,
 #define flush_cache_page  local_flush_cache_page
 #endif
 
+#define flush_icache_user_range flush_icache_range
+
 #define local_flush_cache_all()						\
 	do {								\
 		__flush_invalidate_dcache_all();			\
-- 
2.26.2


^ permalink raw reply	[flat|nested] 38+ messages in thread

* [PATCH 23/29] arm: rename flush_cache_user_range to flush_icache_user_range
  2020-05-15 14:36 sort out the flush_icache_range mess v2 Christoph Hellwig
                   ` (21 preceding siblings ...)
  2020-05-15 14:36 ` [PATCH 22/29] xtensa: " Christoph Hellwig
@ 2020-05-15 14:36 ` Christoph Hellwig
  2020-05-15 14:36 ` [PATCH 24/29] m68k: implement flush_icache_user_range Christoph Hellwig
                   ` (5 subsequent siblings)
  28 siblings, 0 replies; 38+ messages in thread
From: Christoph Hellwig @ 2020-05-15 14:36 UTC (permalink / raw)
  To: Andrew Morton, Arnd Bergmann, Roman Zippel
  Cc: Jessica Yu, Michal Simek, x86, linux-alpha, linux-kernel,
	linux-arm-kernel, linux-c6x-dev, linux-hexagon, linux-ia64,
	linux-m68k, linux-mips, openrisc, linuxppc-dev, linux-riscv,
	linux-sh, sparclinux, linux-arch, linux-mm, linux-um,
	linux-xtensa, linux-fsdevel

flush_icache_user_range will be the name for a generic primitive.
Move the arm name so that arm already has an implementation.

Signed-off-by: Christoph Hellwig <hch@lst.de>
---
 arch/arm/include/asm/cacheflush.h | 4 ++--
 arch/arm/kernel/traps.c           | 2 +-
 2 files changed, 3 insertions(+), 3 deletions(-)

diff --git a/arch/arm/include/asm/cacheflush.h b/arch/arm/include/asm/cacheflush.h
index c78e14fcfb5df..2e24e765e6d3a 100644
--- a/arch/arm/include/asm/cacheflush.h
+++ b/arch/arm/include/asm/cacheflush.h
@@ -258,11 +258,11 @@ extern void flush_cache_page(struct vm_area_struct *vma, unsigned long user_addr
 #define flush_cache_dup_mm(mm) flush_cache_mm(mm)
 
 /*
- * flush_cache_user_range is used when we want to ensure that the
+ * flush_icache_user_range is used when we want to ensure that the
  * Harvard caches are synchronised for the user space address range.
  * This is used for the ARM private sys_cacheflush system call.
  */
-#define flush_cache_user_range(s,e)	__cpuc_coherent_user_range(s,e)
+#define flush_icache_user_range(s,e)	__cpuc_coherent_user_range(s,e)
 
 /*
  * Perform necessary cache operations to ensure that data previously
diff --git a/arch/arm/kernel/traps.c b/arch/arm/kernel/traps.c
index 1e70e7227f0ff..316a7687f8133 100644
--- a/arch/arm/kernel/traps.c
+++ b/arch/arm/kernel/traps.c
@@ -566,7 +566,7 @@ __do_cache_op(unsigned long start, unsigned long end)
 		if (fatal_signal_pending(current))
 			return 0;
 
-		ret = flush_cache_user_range(start, start + chunk);
+		ret = flush_icache_user_range(start, start + chunk);
 		if (ret)
 			return ret;
 
-- 
2.26.2


^ permalink raw reply	[flat|nested] 38+ messages in thread

* [PATCH 24/29] m68k: implement flush_icache_user_range
  2020-05-15 14:36 sort out the flush_icache_range mess v2 Christoph Hellwig
                   ` (22 preceding siblings ...)
  2020-05-15 14:36 ` [PATCH 23/29] arm: rename flush_cache_user_range to flush_icache_user_range Christoph Hellwig
@ 2020-05-15 14:36 ` Christoph Hellwig
  2020-05-15 14:36 ` [PATCH 25/29] exec: only build read_code when needed Christoph Hellwig
                   ` (4 subsequent siblings)
  28 siblings, 0 replies; 38+ messages in thread
From: Christoph Hellwig @ 2020-05-15 14:36 UTC (permalink / raw)
  To: Andrew Morton, Arnd Bergmann, Roman Zippel
  Cc: Jessica Yu, Michal Simek, x86, linux-alpha, linux-kernel,
	linux-arm-kernel, linux-c6x-dev, linux-hexagon, linux-ia64,
	linux-m68k, linux-mips, openrisc, linuxppc-dev, linux-riscv,
	linux-sh, sparclinux, linux-arch, linux-mm, linux-um,
	linux-xtensa, linux-fsdevel, Geert Uytterhoeven

Rename the current flush_icache_range to flush_icache_user_range as
per commit ae92ef8a4424 ("PATCH] flush icache in correct context") there
seems to be an assumption that it operates on user addresses.  Add a
flush_icache_range around it that for now is a no-op.

Signed-off-by: Christoph Hellwig <hch@lst.de>
Acked-by: Geert Uytterhoeven <geert@linux-m68k.org>
---
 arch/m68k/include/asm/cacheflush_mm.h | 2 ++
 arch/m68k/mm/cache.c                  | 7 ++++++-
 2 files changed, 8 insertions(+), 1 deletion(-)

diff --git a/arch/m68k/include/asm/cacheflush_mm.h b/arch/m68k/include/asm/cacheflush_mm.h
index 95376bf84faa5..1ac55e7b47f01 100644
--- a/arch/m68k/include/asm/cacheflush_mm.h
+++ b/arch/m68k/include/asm/cacheflush_mm.h
@@ -257,6 +257,8 @@ static inline void __flush_page_to_ram(void *vaddr)
 extern void flush_icache_user_page(struct vm_area_struct *vma, struct page *page,
 				    unsigned long addr, int len);
 extern void flush_icache_range(unsigned long address, unsigned long endaddr);
+extern void flush_icache_user_range(unsigned long address,
+		unsigned long endaddr);
 
 static inline void copy_to_user_page(struct vm_area_struct *vma,
 				     struct page *page, unsigned long vaddr,
diff --git a/arch/m68k/mm/cache.c b/arch/m68k/mm/cache.c
index 99057cd5ff7f1..7915be3a09712 100644
--- a/arch/m68k/mm/cache.c
+++ b/arch/m68k/mm/cache.c
@@ -73,7 +73,7 @@ static unsigned long virt_to_phys_slow(unsigned long vaddr)
 
 /* Push n pages at kernel virtual address and clear the icache */
 /* RZ: use cpush %bc instead of cpush %dc, cinv %ic */
-void flush_icache_range(unsigned long address, unsigned long endaddr)
+void flush_icache_user_range(unsigned long address, unsigned long endaddr)
 {
 	if (CPU_IS_COLDFIRE) {
 		unsigned long start, end;
@@ -104,6 +104,11 @@ void flush_icache_range(unsigned long address, unsigned long endaddr)
 			      : "di" (FLUSH_I));
 	}
 }
+
+void flush_icache_range(unsigned long address, unsigned long endaddr)
+{
+	flush_icache_user_range(address, endaddr);
+}
 EXPORT_SYMBOL(flush_icache_range);
 
 void flush_icache_user_page(struct vm_area_struct *vma, struct page *page,
-- 
2.26.2


^ permalink raw reply	[flat|nested] 38+ messages in thread

* [PATCH 25/29] exec: only build read_code when needed
  2020-05-15 14:36 sort out the flush_icache_range mess v2 Christoph Hellwig
                   ` (23 preceding siblings ...)
  2020-05-15 14:36 ` [PATCH 24/29] m68k: implement flush_icache_user_range Christoph Hellwig
@ 2020-05-15 14:36 ` Christoph Hellwig
  2020-05-15 14:36 ` [PATCH 26/29] exec: use flush_icache_user_range in read_code Christoph Hellwig
                   ` (3 subsequent siblings)
  28 siblings, 0 replies; 38+ messages in thread
From: Christoph Hellwig @ 2020-05-15 14:36 UTC (permalink / raw)
  To: Andrew Morton, Arnd Bergmann, Roman Zippel
  Cc: Jessica Yu, Michal Simek, x86, linux-alpha, linux-kernel,
	linux-arm-kernel, linux-c6x-dev, linux-hexagon, linux-ia64,
	linux-m68k, linux-mips, openrisc, linuxppc-dev, linux-riscv,
	linux-sh, sparclinux, linux-arch, linux-mm, linux-um,
	linux-xtensa, linux-fsdevel

Only build read_code when binary formats that use it are built into the
kernel.

Signed-off-by: Christoph Hellwig <hch@lst.de>
---
 fs/exec.c | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/fs/exec.c b/fs/exec.c
index 06b4c550af5d9..a4f766f296f8f 100644
--- a/fs/exec.c
+++ b/fs/exec.c
@@ -1027,6 +1027,8 @@ int kernel_read_file_from_fd(int fd, void **buf, loff_t *size, loff_t max_size,
 }
 EXPORT_SYMBOL_GPL(kernel_read_file_from_fd);
 
+#if defined(CONFIG_HAVE_AOUT) || defined(CONFIG_BINFMT_FLAT) || \
+    defined(CONFIG_BINFMT_ELF_FDPIC)
 ssize_t read_code(struct file *file, unsigned long addr, loff_t pos, size_t len)
 {
 	ssize_t res = vfs_read(file, (void __user *)addr, len, &pos);
@@ -1035,6 +1037,7 @@ ssize_t read_code(struct file *file, unsigned long addr, loff_t pos, size_t len)
 	return res;
 }
 EXPORT_SYMBOL(read_code);
+#endif
 
 /*
  * Maps the mm_struct mm into the current task struct.
-- 
2.26.2


^ permalink raw reply	[flat|nested] 38+ messages in thread

* [PATCH 26/29] exec: use flush_icache_user_range in read_code
  2020-05-15 14:36 sort out the flush_icache_range mess v2 Christoph Hellwig
                   ` (24 preceding siblings ...)
  2020-05-15 14:36 ` [PATCH 25/29] exec: only build read_code when needed Christoph Hellwig
@ 2020-05-15 14:36 ` Christoph Hellwig
  2020-05-15 14:36 ` [PATCH 27/29] binfmt_flat: use flush_icache_user_range Christoph Hellwig
                   ` (2 subsequent siblings)
  28 siblings, 0 replies; 38+ messages in thread
From: Christoph Hellwig @ 2020-05-15 14:36 UTC (permalink / raw)
  To: Andrew Morton, Arnd Bergmann, Roman Zippel
  Cc: Jessica Yu, Michal Simek, x86, linux-alpha, linux-kernel,
	linux-arm-kernel, linux-c6x-dev, linux-hexagon, linux-ia64,
	linux-m68k, linux-mips, openrisc, linuxppc-dev, linux-riscv,
	linux-sh, sparclinux, linux-arch, linux-mm, linux-um,
	linux-xtensa, linux-fsdevel

read_code operates on user addresses.

Signed-off-by: Christoph Hellwig <hch@lst.de>
---
 fs/exec.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/fs/exec.c b/fs/exec.c
index a4f766f296f8f..c541867316a63 100644
--- a/fs/exec.c
+++ b/fs/exec.c
@@ -1033,7 +1033,7 @@ ssize_t read_code(struct file *file, unsigned long addr, loff_t pos, size_t len)
 {
 	ssize_t res = vfs_read(file, (void __user *)addr, len, &pos);
 	if (res > 0)
-		flush_icache_range(addr, addr + len);
+		flush_icache_user_range(addr, addr + len);
 	return res;
 }
 EXPORT_SYMBOL(read_code);
-- 
2.26.2


^ permalink raw reply	[flat|nested] 38+ messages in thread

* [PATCH 27/29] binfmt_flat: use flush_icache_user_range
  2020-05-15 14:36 sort out the flush_icache_range mess v2 Christoph Hellwig
                   ` (25 preceding siblings ...)
  2020-05-15 14:36 ` [PATCH 26/29] exec: use flush_icache_user_range in read_code Christoph Hellwig
@ 2020-05-15 14:36 ` Christoph Hellwig
  2020-05-15 14:36 ` [PATCH 28/29] nommu: use flush_icache_user_range in brk and mmap Christoph Hellwig
  2020-05-15 14:36 ` [PATCH 29/29] module: move the set_fs hack for flush_icache_range to m68k Christoph Hellwig
  28 siblings, 0 replies; 38+ messages in thread
From: Christoph Hellwig @ 2020-05-15 14:36 UTC (permalink / raw)
  To: Andrew Morton, Arnd Bergmann, Roman Zippel
  Cc: Jessica Yu, Michal Simek, x86, linux-alpha, linux-kernel,
	linux-arm-kernel, linux-c6x-dev, linux-hexagon, linux-ia64,
	linux-m68k, linux-mips, openrisc, linuxppc-dev, linux-riscv,
	linux-sh, sparclinux, linux-arch, linux-mm, linux-um,
	linux-xtensa, linux-fsdevel, Greg Ungerer

load_flat_file works on user addresses.

Signed-off-by: Christoph Hellwig <hch@lst.de>
Acked-by: Greg Ungerer <gerg@linux-m68k.org>
---
 fs/binfmt_flat.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/fs/binfmt_flat.c b/fs/binfmt_flat.c
index 831a2b25ba79f..6f0aca5379da2 100644
--- a/fs/binfmt_flat.c
+++ b/fs/binfmt_flat.c
@@ -854,7 +854,7 @@ static int load_flat_file(struct linux_binprm *bprm,
 #endif /* CONFIG_BINFMT_FLAT_OLD */
 	}
 
-	flush_icache_range(start_code, end_code);
+	flush_icache_user_range(start_code, end_code);
 
 	/* zero the BSS,  BRK and stack areas */
 	if (clear_user((void __user *)(datapos + data_len), bss_len +
-- 
2.26.2


^ permalink raw reply	[flat|nested] 38+ messages in thread

* [PATCH 28/29] nommu: use flush_icache_user_range in brk and mmap
  2020-05-15 14:36 sort out the flush_icache_range mess v2 Christoph Hellwig
                   ` (26 preceding siblings ...)
  2020-05-15 14:36 ` [PATCH 27/29] binfmt_flat: use flush_icache_user_range Christoph Hellwig
@ 2020-05-15 14:36 ` Christoph Hellwig
  2020-05-15 14:36 ` [PATCH 29/29] module: move the set_fs hack for flush_icache_range to m68k Christoph Hellwig
  28 siblings, 0 replies; 38+ messages in thread
From: Christoph Hellwig @ 2020-05-15 14:36 UTC (permalink / raw)
  To: Andrew Morton, Arnd Bergmann, Roman Zippel
  Cc: Jessica Yu, Michal Simek, x86, linux-alpha, linux-kernel,
	linux-arm-kernel, linux-c6x-dev, linux-hexagon, linux-ia64,
	linux-m68k, linux-mips, openrisc, linuxppc-dev, linux-riscv,
	linux-sh, sparclinux, linux-arch, linux-mm, linux-um,
	linux-xtensa, linux-fsdevel

These obviously operate on user addresses.

Signed-off-by: Christoph Hellwig <hch@lst.de>
---
 mm/nommu.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/mm/nommu.c b/mm/nommu.c
index 318df4e236c99..aed7acaed2383 100644
--- a/mm/nommu.c
+++ b/mm/nommu.c
@@ -443,7 +443,7 @@ SYSCALL_DEFINE1(brk, unsigned long, brk)
 	/*
 	 * Ok, looks good - let it rip.
 	 */
-	flush_icache_range(mm->brk, brk);
+	flush_icache_user_range(mm->brk, brk);
 	return mm->brk = brk;
 }
 
@@ -1287,7 +1287,7 @@ unsigned long do_mmap(struct file *file,
 	/* we flush the region from the icache only when the first executable
 	 * mapping of it is made  */
 	if (vma->vm_flags & VM_EXEC && !region->vm_icache_flushed) {
-		flush_icache_range(region->vm_start, region->vm_end);
+		flush_icache_user_range(region->vm_start, region->vm_end);
 		region->vm_icache_flushed = true;
 	}
 
-- 
2.26.2


^ permalink raw reply	[flat|nested] 38+ messages in thread

* [PATCH 29/29] module: move the set_fs hack for flush_icache_range to m68k
  2020-05-15 14:36 sort out the flush_icache_range mess v2 Christoph Hellwig
                   ` (27 preceding siblings ...)
  2020-05-15 14:36 ` [PATCH 28/29] nommu: use flush_icache_user_range in brk and mmap Christoph Hellwig
@ 2020-05-15 14:36 ` Christoph Hellwig
  2020-05-18 13:04   ` Jessica Yu
  28 siblings, 1 reply; 38+ messages in thread
From: Christoph Hellwig @ 2020-05-15 14:36 UTC (permalink / raw)
  To: Andrew Morton, Arnd Bergmann, Roman Zippel
  Cc: Jessica Yu, Michal Simek, x86, linux-alpha, linux-kernel,
	linux-arm-kernel, linux-c6x-dev, linux-hexagon, linux-ia64,
	linux-m68k, linux-mips, openrisc, linuxppc-dev, linux-riscv,
	linux-sh, sparclinux, linux-arch, linux-mm, linux-um,
	linux-xtensa, linux-fsdevel, Geert Uytterhoeven

flush_icache_range generally operates on kernel addresses, but for some
reason m68k needed a set_fs override.  Move that into the m68k code
insted of keeping it in the module loader.

Signed-off-by: Christoph Hellwig <hch@lst.de>
Reviewed-by: Geert Uytterhoeven <geert@linux-m68k.org>
Acked-by: Geert Uytterhoeven <geert@linux-m68k.org>
---
 arch/m68k/mm/cache.c | 4 ++++
 kernel/module.c      | 8 --------
 2 files changed, 4 insertions(+), 8 deletions(-)

diff --git a/arch/m68k/mm/cache.c b/arch/m68k/mm/cache.c
index 7915be3a09712..5ecb3310e8745 100644
--- a/arch/m68k/mm/cache.c
+++ b/arch/m68k/mm/cache.c
@@ -107,7 +107,11 @@ void flush_icache_user_range(unsigned long address, unsigned long endaddr)
 
 void flush_icache_range(unsigned long address, unsigned long endaddr)
 {
+	mm_segment_t old_fs = get_fs();
+
+	set_fs(KERNEL_DS);
 	flush_icache_user_range(address, endaddr);
+	set_fs(old_fs);
 }
 EXPORT_SYMBOL(flush_icache_range);
 
diff --git a/kernel/module.c b/kernel/module.c
index 646f1e2330d2b..b1673ed49594f 100644
--- a/kernel/module.c
+++ b/kernel/module.c
@@ -3312,12 +3312,6 @@ static int check_module_license_and_versions(struct module *mod)
 
 static void flush_module_icache(const struct module *mod)
 {
-	mm_segment_t old_fs;
-
-	/* flush the icache in correct context */
-	old_fs = get_fs();
-	set_fs(KERNEL_DS);
-
 	/*
 	 * Flush the instruction cache, since we've played with text.
 	 * Do it before processing of module parameters, so the module
@@ -3329,8 +3323,6 @@ static void flush_module_icache(const struct module *mod)
 				   + mod->init_layout.size);
 	flush_icache_range((unsigned long)mod->core_layout.base,
 			   (unsigned long)mod->core_layout.base + mod->core_layout.size);
-
-	set_fs(old_fs);
 }
 
 int __weak module_frob_arch_sections(Elf_Ehdr *hdr,
-- 
2.26.2


^ permalink raw reply	[flat|nested] 38+ messages in thread

* Re: [PATCH 29/29] module: move the set_fs hack for flush_icache_range to m68k
  2020-05-15 14:36 ` [PATCH 29/29] module: move the set_fs hack for flush_icache_range to m68k Christoph Hellwig
@ 2020-05-18 13:04   ` Jessica Yu
  0 siblings, 0 replies; 38+ messages in thread
From: Jessica Yu @ 2020-05-18 13:04 UTC (permalink / raw)
  To: Christoph Hellwig
  Cc: Andrew Morton, Arnd Bergmann, Roman Zippel, Michal Simek, x86,
	linux-alpha, linux-kernel, linux-arm-kernel, linux-c6x-dev,
	linux-hexagon, linux-ia64, linux-m68k, linux-mips, openrisc,
	linuxppc-dev, linux-riscv, linux-sh, sparclinux, linux-arch,
	linux-mm, linux-um, linux-xtensa, linux-fsdevel,
	Geert Uytterhoeven

+++ Christoph Hellwig [15/05/20 16:36 +0200]:
>flush_icache_range generally operates on kernel addresses, but for some
>reason m68k needed a set_fs override.  Move that into the m68k code
>insted of keeping it in the module loader.
>
>Signed-off-by: Christoph Hellwig <hch@lst.de>
>Reviewed-by: Geert Uytterhoeven <geert@linux-m68k.org>
>Acked-by: Geert Uytterhoeven <geert@linux-m68k.org>
>---
> arch/m68k/mm/cache.c | 4 ++++
> kernel/module.c      | 8 --------
> 2 files changed, 4 insertions(+), 8 deletions(-)

Thanks for cleaning this up. For module.c:

Acked-by: Jessica Yu <jeyu@kernel.org>


^ permalink raw reply	[flat|nested] 38+ messages in thread

* Re: [PATCH 10/29] c6x: use asm-generic/cacheflush.h
  2020-05-15 14:36 ` [PATCH 10/29] c6x: " Christoph Hellwig
@ 2020-05-18 18:20   ` Mark Salter
  0 siblings, 0 replies; 38+ messages in thread
From: Mark Salter @ 2020-05-18 18:20 UTC (permalink / raw)
  To: Christoph Hellwig, Andrew Morton, Arnd Bergmann, Roman Zippel
  Cc: linux-arch, linux-xtensa, Michal Simek, Jessica Yu, linux-ia64,
	linux-c6x-dev, linux-sh, linux-hexagon, x86, linux-um,
	linux-kernel, linux-mips, linux-mm, linux-m68k, openrisc,
	linux-alpha, sparclinux, linux-fsdevel, linux-riscv,
	linuxppc-dev, linux-arm-kernel

On Fri, 2020-05-15 at 16:36 +0200, Christoph Hellwig wrote:
> C6x needs almost no cache flushing routines of its own.  Rely on
> asm-generic/cacheflush.h for the defaults.
> 
> Signed-off-by: Christoph Hellwig <hch@lst.de>
> ---
>  arch/c6x/include/asm/cacheflush.h | 19 +------------------
>  1 file changed, 1 insertion(+), 18 deletions(-)
> 
> diff --git a/arch/c6x/include/asm/cacheflush.h b/arch/c6x/include/asm/cacheflush.h
> index 4540b40475e6c..10922d528de6d 100644
> --- a/arch/c6x/include/asm/cacheflush.h
> +++ b/arch/c6x/include/asm/cacheflush.h
> @@ -16,21 +16,6 @@
>  #include <asm/page.h>
>  #include <asm/string.h>
>  
> -/*
> - * virtually-indexed cache management (our cache is physically indexed)
> - */
> -#define flush_cache_all()			do {} while (0)
> -#define flush_cache_mm(mm)			do {} while (0)
> -#define flush_cache_dup_mm(mm)			do {} while (0)
> -#define flush_cache_range(mm, start, end)	do {} while (0)
> -#define flush_cache_page(vma, vmaddr, pfn)	do {} while (0)
> -#define flush_cache_vmap(start, end)		do {} while (0)
> -#define flush_cache_vunmap(start, end)		do {} while (0)
> -#define ARCH_IMPLEMENTS_FLUSH_DCACHE_PAGE 0
> -#define flush_dcache_page(page)			do {} while (0)
> -#define flush_dcache_mmap_lock(mapping)		do {} while (0)
> -#define flush_dcache_mmap_unlock(mapping)	do {} while (0)
> -
>  /*
>   * physically-indexed cache management
>   */
> @@ -49,14 +34,12 @@ do {								  \
>  			(unsigned long) page_address(page) + PAGE_SIZE)); \
>  } while (0)
>  
> -
>  #define copy_to_user_page(vma, page, vaddr, dst, src, len) \
>  do {						     \
>  	memcpy(dst, src, len);			     \
>  	flush_icache_range((unsigned) (dst), (unsigned) (dst) + (len)); \
>  } while (0)
>  
> -#define copy_from_user_page(vma, page, vaddr, dst, src, len) \
> -	memcpy(dst, src, len)
> +#include <asm-generic/cacheflush.h>
>  
>  #endif /* _ASM_C6X_CACHEFLUSH_H */

Acked-by: Mark Salter <msalter@redhat.com>



^ permalink raw reply	[flat|nested] 38+ messages in thread

* Re: [PATCH 09/29] arm64: use asm-generic/cacheflush.h
  2020-05-15 14:36 ` [PATCH 09/29] arm64: " Christoph Hellwig
@ 2020-05-22 15:54   ` Catalin Marinas
  0 siblings, 0 replies; 38+ messages in thread
From: Catalin Marinas @ 2020-05-22 15:54 UTC (permalink / raw)
  To: Christoph Hellwig
  Cc: Andrew Morton, Arnd Bergmann, Roman Zippel, Jessica Yu,
	Michal Simek, x86, linux-alpha, linux-kernel, linux-arm-kernel,
	linux-c6x-dev, linux-hexagon, linux-ia64, linux-m68k, linux-mips,
	openrisc, linuxppc-dev, linux-riscv, linux-sh, sparclinux,
	linux-arch, linux-mm, linux-um, linux-xtensa, linux-fsdevel

On Fri, May 15, 2020 at 04:36:26PM +0200, Christoph Hellwig wrote:
> ARM64 needs almost no cache flushing routines of its own.  Rely on
> asm-generic/cacheflush.h for the defaults.
> 
> Signed-off-by: Christoph Hellwig <hch@lst.de>

Acked-by: Catalin Marinas <catalin.marinas@arm.com>

^ permalink raw reply	[flat|nested] 38+ messages in thread

* [PATCH] media: omap3isp: Shuffle cacheflush.h and include mm.h
  2020-05-15 14:36 ` [PATCH 06/29] asm-generic: don't include <linux/mm.h> in cacheflush.h Christoph Hellwig
@ 2020-05-27  4:34   ` Nathan Chancellor
  2020-05-27  5:10     ` Christoph Hellwig
  2020-05-27  7:02     ` Geert Uytterhoeven
  0 siblings, 2 replies; 38+ messages in thread
From: Nathan Chancellor @ 2020-05-27  4:34 UTC (permalink / raw)
  To: hch
  Cc: akpm, arnd, jeyu, linux-alpha, linux-arch, linux-arm-kernel,
	linux-c6x-dev, linux-fsdevel, linux-hexagon, linux-ia64,
	linux-kernel, linux-m68k, linux-mips, linux-mm, linux-riscv,
	linux-sh, linux-um, linux-xtensa, linuxppc-dev, monstr, openrisc,
	sparclinux, x86, zippel, Nathan Chancellor

After mm.h was removed from the asm-generic version of cacheflush.h,
s390 allyesconfig shows several warnings of the following nature:

In file included from ./arch/s390/include/generated/asm/cacheflush.h:1,
                 from drivers/media/platform/omap3isp/isp.c:42:
./include/asm-generic/cacheflush.h:16:42: warning: 'struct mm_struct'
declared inside parameter list will not be visible outside of this
definition or declaration

cacheflush.h does not include mm.h nor does it include any forward
declaration of these structures hence the warning. To avoid this,
include mm.h explicitly in this file and shuffle cacheflush.h below it.

Fixes: 19c0054597a0 ("asm-generic: don't include <linux/mm.h> in cacheflush.h")
Signed-off-by: Nathan Chancellor <natechancellor@gmail.com>
---

I am aware the fixes tag is kind of irrelevant because that SHA will
change in the next linux-next revision and this will probably get folded
into the original patch anyways but still.

The other solution would be to add forward declarations of these structs
to the top of cacheflush.h, I just chose to do what Christoph did in the
original patch. I am happy to do that instead if you all feel that is
better.

 drivers/media/platform/omap3isp/isp.c | 5 +++--
 1 file changed, 3 insertions(+), 2 deletions(-)

diff --git a/drivers/media/platform/omap3isp/isp.c b/drivers/media/platform/omap3isp/isp.c
index a4ee6b86663e..54106a768e54 100644
--- a/drivers/media/platform/omap3isp/isp.c
+++ b/drivers/media/platform/omap3isp/isp.c
@@ -39,8 +39,6 @@
  *	Troy Laramy <t-laramy@ti.com>
  */
 
-#include <asm/cacheflush.h>
-
 #include <linux/clk.h>
 #include <linux/clkdev.h>
 #include <linux/delay.h>
@@ -49,6 +47,7 @@
 #include <linux/i2c.h>
 #include <linux/interrupt.h>
 #include <linux/mfd/syscon.h>
+#include <linux/mm.h>
 #include <linux/module.h>
 #include <linux/omap-iommu.h>
 #include <linux/platform_device.h>
@@ -58,6 +57,8 @@
 #include <linux/sched.h>
 #include <linux/vmalloc.h>
 
+#include <asm/cacheflush.h>
+
 #ifdef CONFIG_ARM_DMA_USE_IOMMU
 #include <asm/dma-iommu.h>
 #endif
-- 
2.27.0.rc0


^ permalink raw reply	[flat|nested] 38+ messages in thread

* Re: [PATCH] media: omap3isp: Shuffle cacheflush.h and include mm.h
  2020-05-27  4:34   ` [PATCH] media: omap3isp: Shuffle cacheflush.h and include mm.h Nathan Chancellor
@ 2020-05-27  5:10     ` Christoph Hellwig
  2020-05-27  7:02     ` Geert Uytterhoeven
  1 sibling, 0 replies; 38+ messages in thread
From: Christoph Hellwig @ 2020-05-27  5:10 UTC (permalink / raw)
  To: Nathan Chancellor
  Cc: hch, akpm, arnd, jeyu, linux-alpha, linux-arch, linux-arm-kernel,
	linux-c6x-dev, linux-fsdevel, linux-hexagon, linux-ia64,
	linux-kernel, linux-m68k, linux-mips, linux-mm, linux-riscv,
	linux-sh, linux-um, linux-xtensa, linuxppc-dev, monstr, openrisc,
	sparclinux, x86, zippel

On Tue, May 26, 2020 at 09:34:27PM -0700, Nathan Chancellor wrote:
> After mm.h was removed from the asm-generic version of cacheflush.h,
> s390 allyesconfig shows several warnings of the following nature:

Hmm, I'm pretty sure I sent the same fix a few days ago in response to
a build bot report.  But if that didn't get picked up I'm fine with
your version of it as well of course:

Acked-by: Christoph Hellwig <hch@lst.de>

^ permalink raw reply	[flat|nested] 38+ messages in thread

* Re: [PATCH] media: omap3isp: Shuffle cacheflush.h and include mm.h
  2020-05-27  4:34   ` [PATCH] media: omap3isp: Shuffle cacheflush.h and include mm.h Nathan Chancellor
  2020-05-27  5:10     ` Christoph Hellwig
@ 2020-05-27  7:02     ` Geert Uytterhoeven
  2020-05-27  8:13       ` Nathan Chancellor
  1 sibling, 1 reply; 38+ messages in thread
From: Geert Uytterhoeven @ 2020-05-27  7:02 UTC (permalink / raw)
  To: Nathan Chancellor
  Cc: Christoph Hellwig, linux-ia64, Linux-sh list, Roman Zippel,
	open list:BROADCOM NVRAM DRIVER, Linux MM, sparclinux,
	linux-riscv, Linux-Arch, linux-c6x-dev,
	open list:QUALCOMM HEXAGON...,
	the arch/x86 maintainers,
	open list:TENSILICA XTENSA PORT (xtensa),
	Arnd Bergmann, alpha, linux-um, linux-m68k, Openrisc, Linux ARM,
	Michal Simek, Linux Kernel Mailing List, Jessica Yu,
	Linux FS Devel, Andrew Morton, linuxppc-dev, Laurent Pinchart

Hi Nathan,

CC Laurent

On Wed, May 27, 2020 at 6:37 AM Nathan Chancellor
<natechancellor@gmail.com> wrote:
> After mm.h was removed from the asm-generic version of cacheflush.h,
> s390 allyesconfig shows several warnings of the following nature:
>
> In file included from ./arch/s390/include/generated/asm/cacheflush.h:1,
>                  from drivers/media/platform/omap3isp/isp.c:42:
> ./include/asm-generic/cacheflush.h:16:42: warning: 'struct mm_struct'
> declared inside parameter list will not be visible outside of this
> definition or declaration
>
> cacheflush.h does not include mm.h nor does it include any forward
> declaration of these structures hence the warning. To avoid this,
> include mm.h explicitly in this file and shuffle cacheflush.h below it.
>
> Fixes: 19c0054597a0 ("asm-generic: don't include <linux/mm.h> in cacheflush.h")
> Signed-off-by: Nathan Chancellor <natechancellor@gmail.com>

Thanks for your patch!

> I am aware the fixes tag is kind of irrelevant because that SHA will
> change in the next linux-next revision and this will probably get folded
> into the original patch anyways but still.
>
> The other solution would be to add forward declarations of these structs
> to the top of cacheflush.h, I just chose to do what Christoph did in the
> original patch. I am happy to do that instead if you all feel that is
> better.

That actually looks like a better solution to me, as it would address the
problem for all users.

>  drivers/media/platform/omap3isp/isp.c | 5 +++--
>  1 file changed, 3 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/media/platform/omap3isp/isp.c b/drivers/media/platform/omap3isp/isp.c
> index a4ee6b86663e..54106a768e54 100644
> --- a/drivers/media/platform/omap3isp/isp.c
> +++ b/drivers/media/platform/omap3isp/isp.c
> @@ -39,8 +39,6 @@
>   *     Troy Laramy <t-laramy@ti.com>
>   */
>
> -#include <asm/cacheflush.h>
> -
>  #include <linux/clk.h>
>  #include <linux/clkdev.h>
>  #include <linux/delay.h>
> @@ -49,6 +47,7 @@
>  #include <linux/i2c.h>
>  #include <linux/interrupt.h>
>  #include <linux/mfd/syscon.h>
> +#include <linux/mm.h>
>  #include <linux/module.h>
>  #include <linux/omap-iommu.h>
>  #include <linux/platform_device.h>
> @@ -58,6 +57,8 @@
>  #include <linux/sched.h>
>  #include <linux/vmalloc.h>
>
> +#include <asm/cacheflush.h>
> +
>  #ifdef CONFIG_ARM_DMA_USE_IOMMU
>  #include <asm/dma-iommu.h>
>  #endif

Why does this file need <asm/cacheflush.h> at all?
It doesn't call any of the flush_*() functions, and seems to compile fine
without (on arm32).

Perhaps it was included at the top intentionally, to override the definitions
of copy_{to,from}_user_page()? Fortunately that doesn't seem to be the
case, from a quick look at the assembler output.

So let's just remove the #include instead?

Gr{oetje,eeting}s,

                        Geert

-- 
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
                                -- Linus Torvalds

^ permalink raw reply	[flat|nested] 38+ messages in thread

* Re: [PATCH] media: omap3isp: Shuffle cacheflush.h and include mm.h
  2020-05-27  7:02     ` Geert Uytterhoeven
@ 2020-05-27  8:13       ` Nathan Chancellor
  2020-05-27 13:45         ` Laurent Pinchart
  0 siblings, 1 reply; 38+ messages in thread
From: Nathan Chancellor @ 2020-05-27  8:13 UTC (permalink / raw)
  To: Geert Uytterhoeven
  Cc: Christoph Hellwig, linux-ia64, Linux-sh list, Roman Zippel,
	open list:BROADCOM NVRAM DRIVER, Linux MM, sparclinux,
	linux-riscv, Linux-Arch, linux-c6x-dev,
	open list:QUALCOMM HEXAGON...,
	the arch/x86 maintainers,
	open list:TENSILICA XTENSA PORT (xtensa),
	Arnd Bergmann, alpha, linux-um, linux-m68k, Openrisc, Linux ARM,
	Michal Simek, Linux Kernel Mailing List, Jessica Yu,
	Linux FS Devel, Andrew Morton, linuxppc-dev, Laurent Pinchart

Hi Geert,

On Wed, May 27, 2020 at 09:02:51AM +0200, Geert Uytterhoeven wrote:
> Hi Nathan,
> 
> CC Laurent
> 
> On Wed, May 27, 2020 at 6:37 AM Nathan Chancellor
> <natechancellor@gmail.com> wrote:
> > After mm.h was removed from the asm-generic version of cacheflush.h,
> > s390 allyesconfig shows several warnings of the following nature:
> >
> > In file included from ./arch/s390/include/generated/asm/cacheflush.h:1,
> >                  from drivers/media/platform/omap3isp/isp.c:42:
> > ./include/asm-generic/cacheflush.h:16:42: warning: 'struct mm_struct'
> > declared inside parameter list will not be visible outside of this
> > definition or declaration
> >
> > cacheflush.h does not include mm.h nor does it include any forward
> > declaration of these structures hence the warning. To avoid this,
> > include mm.h explicitly in this file and shuffle cacheflush.h below it.
> >
> > Fixes: 19c0054597a0 ("asm-generic: don't include <linux/mm.h> in cacheflush.h")
> > Signed-off-by: Nathan Chancellor <natechancellor@gmail.com>
> 
> Thanks for your patch!
> 
> > I am aware the fixes tag is kind of irrelevant because that SHA will
> > change in the next linux-next revision and this will probably get folded
> > into the original patch anyways but still.
> >
> > The other solution would be to add forward declarations of these structs
> > to the top of cacheflush.h, I just chose to do what Christoph did in the
> > original patch. I am happy to do that instead if you all feel that is
> > better.
> 
> That actually looks like a better solution to me, as it would address the
> problem for all users.
> 
> >  drivers/media/platform/omap3isp/isp.c | 5 +++--
> >  1 file changed, 3 insertions(+), 2 deletions(-)
> >
> > diff --git a/drivers/media/platform/omap3isp/isp.c b/drivers/media/platform/omap3isp/isp.c
> > index a4ee6b86663e..54106a768e54 100644
> > --- a/drivers/media/platform/omap3isp/isp.c
> > +++ b/drivers/media/platform/omap3isp/isp.c
> > @@ -39,8 +39,6 @@
> >   *     Troy Laramy <t-laramy@ti.com>
> >   */
> >
> > -#include <asm/cacheflush.h>
> > -
> >  #include <linux/clk.h>
> >  #include <linux/clkdev.h>
> >  #include <linux/delay.h>
> > @@ -49,6 +47,7 @@
> >  #include <linux/i2c.h>
> >  #include <linux/interrupt.h>
> >  #include <linux/mfd/syscon.h>
> > +#include <linux/mm.h>
> >  #include <linux/module.h>
> >  #include <linux/omap-iommu.h>
> >  #include <linux/platform_device.h>
> > @@ -58,6 +57,8 @@
> >  #include <linux/sched.h>
> >  #include <linux/vmalloc.h>
> >
> > +#include <asm/cacheflush.h>
> > +
> >  #ifdef CONFIG_ARM_DMA_USE_IOMMU
> >  #include <asm/dma-iommu.h>
> >  #endif
> 
> Why does this file need <asm/cacheflush.h> at all?
> It doesn't call any of the flush_*() functions, and seems to compile fine
> without (on arm32).
> 
> Perhaps it was included at the top intentionally, to override the definitions
> of copy_{to,from}_user_page()? Fortunately that doesn't seem to be the
> case, from a quick look at the assembler output.
> 
> So let's just remove the #include instead?

Sounds good to me. I can send a patch if needed or I suppose Andrew can
just make a small fixup patch for it. Let me know what I should do.

Cheers,
Nathan

^ permalink raw reply	[flat|nested] 38+ messages in thread

* Re: [PATCH] media: omap3isp: Shuffle cacheflush.h and include mm.h
  2020-05-27  8:13       ` Nathan Chancellor
@ 2020-05-27 13:45         ` Laurent Pinchart
  0 siblings, 0 replies; 38+ messages in thread
From: Laurent Pinchart @ 2020-05-27 13:45 UTC (permalink / raw)
  To: Nathan Chancellor
  Cc: Geert Uytterhoeven, Christoph Hellwig, linux-ia64, Linux-sh list,
	Roman Zippel, open list:BROADCOM NVRAM DRIVER, Linux MM,
	sparclinux, linux-riscv, Linux-Arch, linux-c6x-dev,
	open list:QUALCOMM HEXAGON...,
	the arch/x86 maintainers,
	open list:TENSILICA XTENSA PORT (xtensa),
	Arnd Bergmann, alpha, linux-um, linux-m68k, Openrisc, Linux ARM,
	Michal Simek, Linux Kernel Mailing List, Jessica Yu,
	Linux FS Devel, Andrew Morton, linuxppc-dev, Sakari Ailus,
	linux-media

Hi Nathan,

(CC'ing Sakari Ailus and the linux-media mailing list)

On Wed, May 27, 2020 at 01:13:37AM -0700, Nathan Chancellor wrote:
> On Wed, May 27, 2020 at 09:02:51AM +0200, Geert Uytterhoeven wrote:
> > On Wed, May 27, 2020 at 6:37 AM Nathan Chancellor wrote:
> > > After mm.h was removed from the asm-generic version of cacheflush.h,
> > > s390 allyesconfig shows several warnings of the following nature:
> > >
> > > In file included from ./arch/s390/include/generated/asm/cacheflush.h:1,
> > >                  from drivers/media/platform/omap3isp/isp.c:42:
> > > ./include/asm-generic/cacheflush.h:16:42: warning: 'struct mm_struct'
> > > declared inside parameter list will not be visible outside of this
> > > definition or declaration
> > >
> > > cacheflush.h does not include mm.h nor does it include any forward
> > > declaration of these structures hence the warning. To avoid this,
> > > include mm.h explicitly in this file and shuffle cacheflush.h below it.
> > >
> > > Fixes: 19c0054597a0 ("asm-generic: don't include <linux/mm.h> in cacheflush.h")
> > > Signed-off-by: Nathan Chancellor <natechancellor@gmail.com>
> > 
> > Thanks for your patch!
> > 
> > > I am aware the fixes tag is kind of irrelevant because that SHA will
> > > change in the next linux-next revision and this will probably get folded
> > > into the original patch anyways but still.
> > >
> > > The other solution would be to add forward declarations of these structs
> > > to the top of cacheflush.h, I just chose to do what Christoph did in the
> > > original patch. I am happy to do that instead if you all feel that is
> > > better.
> > 
> > That actually looks like a better solution to me, as it would address the
> > problem for all users.

Headers should be self-contained, so that would be the best fix in my
opinion.

This being said, as cacheflush.h isn't needed in isp.c, I think we
should also drop it. It seems to have been included there since the
first driver version, and was likely a left-over from the out-of-tree
development. Manual cache handling was part of
drivers/media/platform/omap3isp/ispqueue.c and has been removed in
commit fbac1400bd1a ("[media] omap3isp: Move to videobuf2").

cacheflush.h can also be dropped from ispvideo.c which suffers from the
same issue.

> > >  drivers/media/platform/omap3isp/isp.c | 5 +++--
> > >  1 file changed, 3 insertions(+), 2 deletions(-)
> > >
> > > diff --git a/drivers/media/platform/omap3isp/isp.c b/drivers/media/platform/omap3isp/isp.c
> > > index a4ee6b86663e..54106a768e54 100644
> > > --- a/drivers/media/platform/omap3isp/isp.c
> > > +++ b/drivers/media/platform/omap3isp/isp.c
> > > @@ -39,8 +39,6 @@
> > >   *     Troy Laramy <t-laramy@ti.com>
> > >   */
> > >
> > > -#include <asm/cacheflush.h>
> > > -
> > >  #include <linux/clk.h>
> > >  #include <linux/clkdev.h>
> > >  #include <linux/delay.h>
> > > @@ -49,6 +47,7 @@
> > >  #include <linux/i2c.h>
> > >  #include <linux/interrupt.h>
> > >  #include <linux/mfd/syscon.h>
> > > +#include <linux/mm.h>
> > >  #include <linux/module.h>
> > >  #include <linux/omap-iommu.h>
> > >  #include <linux/platform_device.h>
> > > @@ -58,6 +57,8 @@
> > >  #include <linux/sched.h>
> > >  #include <linux/vmalloc.h>
> > >
> > > +#include <asm/cacheflush.h>
> > > +
> > >  #ifdef CONFIG_ARM_DMA_USE_IOMMU
> > >  #include <asm/dma-iommu.h>
> > >  #endif
> > 
> > Why does this file need <asm/cacheflush.h> at all?
> > It doesn't call any of the flush_*() functions, and seems to compile fine
> > without (on arm32).
> > 
> > Perhaps it was included at the top intentionally, to override the definitions
> > of copy_{to,from}_user_page()? Fortunately that doesn't seem to be the
> > case, from a quick look at the assembler output.
> > 
> > So let's just remove the #include instead?
> 
> Sounds good to me. I can send a patch if needed or I suppose Andrew can
> just make a small fixup patch for it. Let me know what I should do.

-- 
Regards,

Laurent Pinchart

^ permalink raw reply	[flat|nested] 38+ messages in thread

end of thread, back to index

Thread overview: 38+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2020-05-15 14:36 sort out the flush_icache_range mess v2 Christoph Hellwig
2020-05-15 14:36 ` [PATCH 01/29] arm: fix the flush_icache_range arguments in set_fiq_handler Christoph Hellwig
2020-05-15 14:36 ` [PATCH 02/29] nds32: unexport flush_icache_page Christoph Hellwig
2020-05-15 14:36 ` [PATCH 03/29] powerpc: unexport flush_icache_user_range Christoph Hellwig
2020-05-15 14:36 ` [PATCH 04/29] unicore32: remove flush_cache_user_range Christoph Hellwig
2020-05-15 14:36 ` [PATCH 05/29] asm-generic: fix the inclusion guards for cacheflush.h Christoph Hellwig
2020-05-15 14:36 ` [PATCH 06/29] asm-generic: don't include <linux/mm.h> in cacheflush.h Christoph Hellwig
2020-05-27  4:34   ` [PATCH] media: omap3isp: Shuffle cacheflush.h and include mm.h Nathan Chancellor
2020-05-27  5:10     ` Christoph Hellwig
2020-05-27  7:02     ` Geert Uytterhoeven
2020-05-27  8:13       ` Nathan Chancellor
2020-05-27 13:45         ` Laurent Pinchart
2020-05-15 14:36 ` [PATCH 07/29] asm-generic: improve the flush_dcache_page stub Christoph Hellwig
2020-05-15 14:36 ` [PATCH 08/29] alpha: use asm-generic/cacheflush.h Christoph Hellwig
2020-05-15 14:36 ` [PATCH 09/29] arm64: " Christoph Hellwig
2020-05-22 15:54   ` Catalin Marinas
2020-05-15 14:36 ` [PATCH 10/29] c6x: " Christoph Hellwig
2020-05-18 18:20   ` Mark Salter
2020-05-15 14:36 ` [PATCH 11/29] hexagon: " Christoph Hellwig
2020-05-15 14:36 ` [PATCH 12/29] ia64: " Christoph Hellwig
2020-05-15 14:36 ` [PATCH 13/29] microblaze: " Christoph Hellwig
2020-05-15 14:36 ` [PATCH 14/29] m68knommu: " Christoph Hellwig
2020-05-15 14:36 ` [PATCH 15/29] openrisc: " Christoph Hellwig
2020-05-15 14:36 ` [PATCH 16/29] powerpc: " Christoph Hellwig
2020-05-15 14:36 ` [PATCH 17/29] riscv: " Christoph Hellwig
2020-05-15 14:36 ` [PATCH 18/29] arm,sparc,unicore32: remove flush_icache_user_range Christoph Hellwig
2020-05-15 14:36 ` [PATCH 19/29] mm: rename flush_icache_user_range to flush_icache_user_page Christoph Hellwig
2020-05-15 14:36 ` [PATCH 20/29] asm-generic: add a flush_icache_user_range stub Christoph Hellwig
2020-05-15 14:36 ` [PATCH 21/29] sh: implement flush_icache_user_range Christoph Hellwig
2020-05-15 14:36 ` [PATCH 22/29] xtensa: " Christoph Hellwig
2020-05-15 14:36 ` [PATCH 23/29] arm: rename flush_cache_user_range to flush_icache_user_range Christoph Hellwig
2020-05-15 14:36 ` [PATCH 24/29] m68k: implement flush_icache_user_range Christoph Hellwig
2020-05-15 14:36 ` [PATCH 25/29] exec: only build read_code when needed Christoph Hellwig
2020-05-15 14:36 ` [PATCH 26/29] exec: use flush_icache_user_range in read_code Christoph Hellwig
2020-05-15 14:36 ` [PATCH 27/29] binfmt_flat: use flush_icache_user_range Christoph Hellwig
2020-05-15 14:36 ` [PATCH 28/29] nommu: use flush_icache_user_range in brk and mmap Christoph Hellwig
2020-05-15 14:36 ` [PATCH 29/29] module: move the set_fs hack for flush_icache_range to m68k Christoph Hellwig
2020-05-18 13:04   ` Jessica Yu

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