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From: Hanks Chen <hanks.chen@mediatek.com>
To: Matthias Brugger <matthias.bgg@gmail.com>
Cc: Linus Walleij <linus.walleij@linaro.org>,
	Rob Herring <robh+dt@kernel.org>,
	Michael Turquette <mturquette@baylibre.com>,
	"Stephen Boyd" <sboyd@kernel.org>,
	Sean Wang <sean.wang@kernel.org>,
	mtk01761 <wendell.lin@mediatek.com>,
	Andy Teng <andy.teng@mediatek.com>, <linux-gpio@vger.kernel.org>,
	<devicetree@vger.kernel.org>,
	<linux-arm-kernel@lists.infradead.org>,
	<linux-mediatek@lists.infradead.org>,
	<linux-kernel@vger.kernel.org>, <wsd_upstream@mediatek.com>,
	CC Hwang <cc.hwang@mediatek.com>,
	Loda Chou <loda.chou@mediatek.com>
Subject: Re: [PATCH v8 6/7] arm64: dts: add dts nodes for MT6779
Date: Thu, 16 Jul 2020 12:04:02 +0800	[thread overview]
Message-ID: <1594872242.11090.8.camel@mtkswgap22> (raw)
In-Reply-To: <1b335463-b0af-9010-feed-c4b673ebb6c5@gmail.com>

On Tue, 2020-07-14 at 20:14 +0200, Matthias Brugger wrote:
> 
> On 14/07/2020 11:20, Hanks Chen wrote:
> > this adds initial MT6779 dts settings for board support,
> > including cpu, gic, timer, ccf, pinctrl, uart, sysirq...etc.
> > 
> > Signed-off-by: Hanks Chen <hanks.chen@mediatek.com>
> > ---
> >   arch/arm64/boot/dts/mediatek/Makefile       |   1 +
> >   arch/arm64/boot/dts/mediatek/mt6779-evb.dts |  31 +++
> >   arch/arm64/boot/dts/mediatek/mt6779.dtsi    | 271 ++++++++++++++++++++
> >   3 files changed, 303 insertions(+)
> >   create mode 100644 arch/arm64/boot/dts/mediatek/mt6779-evb.dts
> >   create mode 100644 arch/arm64/boot/dts/mediatek/mt6779.dtsi
> > 
> [...]
> > +
> > +		uart0: serial@11002000 {
> > +			compatible = "mediatek,mt6779-uart",
> > +				     "mediatek,mt6577-uart";
> > +			reg = <0 0x11002000 0 0x400>;
> > +			interrupts = <GIC_SPI 115 IRQ_TYPE_LEVEL_LOW>;
> > +			clocks = <&clk26m>, <&infracfg_ao CLK_INFRA_UART0>;
> > +			clock-names = "baud", "bus";
> > +			status = "disabled";
> > +		};
> > +
> > +		uart1: serial@11003000 {
> > +			compatible = "mediatek,mt6779-uart",
> > +				     "mediatek,mt6577-uart";
> > +			reg = <0 0x11003000 0 0x400>;
> > +			interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_LOW>;
> > +			clocks = <&clk26m>, <&infracfg_ao CLK_INFRA_UART1>;
> > +			clock-names = "baud", "bus";
> > +			status = "disabled";
> > +		};
> > +
> > +		uart2: serial@11004000 {
> > +			compatible = "mediatek,mt6779-uart",
> > +				     "mediatek,mt6577-uart";
> > +			reg = <0 0x11004000 0 0x400>;
> > +			interrupts = <GIC_SPI 117 IRQ_TYPE_LEVEL_LOW>;
> > +			clocks = <&clk26m>, <&infracfg_ao CLK_INFRA_UART2>;
> > +			clock-names = "baud", "bus";
> > +			status = "disabled";
> > +		};
> 
> Devicetree describes the HW we have. As far as I know, we have 4 UARTs on 
> MT6779. So we should list them all here.
> 

Actually, We have only 3 UARTs HW on MT6779, but have 4 UART clk in
header file of clk.
CLK_INFRA_UART3 is a dummy clk interface, it has no effect on the
operation of the read/write instruction.

If you think it is not good, I can remove it in the header file of clk.

Thanks

> Regards,
> Matthias


  reply	other threads:[~2020-07-16  4:04 UTC|newest]

Thread overview: 17+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-07-14  9:19 [PATCH v8 0/7] Add basic SoC Support for Mediatek MT6779 SoC Hanks Chen
2020-07-14  9:19 ` [PATCH v8 1/7] pinctrl: mediatek: update pinmux definitions for mt6779 Hanks Chen
2020-07-14 20:34   ` Rob Herring
2020-07-16 13:49   ` Linus Walleij
2020-07-14  9:19 ` [PATCH v8 2/7] dt-bindings: pinctrl: add bindings for MediaTek MT6779 SoC Hanks Chen
2020-07-14 20:35   ` Rob Herring
2020-07-14  9:19 ` [PATCH v8 3/7] pinctrl: mediatek: avoid virtual gpio trying to set reg Hanks Chen
2020-07-14 20:47   ` Sean Wang
2020-07-14  9:19 ` [PATCH v8 4/7] pinctrl: mediatek: add pinctrl support for MT6779 SoC Hanks Chen
2020-07-14  9:20 ` [PATCH v8 5/7] pinctrl: mediatek: add mt6779 eint support Hanks Chen
2020-07-14  9:20 ` [PATCH v8 6/7] arm64: dts: add dts nodes for MT6779 Hanks Chen
2020-07-14 18:14   ` Matthias Brugger
2020-07-16  4:04     ` Hanks Chen [this message]
2020-07-20 16:13       ` Matthias Brugger
2020-07-21  6:00         ` Hanks Chen
2020-07-21 22:09           ` Matthias Brugger
2020-07-14  9:20 ` [PATCH v8 7/7] clk: mediatek: add UART0 clock support Hanks Chen

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