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From: Bjorn Andersson <bjorn.andersson@linaro.org>
To: Linus Walleij <linus.walleij@linaro.org>,
	Lina Iyer <ilina@codeaurora.org>
Cc: linux-gpio@vger.kernel.org, Thierry Reding <treding@nvidia.com>
Subject: Re: [PATCH] pinctrl: qcom: Pass irqchip when adding gpiochip
Date: Wed, 24 Jul 2019 13:00:07 -0700	[thread overview]
Message-ID: <20190724200007.GO7234@tuxbook-pro> (raw)
In-Reply-To: <20190724083828.7496-1-linus.walleij@linaro.org>

On Wed 24 Jul 01:38 PDT 2019, Linus Walleij wrote:

> We need to convert all old gpio irqchips to pass the irqchip
> setup along when adding the gpio_chip.

Could you please elaborate on why we have this need?

> 
> For chained irqchips this is a pretty straight-forward
> conversion.
> 
> Cc: Bjorn Andersson <bjorn.andersson@linaro.org>
> Cc: Thierry Reding <treding@nvidia.com>
> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
> ---
>  drivers/pinctrl/qcom/pinctrl-msm.c | 27 +++++++++++++--------------
>  1 file changed, 13 insertions(+), 14 deletions(-)
> 
> diff --git a/drivers/pinctrl/qcom/pinctrl-msm.c b/drivers/pinctrl/qcom/pinctrl-msm.c
> index 7f35c196bb3e..73062e329f6f 100644
> --- a/drivers/pinctrl/qcom/pinctrl-msm.c
> +++ b/drivers/pinctrl/qcom/pinctrl-msm.c
> @@ -1002,6 +1002,7 @@ static bool msm_gpio_needs_valid_mask(struct msm_pinctrl *pctrl)
>  static int msm_gpio_init(struct msm_pinctrl *pctrl)
>  {
>  	struct gpio_chip *chip;
> +	struct gpio_irq_chip *girq;
>  	int ret;
>  	unsigned ngpio = pctrl->soc->ngpios;
>  
> @@ -1027,6 +1028,18 @@ static int msm_gpio_init(struct msm_pinctrl *pctrl)
>  	pctrl->irq_chip.irq_request_resources = msm_gpio_irq_reqres;
>  	pctrl->irq_chip.irq_release_resources = msm_gpio_irq_relres;
>  
> +	girq = &chip->irq;
> +	girq->chip = &pctrl->irq_chip;
> +	girq->parent_handler = msm_gpio_irq_handler;
> +	girq->num_parents = 1;
> +	girq->parents = devm_kcalloc(pctrl->dev, 1, sizeof(*girq->parents),
> +				     GFP_KERNEL);
> +	if (!girq->parents)
> +		return -ENOMEM;
> +	girq->default_type = IRQ_TYPE_NONE;
> +	girq->handler = handle_bad_irq;

It's been a while since i poked at this, but I think it's fine to change
this from handle_edge_irq to handle_bad_irq.


So this change does looks like a nice cleanup to me, but adding Lina wrt
her PDC integration patch series.

Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>

Regards,
Bjorn

> +	girq->parents[0] = pctrl->irq;
> +
>  	ret = gpiochip_add_data(&pctrl->chip, pctrl);
>  	if (ret) {
>  		dev_err(pctrl->dev, "Failed register gpiochip\n");
> @@ -1053,20 +1066,6 @@ static int msm_gpio_init(struct msm_pinctrl *pctrl)
>  		}
>  	}
>  
> -	ret = gpiochip_irqchip_add(chip,
> -				   &pctrl->irq_chip,
> -				   0,
> -				   handle_edge_irq,
> -				   IRQ_TYPE_NONE);
> -	if (ret) {
> -		dev_err(pctrl->dev, "Failed to add irqchip to gpiochip\n");
> -		gpiochip_remove(&pctrl->chip);
> -		return -ENOSYS;
> -	}
> -
> -	gpiochip_set_chained_irqchip(chip, &pctrl->irq_chip, pctrl->irq,
> -				     msm_gpio_irq_handler);
> -
>  	return 0;
>  }
>  
> -- 
> 2.21.0
> 

  reply	other threads:[~2019-07-24 20:10 UTC|newest]

Thread overview: 6+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-07-24  8:38 [PATCH] pinctrl: qcom: Pass irqchip when adding gpiochip Linus Walleij
2019-07-24 20:00 ` Bjorn Andersson [this message]
2019-07-25 15:16   ` Lina Iyer
2019-07-28 22:43     ` Linus Walleij
2019-07-30 17:26       ` Lina Iyer
2019-07-28 22:38   ` Linus Walleij

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