From: Icenowy Zheng <icenowy@aosc.io>
To: Rob Herring <robh+dt@kernel.org>,
Maxime Ripard <mripard@kernel.org>, Chen-Yu Tsai <wens@csie.org>,
Linus Walleij <linus.walleij@linaro.org>
Cc: linux-arm-kernel@lists.infradead.org,
linux-kernel@vger.kernel.org, linux-clk@vger.kernel.org,
linux-gpio@vger.kernel.org, linux-sunxi@googlegroups.com,
Icenowy Zheng <icenowy@aosc.io>, Rob Herring <robh@kernel.org>
Subject: [PATCH v5 5/6] dt-bindings: arm: sunxi: add binding for Lichee Zero Plus core board
Date: Sun, 28 Jul 2019 11:12:26 +0800 [thread overview]
Message-ID: <20190728031227.49140-6-icenowy@aosc.io> (raw)
In-Reply-To: <20190728031227.49140-1-icenowy@aosc.io>
The Lichee Zero Plus is a core board made by Sipeed, with a microUSB
connector on it, TF slot or WSON8 SD chip, optional eMMC or SPI Flash.
It has a gold finger connector for expansion, and UART is available from
reserved pins w/ 2.54mm pitch. The board can use either SoChip S3 or
Allwinner V3L SoCs.
Add the device tree binding of the basic version of the core board --
w/o eMMC or SPI Flash, w/ TF slot or WSON8 SD, and use S3 SoC.
Signed-off-by: Icenowy Zheng <icenowy@aosc.io>
Reviewed-by: Rob Herring <robh@kernel.org>
---
Changes in v5:
- Added V3 compatible to S3 board.
- Fixed S3 compatible string.
No changes until v5.
Patch introduced in v2.
Documentation/devicetree/bindings/arm/sunxi.yaml | 6 ++++++
1 file changed, 6 insertions(+)
diff --git a/Documentation/devicetree/bindings/arm/sunxi.yaml b/Documentation/devicetree/bindings/arm/sunxi.yaml
index 000a00d12d6a..8888f6fc68ad 100644
--- a/Documentation/devicetree/bindings/arm/sunxi.yaml
+++ b/Documentation/devicetree/bindings/arm/sunxi.yaml
@@ -353,6 +353,12 @@ properties:
- const: licheepi,licheepi-zero
- const: allwinner,sun8i-v3s
+ - description: Lichee Zero Plus (with S3, without eMMC/SPI Flash)
+ items:
+ - const: sipeed,lichee-zero-plus
+ - const: sochip,s3
+ - const: allwinner,sun8i-v3
+
- description: Linksprite PCDuino
items:
- const: linksprite,a10-pcduino
--
2.21.0
next prev parent reply other threads:[~2019-07-28 3:14 UTC|newest]
Thread overview: 9+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-07-28 3:12 [PATCH v5 0/6] Support for Allwinner V3/S3L and Sochip S3 Icenowy Zheng
2019-07-28 3:12 ` [PATCH v5 1/6] pinctrl: sunxi: v3s: introduce support for V3 Icenowy Zheng
2019-08-05 10:36 ` Linus Walleij
2019-07-28 3:12 ` [PATCH v5 2/6] clk: sunxi-ng: v3s: add missing clock slices for MMC2 module clocks Icenowy Zheng
2019-07-28 3:12 ` [PATCH v5 3/6] clk: sunxi-ng: v3s: add Allwinner V3 support Icenowy Zheng
2019-07-28 3:12 ` [PATCH v5 4/6] ARM: sunxi: dts: s3/s3l/v3: add DTSI files for S3/S3L/V3 SoCs Icenowy Zheng
2019-07-28 3:12 ` Icenowy Zheng [this message]
2019-07-28 3:12 ` [PATCH v5 6/6] ARM: dts: sun8i: s3: add devicetree for Lichee zero plus w/ S3 Icenowy Zheng
2019-08-12 8:07 ` [PATCH v5 0/6] Support for Allwinner V3/S3L and Sochip S3 Maxime Ripard
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